2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 * RTC driver for Tegra SoCs.
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/clock.h>
37 #include <sys/kernel.h>
38 #include <sys/limits.h>
40 #include <sys/mutex.h>
41 #include <sys/module.h>
42 #include <sys/resource.h>
44 #include <machine/bus.h>
45 #include <machine/resource.h>
48 #include <dev/extres/clk/clk.h>
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/ofw/ofw_bus.h>
51 #include <dev/ofw/ofw_bus_subr.h>
55 #define RTC_CONTROL 0x00
57 #define RTC_BUSY_STATUS (1 << 0)
58 #define RTC_SECONDS 0x08
59 #define RTC_SHADOW_SECONDS 0x0c
60 #define RTC_MILLI_SECONDS 0x10
61 #define RTC_SECONDS_ALARM0 0x14
62 #define RTC_SECONDS_ALARM1 0x18
63 #define RTC_MILLI_SECONDS_ALARM 0x1c
64 #define RTC_SECONDS_COUNTDOWN_ALARM 0x20
65 #define RTC_MILLI_SECONDS_COUNTDOW_ALARM 0x24
66 #define RTC_INTR_MASK 0x28
67 #define RTC_INTR_MSEC_CDN_ALARM (1 << 4)
68 #define RTC_INTR_SEC_CDN_ALARM (1 << 3)
69 #define RTC_INTR_MSEC_ALARM (1 << 2)
70 #define RTC_INTR_SEC_ALARM1 (1 << 1)
71 #define RTC_INTR_SEC_ALARM0 (1 << 0)
73 #define RTC_INTR_STATUS 0x2c
74 #define RTC_INTR_SOURCE 0x30
75 #define RTC_INTR_SET 0x34
76 #define RTC_CORRECTION_FACTOR 0x38
78 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))
79 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
81 #define LOCK(_sc) mtx_lock(&(_sc)->mtx)
82 #define UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
83 #define SLEEP(_sc, timeout) \
84 mtx_sleep(sc, &sc->mtx, 0, "rtcwait", timeout);
85 #define LOCK_INIT(_sc) \
86 mtx_init(&_sc->mtx, device_get_nameunit(_sc->dev), "tegra_rtc", MTX_DEF)
87 #define LOCK_DESTROY(_sc) mtx_destroy(&_sc->mtx)
88 #define ASSERT_LOCKED(_sc) mtx_assert(&_sc->mtx, MA_OWNED)
89 #define ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->mtx, MA_NOTOWNED)
91 static struct ofw_compat_data compat_data[] = {
92 {"nvidia,tegra124-rtc", 1},
96 struct tegra_rtc_softc {
100 struct resource *mem_res;
101 struct resource *irq_res;
109 tegra_rtc_wait(struct tegra_rtc_softc *sc)
113 for (timeout = 500; timeout >0; timeout--) {
114 if ((RD4(sc, RTC_BUSY) & RTC_BUSY_STATUS) == 0)
119 device_printf(sc->dev, "Device busy timeouted\n");
124 * Get the time of day clock and return it in ts.
125 * Return 0 on success, an error number otherwise.
128 tegra_rtc_gettime(device_t dev, struct timespec *ts)
130 struct tegra_rtc_softc *sc;
134 sc = device_get_softc(dev);
137 msec = RD4(sc, RTC_MILLI_SECONDS);
138 sec = RD4(sc, RTC_SHADOW_SECONDS);
141 tv.tv_usec = msec * 1000;
142 TIMEVAL_TO_TIMESPEC(&tv, ts);
148 tegra_rtc_settime(device_t dev, struct timespec *ts)
150 struct tegra_rtc_softc *sc;
153 sc = device_get_softc(dev);
156 TIMESPEC_TO_TIMEVAL(&tv, ts);
158 WR4(sc, RTC_SECONDS, tv.tv_sec);
166 tegra_rtc_intr(void *arg)
168 struct tegra_rtc_softc *sc;
171 sc = (struct tegra_rtc_softc *)arg;
173 status = RD4(sc, RTC_INTR_STATUS);
174 WR4(sc, RTC_INTR_STATUS, status);
179 tegra_rtc_probe(device_t dev)
181 if (!ofw_bus_status_okay(dev))
184 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
187 return (BUS_PROBE_DEFAULT);
191 tegra_rtc_attach(device_t dev)
194 struct tegra_rtc_softc *sc;
196 sc = device_get_softc(dev);
201 /* Get the memory resource for the register mapping. */
203 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
205 if (sc->mem_res == NULL) {
206 device_printf(dev, "Cannot map registers.\n");
211 /* Allocate our IRQ resource. */
213 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
215 if (sc->irq_res == NULL) {
216 device_printf(dev, "Cannot allocate interrupt.\n");
222 rv = clk_get_by_ofw_index(dev, 0, &sc->clk);
224 device_printf(dev, "Cannot get i2c clock: %d\n", rv);
227 rv = clk_enable(sc->clk);
229 device_printf(dev, "Cannot enable clock: %d\n", rv);
234 WR4(sc, RTC_SECONDS_ALARM0, 0);
235 WR4(sc, RTC_SECONDS_ALARM1, 0);
236 WR4(sc, RTC_INTR_STATUS, 0xFFFFFFFF);
237 WR4(sc, RTC_INTR_MASK, 0);
239 /* Setup interrupt */
240 rv = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
241 NULL, tegra_rtc_intr, sc, &sc->irq_h);
243 device_printf(dev, "Cannot setup interrupt.\n");
248 * Register as a time of day clock with 1-second resolution.
250 * XXXX Not yet, we don't have support for multiple RTCs
252 /* clock_register(dev, 1000000); */
254 return (bus_generic_attach(dev));
258 clk_release(sc->clk);
259 if (sc->irq_h != NULL)
260 bus_teardown_intr(dev, sc->irq_res, sc->irq_h);
261 if (sc->irq_res != NULL)
262 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
263 if (sc->mem_res != NULL)
264 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
271 tegra_rtc_detach(device_t dev)
273 struct tegra_rtc_softc *sc;
275 sc = device_get_softc(dev);
276 if (sc->irq_h != NULL)
277 bus_teardown_intr(dev, sc->irq_res, sc->irq_h);
278 if (sc->irq_res != NULL)
279 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
280 if (sc->mem_res != NULL)
281 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
284 return (bus_generic_detach(dev));
287 static device_method_t tegra_rtc_methods[] = {
288 /* Device interface */
289 DEVMETHOD(device_probe, tegra_rtc_probe),
290 DEVMETHOD(device_attach, tegra_rtc_attach),
291 DEVMETHOD(device_detach, tegra_rtc_detach),
293 /* clock interface */
294 DEVMETHOD(clock_gettime, tegra_rtc_gettime),
295 DEVMETHOD(clock_settime, tegra_rtc_settime),
300 DEFINE_CLASS_0(tegra_rtc, tegra_rtc_driver, tegra_rtc_methods,
301 sizeof(struct tegra_rtc_softc));
302 static devclass_t tegra_rtc_devclass;
303 DRIVER_MODULE(tegra_rtc, simplebus, tegra_rtc_driver, tegra_rtc_devclass, 0, 0);