sys/arm/qualcomm/qcom_scm_defs.h

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause
   3  *
   4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD$
  28  */
  29
  30 #ifndef __QCOM_SCM_DEFS_H__
  31 #define __QCOM_SCM_DEFS_H__
  32
  33 /*
  34  * Maximum SCM arguments and return values.
  35  */
  36 #define MAX_QCOM_SCM_ARGS                       10
  37 #define MAX_QCOM_SCM_RETS                       3
  38
  39 /*
  40  * SCM argument type definitions.
  41  */
  42 #define QCOM_SCM_ARGTYPE_VAL                    0x00
  43 #define QCOM_SCM_ARGTYPE_RO                     0x01
  44 #define QCOM_SCM_ARGTYPE_RW                     0x02
  45 #define QCOM_SCM_ARGTYPE_BUFVAL                 0x03
  46
  47 /*
  48  * SCM calls + arguments.
  49  */
  50 #define QCOM_SCM_SVC_BOOT                       0x01
  51 #define         QCOM_SCM_BOOT_SET_ADDR          0x01
  52 #define         QCOM_SCM_BOOT_TERMINATE_PC      0x02
  53 #define         QCOM_SCM_BOOT_SET_DLOAD_MODE    0x10
  54 #define         QCOM_SCM_BOOT_SET_REMOTE_STATE  0x0a
  55 #define         QCOM_SCM_FLUSH_FLAG_MASK        0x3
  56
  57 /* Flags for QCOM_SCM_BOOT_SET_ADDR argv[0] */
  58 /* Note: no COLDBOOT for CPU0, it's already booted */
  59 #define         QCOM_SCM_FLAG_COLDBOOT_CPU1     0x01
  60 #define         QCOM_SCM_FLAG_WARMBOOT_CPU1     0x02
  61 #define         QCOM_SCM_FLAG_WARMBOOT_CPU0     0x04
  62 #define         QCOM_SCM_FLAG_COLDBOOT_CPU2     0x08
  63 #define         QCOM_SCM_FLAG_WARMBOOT_CPU2     0x10
  64 #define         QCOM_SCM_FLAG_COLDBOOT_CPU3     0x20
  65 #define         QCOM_SCM_FLAG_WARMBOOT_CPU3     0x40
  66
  67 #define QCOM_SCM_SVC_PIL                        0x02
  68 #define         QCOM_SCM_PIL_PAS_INIT_IMAGE     0x01
  69 #define         QCOM_SCM_PIL_PAS_MEM_SETUP      0x02
  70 #define         QCOM_SCM_PIL_PAS_AUTH_AND_RESET 0x05
  71 #define         QCOM_SCM_PIL_PAS_SHUTDOWN       0x06
  72 #define         QCOM_SCM_PIL_PAS_IS_SUPPORTED   0x07
  73 #define         QCOM_SCM_PIL_PAS_MSS_RESET      0x0a
  74
  75 #define QCOM_SCM_SVC_IO                         0x05
  76 #define         QCOM_SCM_IO_READ                0x01
  77 #define         QCOM_SCM_IO_WRITE               0x02
  78
  79 /*
  80  * Fetch SCM call availability information.
  81  */
  82 #define QCOM_SCM_SVC_INFO                       0x06
  83 #define         QCOM_SCM_INFO_IS_CALL_AVAIL     0x01
  84
  85 #define QCOM_SCM_SVC_MP                         0x0c
  86 #define         QCOM_SCM_MP_RESTORE_SEC_CFG     0x02
  87 #define         QCOM_SCM_MP_IOMMU_SECURE_PTBL_SIZE      0x03
  88 #define         QCOM_SCM_MP_IOMMU_SECURE_PTBL_INIT      0x04
  89 #define         QCOM_SCM_MP_VIDEO_VAR           0x08
  90 #define         QCOM_SCM_MP_ASSIGN              0x16
  91
  92 #define QCOM_SCM_SVC_OCMEM                      0x0f
  93 #define         QCOM_SCM_OCMEM_LOCK_CMD         0x01
  94 #define         QCOM_SCM_OCMEM_UNLOCK_CMD       0x02
  95
  96 #define QCOM_SCM_SVC_ES                         0x10
  97 #define         QCOM_SCM_ES_INVALIDATE_ICE_KEY  0x03
  98 #define         QCOM_SCM_ES_CONFIG_SET_ICE_KEY  0x04
  99
 100 #define QCOM_SCM_SVC_HDCP                       0x11
 101 #define         QCOM_SCM_HDCP_INVOKE            0x01
 102
 103 #define QCOM_SCM_SVC_LMH                        0x13
 104 #define         QCOM_SCM_LMH_LIMIT_PROFILE_CHANGE       0x01
 105 #define         QCOM_SCM_LMH_LIMIT_DCVSH        0x10
 106
 107 #define QCOM_SCM_SVC_SMMU_PROGRAM               0x15
 108 #define         QCOM_SCM_SMMU_CONFIG_ERRATA1    0x03
 109 #define         QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL 0x02
 110
 111 /*
 112  * Return values from the SCM calls.
 113  */
 114 #define QCOM_SCM_RETVAL_V2_EBUSY                -12
 115 #define QCOM_SCM_RETVAL_ENOMEM                  -5
 116 #define QCOM_SCM_RETVAL_EOPNOTSUPP              -4
 117 #define QCOM_SCM_RETVAL_EINVAL_ADDR             -3
 118 #define QCOM_SCM_RETVAL_EINVAL_ARG              -2
 119 #define QCOM_SCM_RETVAL_ERROR                   -1
 120 #define QCOM_SCM_RETVAL_INTERRUPTED             1
 121
 122 #endif  /* __QCOM_SCM_DEFS_H__ */