2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
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28 #ifndef __QCOM_SCM_LEGACY_DEFS_H__
29 #define __QCOM_SCM_LEGACY_DEFS_H__
32 * These definitions are specific to the 32 bit legacy SCM interface
33 * used by the IPQ806x and IPQ401x SoCs.
37 * Mapping of the SCM service/command fields into the a0 argument
38 * in an SMC instruction call.
40 * This is particular to the legacy SCM interface, and is not the
41 * same as the non-legacy 32/64 bit FNID mapping layout.
43 #define QCOM_SCM_LEGACY_SMC_FNID(s, c) (((s) << 10) | ((c) & 0x3ff))
46 * There are two kinds of SCM calls in this legacy path.
48 * The first kind are the normal ones - up to a defined max of arguments,
49 * a defined max of responses and some identifiers for all of it.
50 * They can be issues in parallel on different cores, can be interrupted,
53 * The second kind are what are termed "atomic" SCM calls -
54 * up to 5 argument DWORDs, up to 3 response DWORDs, done atomically,
55 * not interruptable/parallel.
57 * The former use the structures below to represent the request and response
58 * in memory. The latter use defines and a direct SMC call with the
59 * arguments in registers.
62 struct qcom_scm_legacy_smc_args {
67 * Atomic SCM call command/response buffer definitions.
69 #define QCOM_SCM_LEGACY_ATOMIC_MAX_ARGCOUNT 5
70 #define QCOM_SCM_LEGACY_CLASS_REGISTER (0x2 << 8)
71 #define QCOM_SCM_LEGACY_MASK_IRQS (1U << 5)
74 * Mapping an SCM service/command/argcount into the a0 register
75 * for an SMC instruction call.
77 #define QCOM_SCM_LEGACY_ATOMIC_ID(svc, cmd, n) \
78 ((QCOM_SCM_LEGACY_SMC_FNID((svc), cmd) << 12) | \
79 QCOM_SCM_LEGACY_CLASS_REGISTER | \
80 QCOM_SCM_LEGACY_MASK_IRQS | \
84 * Legacy command/response buffer definitions.
86 * The legacy path contains up to the defined maximum arguments
87 * but only a single command/response pair per call.
89 * A command and response buffer is laid out in memory as such:
92 * | (buffer payload) |
94 * | (response payload) |
100 * len - the length of the total command and response, including
103 * buf_offset - the offset inside the buffer, starting at the
104 * beginning of this command header, where the command buffer
105 * is found. The end is the byte before the response_header_offset.
107 * response_header_offset - the offset inside the buffer where
108 * the response header is found.
110 * id - the QCOM_SCM_LEGACY_SMC_FNID() - service/command ids
112 struct qcom_scm_legacy_command_header {
115 uint32_t response_header_offset;
120 * The response header.
122 * This is found immediately after the command header and command
125 * len - the total amount of memory available for the response.
126 * Linux doesn't set this; it always passes in a response
127 * buffer large enough to store MAX_QCOM_SCM_RETS * DWORD
130 * It's also possible this is set by the firmware.
132 * buf_offset - start of response buffer, relative to the beginning
133 * of the command header. This also isn't set in Linux before
134 * calling the SMC instruction, but it is checked afterwards
135 * to assemble a pointer to the response data. The firmware
138 * is_complete - true if complete. Linux loops over DMA sync to
139 * check if this is complete even after the SMC call returns.
141 struct qcom_scm_legacy_response_header {
144 uint32_t is_complete;
147 #endif /* __QCOM_SCM_LEGACY_DEFS_H__ */