2 * Copyright (c) 2010 Jakub Wojciech Klama <jceel@FreeBSD.org>
3 * Copyright (c) 2015 Hiroki Mori
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include "opt_platform.h"
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/types.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
44 #include <vm/vm_kern.h>
46 #include <vm/vm_page.h>
47 #include <vm/vm_extern.h>
49 #define _ARM32_BUS_DMA_PRIVATE
50 #include <machine/bus.h>
51 #include <machine/intr.h>
53 #include <dev/fdt/fdt_common.h>
54 #include <dev/ofw/openfirm.h>
56 #include <dev/ofw/ofw_bus.h>
57 #include <dev/ofw/ofw_bus_subr.h>
59 #include <arm/ralink/rt1310reg.h>
66 struct rt1310_irqsrc {
67 struct intr_irqsrc ri_isrc;
72 struct rt1310_intc_softc {
74 struct resource * ri_res;
75 bus_space_tag_t ri_bst;
76 bus_space_handle_t ri_bsh;
78 struct rt1310_irqsrc ri_isrcs[INTC_NIRQS];
82 static int rt1310_intc_probe(device_t);
83 static int rt1310_intc_attach(device_t);
85 static void rt1310_intc_eoi(void *);
87 static int rt1310_pic_attach(struct rt1310_intc_softc *sc);
90 static struct rt1310_intc_softc *intc_softc = NULL;
92 #define intc_read_4(_sc, _reg) \
93 bus_space_read_4((_sc)->ri_bst, (_sc)->ri_bsh, (_reg))
94 #define intc_write_4(_sc, _reg, _val) \
95 bus_space_write_4((_sc)->ri_bst, (_sc)->ri_bsh, (_reg), (_val))
97 struct rt1310_irqdef {
102 struct rt1310_irqdef irqdef[INTC_NIRQS] = {
103 {RT_INTC_TRIG_HIGH_LVL, 2}, /* 0 */
104 {RT_INTC_TRIG_HIGH_LVL, 2},
105 {RT_INTC_TRIG_HIGH_LVL, 2},
106 {RT_INTC_TRIG_HIGH_LVL, 1},
107 {RT_INTC_TRIG_HIGH_LVL, 2},
108 {RT_INTC_TRIG_HIGH_LVL, 1},
109 {RT_INTC_TRIG_HIGH_LVL, 1},
110 {RT_INTC_TRIG_HIGH_LVL, 1},
111 {RT_INTC_TRIG_HIGH_LVL, 1}, /* 8 */
112 {RT_INTC_TRIG_HIGH_LVL, 1},
113 {RT_INTC_TRIG_HIGH_LVL, 2},
114 {RT_INTC_TRIG_LOW_LVL, 2},
115 {RT_INTC_TRIG_LOW_LVL, 2},
116 {RT_INTC_TRIG_LOW_LVL, 4},
117 {RT_INTC_TRIG_HIGH_LVL, 2},
118 {RT_INTC_TRIG_HIGH_LVL, 2},
119 {RT_INTC_TRIG_HIGH_LVL, 2}, /* 16 */
120 {RT_INTC_TRIG_HIGH_LVL, 2},
121 {RT_INTC_TRIG_LOW_LVL, 2},
122 {RT_INTC_TRIG_LOW_LVL, 2},
123 {RT_INTC_TRIG_LOW_LVL, 2},
124 {RT_INTC_TRIG_LOW_LVL, 2},
125 {RT_INTC_TRIG_NEG_EDGE, 2},
126 {RT_INTC_TRIG_HIGH_LVL, 3},
127 {RT_INTC_TRIG_HIGH_LVL, 2}, /* 24 */
128 {RT_INTC_TRIG_POS_EDGE, 2},
129 {RT_INTC_TRIG_POS_EDGE, 2},
130 {RT_INTC_TRIG_HIGH_LVL, 2},
131 {RT_INTC_TRIG_HIGH_LVL, 2},
132 {RT_INTC_TRIG_POS_EDGE, 2},
133 {RT_INTC_TRIG_POS_EDGE, 3},
134 {RT_INTC_TRIG_POS_EDGE, 3},
138 rt1310_intc_probe(device_t dev)
140 if (!ofw_bus_status_okay(dev))
143 if (!ofw_bus_is_compatible_strict(dev, "rt,pic"))
147 device_set_desc(dev, "RT1310 INTRNG Interrupt Controller");
149 device_set_desc(dev, "RT1310 Interrupt Controller");
151 return (BUS_PROBE_DEFAULT);
155 rt1310_intc_attach(device_t dev)
157 struct rt1310_intc_softc *sc = device_get_softc(dev);
166 sc->ri_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
169 device_printf(dev, "could not alloc resources\n");
173 sc->ri_bst = rman_get_bustag(sc->ri_res);
174 sc->ri_bsh = rman_get_bushandle(sc->ri_res);
177 arm_post_filter = rt1310_intc_eoi;
179 rt1310_pic_attach(sc);
182 intc_write_4(sc, RT_INTC_IECR, 0);
183 intc_write_4(sc, RT_INTC_ICCR, ~0);
185 for (i = 0; i <= INTC_NIRQS; ++i) {
186 intc_write_4(sc, RT_INTC_SCR0+i*4,
187 (irqdef[i].ri_trig << RT_INTC_TRIG_SHIF) |
189 intc_write_4(sc, RT_INTC_SVR0+i*4, i);
192 /* Clear interrupt status registers and disable all interrupts */
193 intc_write_4(sc, RT_INTC_ICCR, ~0);
194 intc_write_4(sc, RT_INTC_IMR, 0);
200 arm_get_next_irq(int last)
202 struct rt1310_intc_softc *sc = intc_softc;
205 value = intc_read_4(sc, RT_INTC_IPR);
206 for (i = 0; i < 32; i++) {
207 if (value & (1 << i))
215 arm_mask_irq(uintptr_t nb)
217 struct rt1310_intc_softc *sc = intc_softc;
220 /* Make sure that interrupt isn't active already */
221 rt1310_intc_eoi((void *)nb);
223 /* Clear bit in ER register */
224 value = intc_read_4(sc, RT_INTC_IECR);
226 intc_write_4(sc, RT_INTC_IECR, value);
227 intc_write_4(sc, RT_INTC_IMR, value);
229 intc_write_4(sc, RT_INTC_ICCR, 1 << nb);
233 arm_unmask_irq(uintptr_t nb)
235 struct rt1310_intc_softc *sc = intc_softc;
238 value = intc_read_4(sc, RT_INTC_IECR);
242 intc_write_4(sc, RT_INTC_IMR, value);
243 intc_write_4(sc, RT_INTC_IECR, value);
247 rt1310_intc_eoi(void *data)
249 struct rt1310_intc_softc *sc = intc_softc;
252 intc_write_4(sc, RT_INTC_ICCR, 1 << nb);
255 value = intc_read_4(sc, RT_INTC_IECR);
257 intc_write_4(sc, RT_INTC_IECR, value);
258 intc_write_4(sc, RT_INTC_IMR, value);
265 rt1310_enable_intr(device_t dev, struct intr_irqsrc *isrc)
269 struct rt1310_intc_softc *sc;
272 irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
274 value = intc_read_4(sc, RT_INTC_IECR);
278 intc_write_4(sc, RT_INTC_IMR, value);
279 intc_write_4(sc, RT_INTC_IECR, value);
283 rt1310_disable_intr(device_t dev, struct intr_irqsrc *isrc)
287 struct rt1310_intc_softc *sc;
290 irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
292 /* Clear bit in ER register */
293 value = intc_read_4(sc, RT_INTC_IECR);
294 value &= ~(1 << irq);
295 intc_write_4(sc, RT_INTC_IECR, value);
296 intc_write_4(sc, RT_INTC_IMR, value);
298 intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
302 rt1310_map_intr(device_t dev, struct intr_map_data *data,
303 struct intr_irqsrc **isrcp)
305 struct intr_map_data_fdt *daf;
306 struct rt1310_intc_softc *sc;
308 if (data->type != INTR_MAP_DATA_FDT)
311 daf = (struct intr_map_data_fdt *)data;
313 if (daf->ncells != 1 || daf->cells[0] >= INTC_NIRQS)
316 sc = device_get_softc(dev);
317 *isrcp = &sc->ri_isrcs[daf->cells[0]].ri_isrc;
322 rt1310_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
324 arm_irq_memory_barrier(0);
325 rt1310_disable_intr(dev, isrc);
329 rt1310_post_ithread(device_t dev, struct intr_irqsrc *isrc)
331 arm_irq_memory_barrier(0);
332 rt1310_enable_intr(dev, isrc);
336 rt1310_post_filter(device_t dev, struct intr_irqsrc *isrc)
339 struct rt1310_intc_softc *sc;
341 arm_irq_memory_barrier(0);
343 irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
345 intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
349 rt1310_intr(void *arg)
352 struct rt1310_intc_softc *sc = arg;
354 irq = ffs(intc_read_4(sc, RT_INTC_IPR)) - 1;
356 if (intr_isrc_dispatch(&sc->ri_isrcs[irq].ri_isrc,
357 curthread->td_intr_frame) != 0) {
358 intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
359 device_printf(sc->dev, "Stray irq %u disabled\n", irq);
362 arm_irq_memory_barrier(0);
364 return (FILTER_HANDLED);
368 rt1310_pic_attach(struct rt1310_intc_softc *sc)
370 struct intr_pic *pic;
376 name = device_get_nameunit(sc->dev);
377 for (irq = 0; irq < INTC_NIRQS; irq++) {
378 sc->ri_isrcs[irq].ri_irq = irq;
380 error = intr_isrc_register(&sc->ri_isrcs[irq].ri_isrc,
381 sc->dev, 0, "%s,%u", name, irq);
386 xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
387 pic = intr_pic_register(sc->dev, xref);
391 return (intr_pic_claim_root(sc->dev, xref, rt1310_intr, sc, 0));
395 struct fdt_fixup_entry fdt_fixup_table[] = {
401 fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
404 if (!fdt_is_compatible(node, "lpc,pic"))
407 *interrupt = fdt32_to_cpu(intr[0]);
408 *trig = INTR_TRIGGER_CONFORM;
409 *pol = INTR_POLARITY_CONFORM;
413 fdt_pic_decode_t fdt_pic_table[] = {
419 static device_method_t rt1310_intc_methods[] = {
420 DEVMETHOD(device_probe, rt1310_intc_probe),
421 DEVMETHOD(device_attach, rt1310_intc_attach),
423 DEVMETHOD(pic_disable_intr, rt1310_disable_intr),
424 DEVMETHOD(pic_enable_intr, rt1310_enable_intr),
425 DEVMETHOD(pic_map_intr, rt1310_map_intr),
426 DEVMETHOD(pic_post_filter, rt1310_post_filter),
427 DEVMETHOD(pic_post_ithread, rt1310_post_ithread),
428 DEVMETHOD(pic_pre_ithread, rt1310_pre_ithread),
433 static driver_t rt1310_intc_driver = {
436 sizeof(struct rt1310_intc_softc),
439 static devclass_t rt1310_intc_devclass;
441 EARLY_DRIVER_MODULE(pic, simplebus, rt1310_intc_driver, rt1310_intc_devclass, 0, 0, BUS_PASS_INTERRUPT);