2 * Copyright (c) 2010 Jakub Wojciech Klama <jceel@FreeBSD.org>
3 * Copyright (c) 2015 Hiroki Mori
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include "opt_platform.h"
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/types.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
44 #include <vm/vm_kern.h>
46 #include <vm/vm_page.h>
47 #include <vm/vm_extern.h>
49 #define _ARM32_BUS_DMA_PRIVATE
50 #include <machine/bus.h>
51 #include <machine/intr.h>
53 #include <dev/fdt/fdt_common.h>
54 #include <dev/ofw/openfirm.h>
56 #include <dev/ofw/ofw_bus.h>
57 #include <dev/ofw/ofw_bus_subr.h>
59 #include <arm/ralink/rt1310reg.h>
65 struct rt1310_irqsrc {
66 struct intr_irqsrc ri_isrc;
70 struct rt1310_intc_softc {
72 struct resource * ri_res;
73 bus_space_tag_t ri_bst;
74 bus_space_handle_t ri_bsh;
75 struct rt1310_irqsrc ri_isrcs[INTC_NIRQS];
78 static int rt1310_intc_probe(device_t);
79 static int rt1310_intc_attach(device_t);
80 static int rt1310_pic_attach(struct rt1310_intc_softc *sc);
82 static struct rt1310_intc_softc *intc_softc = NULL;
84 #define intc_read_4(_sc, _reg) \
85 bus_space_read_4((_sc)->ri_bst, (_sc)->ri_bsh, (_reg))
86 #define intc_write_4(_sc, _reg, _val) \
87 bus_space_write_4((_sc)->ri_bst, (_sc)->ri_bsh, (_reg), (_val))
89 struct rt1310_irqdef {
94 struct rt1310_irqdef irqdef[INTC_NIRQS] = {
95 {RT_INTC_TRIG_HIGH_LVL, 2}, /* 0 */
96 {RT_INTC_TRIG_HIGH_LVL, 2},
97 {RT_INTC_TRIG_HIGH_LVL, 2},
98 {RT_INTC_TRIG_HIGH_LVL, 1},
99 {RT_INTC_TRIG_HIGH_LVL, 2},
100 {RT_INTC_TRIG_HIGH_LVL, 1},
101 {RT_INTC_TRIG_HIGH_LVL, 1},
102 {RT_INTC_TRIG_HIGH_LVL, 1},
103 {RT_INTC_TRIG_HIGH_LVL, 1}, /* 8 */
104 {RT_INTC_TRIG_HIGH_LVL, 1},
105 {RT_INTC_TRIG_HIGH_LVL, 2},
106 {RT_INTC_TRIG_LOW_LVL, 2},
107 {RT_INTC_TRIG_LOW_LVL, 2},
108 {RT_INTC_TRIG_LOW_LVL, 4},
109 {RT_INTC_TRIG_HIGH_LVL, 2},
110 {RT_INTC_TRIG_HIGH_LVL, 2},
111 {RT_INTC_TRIG_HIGH_LVL, 2}, /* 16 */
112 {RT_INTC_TRIG_HIGH_LVL, 2},
113 {RT_INTC_TRIG_LOW_LVL, 2},
114 {RT_INTC_TRIG_LOW_LVL, 2},
115 {RT_INTC_TRIG_LOW_LVL, 2},
116 {RT_INTC_TRIG_LOW_LVL, 2},
117 {RT_INTC_TRIG_NEG_EDGE, 2},
118 {RT_INTC_TRIG_HIGH_LVL, 3},
119 {RT_INTC_TRIG_HIGH_LVL, 2}, /* 24 */
120 {RT_INTC_TRIG_POS_EDGE, 2},
121 {RT_INTC_TRIG_POS_EDGE, 2},
122 {RT_INTC_TRIG_HIGH_LVL, 2},
123 {RT_INTC_TRIG_HIGH_LVL, 2},
124 {RT_INTC_TRIG_POS_EDGE, 2},
125 {RT_INTC_TRIG_POS_EDGE, 3},
126 {RT_INTC_TRIG_POS_EDGE, 3},
130 rt1310_intc_probe(device_t dev)
132 if (!ofw_bus_status_okay(dev))
135 if (!ofw_bus_is_compatible_strict(dev, "rt,pic"))
138 device_set_desc(dev, "RT1310 Interrupt Controller");
139 return (BUS_PROBE_DEFAULT);
143 rt1310_intc_attach(device_t dev)
145 struct rt1310_intc_softc *sc = device_get_softc(dev);
154 sc->ri_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
157 device_printf(dev, "could not alloc resources\n");
161 sc->ri_bst = rman_get_bustag(sc->ri_res);
162 sc->ri_bsh = rman_get_bushandle(sc->ri_res);
164 rt1310_pic_attach(sc);
166 intc_write_4(sc, RT_INTC_IECR, 0);
167 intc_write_4(sc, RT_INTC_ICCR, ~0);
169 for (i = 0; i <= INTC_NIRQS; ++i) {
170 intc_write_4(sc, RT_INTC_SCR0+i*4,
171 (irqdef[i].ri_trig << RT_INTC_TRIG_SHIF) |
173 intc_write_4(sc, RT_INTC_SVR0+i*4, i);
176 /* Clear interrupt status registers and disable all interrupts */
177 intc_write_4(sc, RT_INTC_ICCR, ~0);
178 intc_write_4(sc, RT_INTC_IMR, 0);
183 rt1310_enable_intr(device_t dev, struct intr_irqsrc *isrc)
187 struct rt1310_intc_softc *sc;
190 irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
192 value = intc_read_4(sc, RT_INTC_IECR);
196 intc_write_4(sc, RT_INTC_IMR, value);
197 intc_write_4(sc, RT_INTC_IECR, value);
201 rt1310_disable_intr(device_t dev, struct intr_irqsrc *isrc)
205 struct rt1310_intc_softc *sc;
208 irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
210 /* Clear bit in ER register */
211 value = intc_read_4(sc, RT_INTC_IECR);
212 value &= ~(1 << irq);
213 intc_write_4(sc, RT_INTC_IECR, value);
214 intc_write_4(sc, RT_INTC_IMR, value);
216 intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
220 rt1310_map_intr(device_t dev, struct intr_map_data *data,
221 struct intr_irqsrc **isrcp)
223 struct intr_map_data_fdt *daf;
224 struct rt1310_intc_softc *sc;
226 if (data->type != INTR_MAP_DATA_FDT)
229 daf = (struct intr_map_data_fdt *)data;
231 if (daf->ncells != 1 || daf->cells[0] >= INTC_NIRQS)
234 sc = device_get_softc(dev);
235 *isrcp = &sc->ri_isrcs[daf->cells[0]].ri_isrc;
240 rt1310_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
242 arm_irq_memory_barrier(0);
243 rt1310_disable_intr(dev, isrc);
247 rt1310_post_ithread(device_t dev, struct intr_irqsrc *isrc)
249 arm_irq_memory_barrier(0);
250 rt1310_enable_intr(dev, isrc);
254 rt1310_post_filter(device_t dev, struct intr_irqsrc *isrc)
257 struct rt1310_intc_softc *sc;
259 arm_irq_memory_barrier(0);
261 irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
263 intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
267 rt1310_intr(void *arg)
270 struct rt1310_intc_softc *sc = arg;
272 irq = ffs(intc_read_4(sc, RT_INTC_IPR)) - 1;
274 if (intr_isrc_dispatch(&sc->ri_isrcs[irq].ri_isrc,
275 curthread->td_intr_frame) != 0) {
276 intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
277 device_printf(sc->dev, "Stray irq %u disabled\n", irq);
280 arm_irq_memory_barrier(0);
282 return (FILTER_HANDLED);
286 rt1310_pic_attach(struct rt1310_intc_softc *sc)
288 struct intr_pic *pic;
294 name = device_get_nameunit(sc->dev);
295 for (irq = 0; irq < INTC_NIRQS; irq++) {
296 sc->ri_isrcs[irq].ri_irq = irq;
298 error = intr_isrc_register(&sc->ri_isrcs[irq].ri_isrc,
299 sc->dev, 0, "%s,%u", name, irq);
304 xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
305 pic = intr_pic_register(sc->dev, xref);
309 return (intr_pic_claim_root(sc->dev, xref, rt1310_intr, sc, 0));
312 struct fdt_fixup_entry fdt_fixup_table[] = {
316 static device_method_t rt1310_intc_methods[] = {
317 DEVMETHOD(device_probe, rt1310_intc_probe),
318 DEVMETHOD(device_attach, rt1310_intc_attach),
319 DEVMETHOD(pic_disable_intr, rt1310_disable_intr),
320 DEVMETHOD(pic_enable_intr, rt1310_enable_intr),
321 DEVMETHOD(pic_map_intr, rt1310_map_intr),
322 DEVMETHOD(pic_post_filter, rt1310_post_filter),
323 DEVMETHOD(pic_post_ithread, rt1310_post_ithread),
324 DEVMETHOD(pic_pre_ithread, rt1310_pre_ithread),
328 static driver_t rt1310_intc_driver = {
331 sizeof(struct rt1310_intc_softc),
334 static devclass_t rt1310_intc_devclass;
336 EARLY_DRIVER_MODULE(pic, simplebus, rt1310_intc_driver, rt1310_intc_devclass, 0, 0, BUS_PASS_INTERRUPT);