sys/arm/ralink/rt1310_timer.c

   1 /*-
   2  * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
   3  * Copyright (c) 2015 Hiroki Mori
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  */
  28 #include <sys/cdefs.h>
  29 __FBSDID("$FreeBSD$");
  30
  31 #include <sys/param.h>
  32 #include <sys/systm.h>
  33 #include <sys/bus.h>
  34 #include <sys/kernel.h>
  35 #include <sys/module.h>
  36 #include <sys/malloc.h>
  37 #include <sys/rman.h>
  38 #include <sys/timetc.h>
  39 #include <sys/timeet.h>
  40 #include <machine/bus.h>
  41 #include <machine/cpu.h>
  42 #include <machine/intr.h>
  43
  44 #include <dev/fdt/fdt_common.h>
  45 #include <dev/ofw/ofw_bus.h>
  46 #include <dev/ofw/ofw_bus_subr.h>
  47
  48 #include <arm/ralink/rt1310reg.h>
  49 #include <arm/ralink/rt1310var.h>
  50
  51 struct rt1310_timer_softc {
  52         device_t                lt_dev;
  53         struct eventtimer       lt_et;
  54         struct resource *       lt_res[8];
  55         bus_space_tag_t         lt_bst0;
  56         bus_space_handle_t      lt_bsh0;
  57         bus_space_tag_t         lt_bst1;
  58         bus_space_handle_t      lt_bsh1;
  59         bus_space_tag_t         lt_bst2;
  60         bus_space_handle_t      lt_bsh2;
  61         bus_space_tag_t         lt_bst3;
  62         bus_space_handle_t      lt_bsh3;
  63         int                     lt_oneshot;
  64         uint32_t                lt_period;
  65 };
  66
  67 static struct resource_spec rt1310_timer_spec[] = {
  68         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
  69         { SYS_RES_MEMORY,       1,      RF_ACTIVE },
  70         { SYS_RES_MEMORY,       2,      RF_ACTIVE },
  71         { SYS_RES_MEMORY,       3,      RF_ACTIVE },
  72         { SYS_RES_IRQ,          0,      RF_ACTIVE },
  73         { SYS_RES_IRQ,          1,      RF_ACTIVE },
  74         { SYS_RES_IRQ,          2,      RF_ACTIVE },
  75         { -1, 0 }
  76 };
  77
  78 static struct rt1310_timer_softc *timer_softc = NULL;
  79 static int rt1310_timer_initialized = 0;
  80 static int rt1310_timer_probe(device_t);
  81 static int rt1310_timer_attach(device_t);
  82 static int rt1310_timer_start(struct eventtimer *,
  83     sbintime_t first, sbintime_t period);
  84 static int rt1310_timer_stop(struct eventtimer *et);
  85 static unsigned rt1310_get_timecount(struct timecounter *);
  86 static int rt1310_hardclock(void *);
  87
  88 #define timer0_read_4(sc, reg)                  \
  89     bus_space_read_4(sc->lt_bst0, sc->lt_bsh0, reg)
  90 #define timer0_write_4(sc, reg, val)            \
  91     bus_space_write_4(sc->lt_bst0, sc->lt_bsh0, reg, val)
  92 #define timer0_clear(sc)                        \
  93     do {                                        \
  94             timer0_write_4(sc, RT_TIMER_LOAD, 0);       \
  95             timer0_write_4(sc, RT_TIMER_VALUE, 0);      \
  96     } while(0)
  97
  98 #define timer1_read_4(sc, reg)                  \
  99     bus_space_read_4(sc->lt_bst1, sc->lt_bsh1, reg)
 100 #define timer1_write_4(sc, reg, val)            \
 101     bus_space_write_4(sc->lt_bst1, sc->lt_bsh1, reg, val)
 102 #define timer1_clear(sc)                        \
 103     do {                                        \
 104             timer1_write_4(sc, RT_TIMER_LOAD, 0);       \
 105             timer1_write_4(sc, RT_TIMER_VALUE, 0);      \
 106     } while(0)
 107
 108 #define timer2_read_4(sc, reg)                  \
 109     bus_space_read_4(sc->lt_bst1, sc->lt_bsh2, reg)
 110 #define timer2_write_4(sc, reg, val)            \
 111     bus_space_write_4(sc->lt_bst2, sc->lt_bsh2, reg, val)
 112 #define timer3_write_4(sc, reg, val)            \
 113     bus_space_write_4(sc->lt_bst3, sc->lt_bsh3, reg, val)
 114
 115
 116 static struct timecounter rt1310_timecounter = {
 117         .tc_get_timecount = rt1310_get_timecount,
 118         .tc_name = "RT1310ATimer1",
 119         .tc_frequency = 0, /* will be filled later */
 120         .tc_counter_mask = ~0u,
 121         .tc_quality = 1000,
 122 };
 123
 124 static int
 125 rt1310_timer_probe(device_t dev)
 126 {
 127
 128         if (!ofw_bus_status_okay(dev))
 129                 return (ENXIO);
 130
 131         if (!ofw_bus_is_compatible(dev, "rt,timer"))
 132                 return (ENXIO);
 133
 134         device_set_desc(dev, "RT1310 timer");
 135         return (BUS_PROBE_DEFAULT);
 136 }
 137
 138 static int
 139 rt1310_timer_attach(device_t dev)
 140 {
 141         void *intrcookie;
 142         struct rt1310_timer_softc *sc = device_get_softc(dev);
 143         phandle_t node;
 144         uint32_t freq;
 145
 146         if (timer_softc)
 147                 return (ENXIO);
 148
 149         timer_softc = sc;
 150
 151         if (bus_alloc_resources(dev, rt1310_timer_spec, sc->lt_res)) {
 152                 device_printf(dev, "could not allocate resources\n");
 153                 return (ENXIO);
 154         }
 155
 156         sc->lt_bst0 = rman_get_bustag(sc->lt_res[0]);
 157         sc->lt_bsh0 = rman_get_bushandle(sc->lt_res[0]);
 158         sc->lt_bst1 = rman_get_bustag(sc->lt_res[1]);
 159         sc->lt_bsh1 = rman_get_bushandle(sc->lt_res[1]);
 160         sc->lt_bst2 = rman_get_bustag(sc->lt_res[2]);
 161         sc->lt_bsh2 = rman_get_bushandle(sc->lt_res[2]);
 162         sc->lt_bst3 = rman_get_bustag(sc->lt_res[3]);
 163         sc->lt_bsh3 = rman_get_bushandle(sc->lt_res[3]);
 164
 165         /* Timer2 interrupt */
 166         if (bus_setup_intr(dev, sc->lt_res[6], INTR_TYPE_CLK,
 167             rt1310_hardclock, NULL, sc, &intrcookie)) {
 168                 device_printf(dev, "could not setup interrupt handler\n");
 169                 bus_release_resources(dev, rt1310_timer_spec, sc->lt_res);
 170                 return (ENXIO);
 171         }
 172
 173         /* Enable timer clock */
 174 /*
 175         rt1310_pwr_write(dev, LPC_CLKPWR_TIMCLK_CTRL1,
 176             LPC_CLKPWR_TIMCLK_CTRL1_TIMER0 |
 177             LPC_CLKPWR_TIMCLK_CTRL1_TIMER1);
 178 */
 179
 180         /* Get PERIPH_CLK encoded in parent bus 'bus-frequency' property */
 181
 182         node = ofw_bus_get_node(dev);
 183         if (OF_getprop(OF_parent(node), "bus-frequency", &freq,
 184             sizeof(pcell_t)) <= 0) {
 185                 bus_release_resources(dev, rt1310_timer_spec, sc->lt_res);
 186                 bus_teardown_intr(dev, sc->lt_res[2], intrcookie);
 187                 device_printf(dev, "could not obtain base clock frequency\n");
 188                 return (ENXIO);
 189         }
 190
 191         freq = fdt32_to_cpu(freq);
 192
 193         /* Set desired frequency in event timer and timecounter */
 194         sc->lt_et.et_frequency = (uint64_t)freq;
 195         rt1310_timecounter.tc_frequency = (uint64_t)freq;
 196
 197         sc->lt_et.et_name = "RT1310ATimer2";
 198         sc->lt_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
 199         sc->lt_et.et_quality = 1000;
 200         sc->lt_et.et_min_period = (0x00000002LLU << 32) / sc->lt_et.et_frequency;
 201         sc->lt_et.et_max_period = (0xfffffffeLLU << 32) / sc->lt_et.et_frequency;
 202         sc->lt_et.et_start = rt1310_timer_start;
 203         sc->lt_et.et_stop = rt1310_timer_stop;
 204         sc->lt_et.et_priv = sc;
 205
 206         et_register(&sc->lt_et);
 207         tc_init(&rt1310_timecounter);
 208
 209         /* Reset and enable timecounter */
 210
 211         timer0_write_4(sc, RT_TIMER_CONTROL, 0);
 212         timer1_write_4(sc, RT_TIMER_CONTROL, 0);
 213         timer2_write_4(sc, RT_TIMER_CONTROL, 0);
 214         timer3_write_4(sc, RT_TIMER_CONTROL, 0);
 215
 216         timer1_write_4(sc, RT_TIMER_LOAD, ~0);
 217         timer1_write_4(sc, RT_TIMER_VALUE, ~0);
 218         timer1_write_4(sc, RT_TIMER_CONTROL,
 219                 RT_TIMER_CTRL_ENABLE | RT_TIMER_CTRL_PERIODCAL);
 220
 221         /* DELAY() now can work properly */
 222         rt1310_timer_initialized = 1;
 223
 224         return (0);
 225 }
 226
 227 static int
 228 rt1310_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
 229 {
 230         struct rt1310_timer_softc *sc = (struct rt1310_timer_softc *)et->et_priv;
 231         uint32_t ticks;
 232
 233         if (period == 0) {
 234                 sc->lt_oneshot = 1;
 235                 sc->lt_period = 0;
 236         } else {
 237                 sc->lt_oneshot = 0;
 238                 sc->lt_period = ((uint32_t)et->et_frequency * period) >> 32;
 239         }
 240
 241         if (first == 0)
 242                 ticks = sc->lt_period;
 243         else
 244                 ticks = ((uint32_t)et->et_frequency * first) >> 32;
 245
 246         /* Reset timer */
 247         timer2_write_4(sc, RT_TIMER_CONTROL, 0);
 248
 249         /* Start timer */
 250         timer2_write_4(sc, RT_TIMER_LOAD, ticks);
 251         timer2_write_4(sc, RT_TIMER_VALUE, ticks);
 252         timer2_write_4(sc, RT_TIMER_CONTROL,
 253                 RT_TIMER_CTRL_ENABLE | RT_TIMER_CTRL_INTCTL);
 254
 255         return (0);
 256 }
 257
 258 static int
 259 rt1310_timer_stop(struct eventtimer *et)
 260 {
 261         struct rt1310_timer_softc *sc = (struct rt1310_timer_softc *)et->et_priv;
 262
 263         timer2_write_4(sc, RT_TIMER_CONTROL, 0);
 264
 265         return (0);
 266 }
 267
 268 static device_method_t rt1310_timer_methods[] = {
 269         DEVMETHOD(device_probe,         rt1310_timer_probe),
 270         DEVMETHOD(device_attach,        rt1310_timer_attach),
 271         { 0, 0 }
 272 };
 273
 274 static driver_t rt1310_timer_driver = {
 275         "timer",
 276         rt1310_timer_methods,
 277         sizeof(struct rt1310_timer_softc),
 278 };
 279
 280 static devclass_t rt1310_timer_devclass;
 281
 282 EARLY_DRIVER_MODULE(timer, simplebus, rt1310_timer_driver, rt1310_timer_devclass, 0, 0, BUS_PASS_TIMER);
 283
 284 static int
 285 rt1310_hardclock(void *arg)
 286 {
 287         struct rt1310_timer_softc *sc = (struct rt1310_timer_softc *)arg;
 288
 289         /* Reset pending interrupt */
 290         timer2_write_4(sc, RT_TIMER_CONTROL,
 291             timer2_read_4(sc, RT_TIMER_CONTROL) | 0x08);
 292         timer2_write_4(sc, RT_TIMER_CONTROL,
 293             timer2_read_4(sc, RT_TIMER_CONTROL) & 0x1fb);
 294
 295         /* Start timer again */
 296         if (!sc->lt_oneshot) {
 297                 timer2_write_4(sc, RT_TIMER_LOAD, sc->lt_period);
 298                 timer2_write_4(sc, RT_TIMER_VALUE, sc->lt_period);
 299                 timer2_write_4(sc, RT_TIMER_CONTROL,
 300                         RT_TIMER_CTRL_ENABLE | RT_TIMER_CTRL_INTCTL);
 301         }
 302
 303         if (sc->lt_et.et_active)
 304                 sc->lt_et.et_event_cb(&sc->lt_et, sc->lt_et.et_arg);
 305
 306         return (FILTER_HANDLED);
 307 }
 308
 309 static unsigned
 310 rt1310_get_timecount(struct timecounter *tc)
 311 {
 312         return ~timer1_read_4(timer_softc, RT_TIMER_VALUE);
 313 }
 314
 315 void
 316 DELAY(int usec)
 317 {
 318         uint32_t counter;
 319         uint32_t first, last;
 320         int val = (rt1310_timecounter.tc_frequency / 1000000 + 1) * usec;
 321
 322         /* Timer is not initialized yet */
 323         if (!rt1310_timer_initialized) {
 324                 for (; usec > 0; usec--)
 325                         for (counter = 100; counter > 0; counter--)
 326                                 ;
 327                 return;
 328         }
 329         TSENTER();
 330
 331         first = rt1310_get_timecount(&rt1310_timecounter);
 332         while (val > 0) {
 333                 last = rt1310_get_timecount(&rt1310_timecounter);
 334                 if (last < first) {
 335                         /* Timer rolled over */
 336                         last = first;
 337                 }
 338
 339                 val -= (last - first);
 340                 first = last;
 341         }
 342         TSEXIT();
 343 }