2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
4 * Copyright (c) 2012 Luiz Otavio O Souza.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
40 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/cpufunc.h>
46 #include <machine/resource.h>
47 #include <machine/intr.h>
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/gpio/gpiobusvar.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
56 #include "rk30xx_grf.h"
57 #include "rk30xx_pmu.h"
60 * RK3188 has 4 banks of gpio.
62 * PA0 - PA7 | PB0 - PB7
63 * PC0 - PC7 | PD0 - PD7
66 #define RK30_GPIO_PINS 32
67 #define RK30_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
68 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
70 #define RK30_GPIO_NONE 0
71 #define RK30_GPIO_PULLUP 1
72 #define RK30_GPIO_PULLDOWN 2
74 struct rk30_gpio_softc {
78 struct resource * sc_mem_res;
79 struct resource * sc_irq_res;
80 bus_space_tag_t sc_bst;
81 bus_space_handle_t sc_bsh;
85 struct gpio_pin sc_gpio_pins[RK30_GPIO_PINS];
88 /* We use our base address to find out our bank number. */
89 static unsigned long rk30_gpio_base_addr[4] =
90 { 0x2000a000, 0x2003c000, 0x2003e000, 0x20080000 };
91 static struct rk30_gpio_softc *rk30_gpio_sc = NULL;
93 typedef int (*gpios_phandler_t)(phandle_t, pcell_t *, int);
95 struct gpio_ctrl_entry {
97 gpios_phandler_t handler;
100 int rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len);
101 static int rk30_gpio_init(void);
103 struct gpio_ctrl_entry gpio_controllers[] = {
104 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
105 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
106 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
107 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
111 #define RK30_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
112 #define RK30_GPIO_UNLOCK(_sc) mtx_unlock(&_sc->sc_mtx)
113 #define RK30_GPIO_LOCK_ASSERT(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
115 #define RK30_GPIO_SWPORT_DR 0x00
116 #define RK30_GPIO_SWPORT_DDR 0x04
117 #define RK30_GPIO_INTEN 0x30
118 #define RK30_GPIO_INTMASK 0x34
119 #define RK30_GPIO_INTTYPE_LEVEL 0x38
120 #define RK30_GPIO_INT_POLARITY 0x3c
121 #define RK30_GPIO_INT_STATUS 0x40
122 #define RK30_GPIO_INT_RAWSTATUS 0x44
123 #define RK30_GPIO_DEBOUNCE 0x48
124 #define RK30_GPIO_PORT_EOI 0x4c
125 #define RK30_GPIO_EXT_PORT 0x50
126 #define RK30_GPIO_LS_SYNC 0x60
128 #define RK30_GPIO_WRITE(_sc, _off, _val) \
129 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
130 #define RK30_GPIO_READ(_sc, _off) \
131 bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
134 rk30_gpio_get_function(struct rk30_gpio_softc *sc, uint32_t pin)
137 if (RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DDR) & (1U << pin))
138 return (GPIO_PIN_OUTPUT);
140 return (GPIO_PIN_INPUT);
144 rk30_gpio_set_function(struct rk30_gpio_softc *sc, uint32_t pin, uint32_t func)
148 /* Must be called with lock held. */
149 RK30_GPIO_LOCK_ASSERT(sc);
150 data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DDR);
151 if (func == GPIO_PIN_OUTPUT)
154 data &= ~(1U << pin);
155 RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DDR, data);
159 rk30_gpio_set_pud(struct rk30_gpio_softc *sc, uint32_t pin, uint32_t state)
163 /* Must be called with lock held. */
164 RK30_GPIO_LOCK_ASSERT(sc);
166 case GPIO_PIN_PULLUP:
167 pud = RK30_GPIO_PULLUP;
169 case GPIO_PIN_PULLDOWN:
170 pud = RK30_GPIO_PULLDOWN;
173 pud = RK30_GPIO_NONE;
176 * The pull up/down registers for GPIO0A and half of GPIO0B
177 * (the first 12 pins on bank 0) are at a different location.
179 if (sc->sc_bank == 0 && pin < 12)
180 rk30_pmu_gpio_pud(pin, pud);
182 rk30_grf_gpio_pud(sc->sc_bank, pin, pud);
186 rk30_gpio_pin_configure(struct rk30_gpio_softc *sc, struct gpio_pin *pin,
192 * Manage input/output.
194 if (flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) {
195 pin->gp_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
196 if (flags & GPIO_PIN_OUTPUT)
197 pin->gp_flags |= GPIO_PIN_OUTPUT;
199 pin->gp_flags |= GPIO_PIN_INPUT;
200 rk30_gpio_set_function(sc, pin->gp_pin, pin->gp_flags);
202 /* Manage Pull-up/pull-down. */
203 pin->gp_flags &= ~(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
204 if (flags & (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)) {
205 if (flags & GPIO_PIN_PULLUP)
206 pin->gp_flags |= GPIO_PIN_PULLUP;
208 pin->gp_flags |= GPIO_PIN_PULLDOWN;
210 rk30_gpio_set_pud(sc, pin->gp_pin, pin->gp_flags);
211 RK30_GPIO_UNLOCK(sc);
215 rk30_gpio_get_bus(device_t dev)
217 struct rk30_gpio_softc *sc;
219 sc = device_get_softc(dev);
221 return (sc->sc_busdev);
225 rk30_gpio_pin_max(device_t dev, int *maxpin)
228 *maxpin = RK30_GPIO_PINS - 1;
233 rk30_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
235 struct rk30_gpio_softc *sc = device_get_softc(dev);
238 for (i = 0; i < sc->sc_gpio_npins; i++) {
239 if (sc->sc_gpio_pins[i].gp_pin == pin)
243 if (i >= sc->sc_gpio_npins)
247 *caps = sc->sc_gpio_pins[i].gp_caps;
248 RK30_GPIO_UNLOCK(sc);
254 rk30_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
256 struct rk30_gpio_softc *sc = device_get_softc(dev);
259 for (i = 0; i < sc->sc_gpio_npins; i++) {
260 if (sc->sc_gpio_pins[i].gp_pin == pin)
264 if (i >= sc->sc_gpio_npins)
268 *flags = sc->sc_gpio_pins[i].gp_flags;
269 RK30_GPIO_UNLOCK(sc);
275 rk30_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
277 struct rk30_gpio_softc *sc = device_get_softc(dev);
280 for (i = 0; i < sc->sc_gpio_npins; i++) {
281 if (sc->sc_gpio_pins[i].gp_pin == pin)
285 if (i >= sc->sc_gpio_npins)
289 memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
290 RK30_GPIO_UNLOCK(sc);
296 rk30_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
298 struct rk30_gpio_softc *sc = device_get_softc(dev);
301 for (i = 0; i < sc->sc_gpio_npins; i++) {
302 if (sc->sc_gpio_pins[i].gp_pin == pin)
306 if (i >= sc->sc_gpio_npins)
309 rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
315 rk30_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
318 struct rk30_gpio_softc *sc;
321 sc = device_get_softc(dev);
322 for (i = 0; i < sc->sc_gpio_npins; i++) {
323 if (sc->sc_gpio_pins[i].gp_pin == pin)
326 if (i >= sc->sc_gpio_npins)
329 data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
333 data &= ~(1U << pin);
334 RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
335 RK30_GPIO_UNLOCK(sc);
341 rk30_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
344 struct rk30_gpio_softc *sc;
347 sc = device_get_softc(dev);
348 for (i = 0; i < sc->sc_gpio_npins; i++) {
349 if (sc->sc_gpio_pins[i].gp_pin == pin)
352 if (i >= sc->sc_gpio_npins)
355 data = RK30_GPIO_READ(sc, RK30_GPIO_EXT_PORT);
356 RK30_GPIO_UNLOCK(sc);
357 *val = (data & (1U << pin)) ? 1 : 0;
363 rk30_gpio_pin_toggle(device_t dev, uint32_t pin)
366 struct rk30_gpio_softc *sc;
369 sc = device_get_softc(dev);
370 for (i = 0; i < sc->sc_gpio_npins; i++) {
371 if (sc->sc_gpio_pins[i].gp_pin == pin)
374 if (i >= sc->sc_gpio_npins)
377 data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
378 if (data & (1U << pin))
379 data &= ~(1U << pin);
382 RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
383 RK30_GPIO_UNLOCK(sc);
389 rk30_gpio_probe(device_t dev)
392 if (!ofw_bus_status_okay(dev))
395 if (!ofw_bus_is_compatible(dev, "rockchip,rk30xx-gpio"))
398 device_set_desc(dev, "Rockchip RK30XX GPIO controller");
399 return (BUS_PROBE_DEFAULT);
403 rk30_gpio_attach(device_t dev)
405 struct rk30_gpio_softc *sc = device_get_softc(dev);
413 mtx_init(&sc->sc_mtx, "rk30 gpio", "gpio", MTX_DEF);
416 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
418 if (!sc->sc_mem_res) {
419 device_printf(dev, "cannot allocate memory window\n");
422 sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
423 sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
424 /* Check the unit we are attaching by our base address. */
426 start = rman_get_start(sc->sc_mem_res);
427 for (i = 0; i < nitems(rk30_gpio_base_addr); i++) {
428 if (rk30_gpio_base_addr[i] == start) {
433 if (sc->sc_bank == -1) {
435 "unsupported device unit (only GPIO0..3 are supported)\n");
440 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
442 if (!sc->sc_irq_res) {
443 device_printf(dev, "cannot allocate interrupt\n");
448 gpio = ofw_bus_get_node(sc->sc_dev);
450 if (!OF_hasprop(gpio, "gpio-controller"))
451 /* Node is not a GPIO controller. */
454 /* Initialize the software controlled pins. */
455 for (i = 0; i < RK30_GPIO_PINS; i++) {
456 snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
458 sc->sc_gpio_pins[i].gp_pin = i;
459 sc->sc_gpio_pins[i].gp_caps = RK30_GPIO_DEFAULT_CAPS;
460 sc->sc_gpio_pins[i].gp_flags = rk30_gpio_get_function(sc, i);
462 sc->sc_gpio_npins = i;
465 sc->sc_busdev = gpiobus_attach_bus(dev);
466 if (sc->sc_busdev == NULL)
473 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
475 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
476 mtx_destroy(&sc->sc_mtx);
482 rk30_gpio_detach(device_t dev)
488 static device_method_t rk30_gpio_methods[] = {
489 /* Device interface */
490 DEVMETHOD(device_probe, rk30_gpio_probe),
491 DEVMETHOD(device_attach, rk30_gpio_attach),
492 DEVMETHOD(device_detach, rk30_gpio_detach),
495 DEVMETHOD(gpio_get_bus, rk30_gpio_get_bus),
496 DEVMETHOD(gpio_pin_max, rk30_gpio_pin_max),
497 DEVMETHOD(gpio_pin_getname, rk30_gpio_pin_getname),
498 DEVMETHOD(gpio_pin_getflags, rk30_gpio_pin_getflags),
499 DEVMETHOD(gpio_pin_getcaps, rk30_gpio_pin_getcaps),
500 DEVMETHOD(gpio_pin_setflags, rk30_gpio_pin_setflags),
501 DEVMETHOD(gpio_pin_get, rk30_gpio_pin_get),
502 DEVMETHOD(gpio_pin_set, rk30_gpio_pin_set),
503 DEVMETHOD(gpio_pin_toggle, rk30_gpio_pin_toggle),
508 static devclass_t rk30_gpio_devclass;
510 static driver_t rk30_gpio_driver = {
513 sizeof(struct rk30_gpio_softc),
516 DRIVER_MODULE(rk30_gpio, simplebus, rk30_gpio_driver, rk30_gpio_devclass, 0, 0);
519 rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len)
521 struct rk30_gpio_softc *sc;
523 int inc, t, tuples, tuple_size;
524 int dir, flags, pin, i;
525 u_long gpio_ctrl, size;
531 if (OF_getprop(ctrl, "#gpio-cells", &gpio_cells, sizeof(pcell_t)) < 0)
534 gpio_cells = fdt32_to_cpu(gpio_cells);
538 tuple_size = gpio_cells * sizeof(pcell_t) + sizeof(phandle_t);
539 tuples = len / tuple_size;
541 if (fdt_regsize(ctrl, &gpio_ctrl, &size))
545 * Skip controller reference, since controller's phandle is given
546 * explicitly (in a function argument).
548 inc = sizeof(ihandle_t) / sizeof(pcell_t);
550 for (t = 0; t < tuples; t++) {
551 pin = fdt32_to_cpu(gpios[0]);
552 dir = fdt32_to_cpu(gpios[1]);
553 flags = fdt32_to_cpu(gpios[2]);
555 for (i = 0; i < sc->sc_gpio_npins; i++) {
556 if (sc->sc_gpio_pins[i].gp_pin == pin)
559 if (i >= sc->sc_gpio_npins)
562 rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
566 rk30_gpio_pin_set(sc->sc_dev, pin, GPIO_PIN_INPUT);
569 rk30_gpio_pin_set(sc->sc_dev, pin, GPIO_PIN_OUTPUT);
571 gpios += gpio_cells + inc;
577 #define MAX_PINS_PER_NODE 5
578 #define GPIOS_PROP_CELLS 4
583 phandle_t child, parent, root, ctrl;
584 pcell_t gpios[MAX_PINS_PER_NODE * GPIOS_PROP_CELLS];
585 struct gpio_ctrl_entry *e;
588 root = OF_finddevice("/");
592 /* Traverse through entire tree to find nodes with 'gpios' prop */
593 for (child = OF_child(parent); child != 0; child = OF_peer(child)) {
595 /* Find a 'leaf'. Start the search from this node. */
596 while (OF_child(child)) {
598 child = OF_child(child);
600 if ((len = OF_getproplen(child, "gpios")) > 0) {
602 if (len > sizeof(gpios))
605 /* Get 'gpios' property. */
606 OF_getprop(child, "gpios", &gpios, len);
608 e = (struct gpio_ctrl_entry *)&gpio_controllers;
610 /* Find and call a handler. */
611 for (; e->compat; e++) {
613 * First cell of 'gpios' property should
614 * contain a ref. to a node defining GPIO
617 ctrl = OF_node_from_xref(fdt32_to_cpu(gpios[0]));
619 if (fdt_is_compatible(ctrl, e->compat))
620 /* Call a handler. */
621 if ((rv = e->handler(ctrl,
622 (pcell_t *)&gpios, len)))
627 if (OF_peer(child) == 0) {
628 /* No more siblings. */
630 parent = OF_parent(child);