2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
4 * Copyright (c) 2012 Luiz Otavio O Souza.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
40 #include <sys/mutex.h>
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/cpufunc.h>
46 #include <machine/resource.h>
47 #include <machine/fdt.h>
48 #include <machine/intr.h>
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/gpio/gpiobusvar.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
57 #include "rk30xx_grf.h"
58 #include "rk30xx_pmu.h"
61 * RK3188 has 4 banks of gpio.
63 * PA0 - PA7 | PB0 - PB7
64 * PC0 - PC7 | PD0 - PD7
67 #define RK30_GPIO_PINS 32
68 #define RK30_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
69 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
71 #define RK30_GPIO_NONE 0
72 #define RK30_GPIO_PULLUP 1
73 #define RK30_GPIO_PULLDOWN 2
75 struct rk30_gpio_softc {
79 struct resource * sc_mem_res;
80 struct resource * sc_irq_res;
81 bus_space_tag_t sc_bst;
82 bus_space_handle_t sc_bsh;
86 struct gpio_pin sc_gpio_pins[RK30_GPIO_PINS];
89 /* We use our base address to find out our bank number. */
90 static unsigned long rk30_gpio_base_addr[4] =
91 { 0x2000a000, 0x2003c000, 0x2003e000, 0x20080000 };
92 static struct rk30_gpio_softc *rk30_gpio_sc = NULL;
94 typedef int (*gpios_phandler_t)(phandle_t, pcell_t *, int);
96 struct gpio_ctrl_entry {
98 gpios_phandler_t handler;
101 int rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len);
102 static int rk30_gpio_init(void);
104 struct gpio_ctrl_entry gpio_controllers[] = {
105 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
106 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
107 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
108 { "rockchip,rk30xx-gpio", &rk30_gpios_prop_handle },
112 #define RK30_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
113 #define RK30_GPIO_UNLOCK(_sc) mtx_unlock(&_sc->sc_mtx)
114 #define RK30_GPIO_LOCK_ASSERT(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
116 #define RK30_GPIO_SWPORT_DR 0x00
117 #define RK30_GPIO_SWPORT_DDR 0x04
118 #define RK30_GPIO_INTEN 0x30
119 #define RK30_GPIO_INTMASK 0x34
120 #define RK30_GPIO_INTTYPE_LEVEL 0x38
121 #define RK30_GPIO_INT_POLARITY 0x3c
122 #define RK30_GPIO_INT_STATUS 0x40
123 #define RK30_GPIO_INT_RAWSTATUS 0x44
124 #define RK30_GPIO_DEBOUNCE 0x48
125 #define RK30_GPIO_PORT_EOI 0x4c
126 #define RK30_GPIO_EXT_PORT 0x50
127 #define RK30_GPIO_LS_SYNC 0x60
129 #define RK30_GPIO_WRITE(_sc, _off, _val) \
130 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
131 #define RK30_GPIO_READ(_sc, _off) \
132 bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
135 rk30_gpio_get_function(struct rk30_gpio_softc *sc, uint32_t pin)
138 if (RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DDR) & (1U << pin))
139 return (GPIO_PIN_OUTPUT);
141 return (GPIO_PIN_INPUT);
145 rk30_gpio_set_function(struct rk30_gpio_softc *sc, uint32_t pin, uint32_t func)
149 /* Must be called with lock held. */
150 RK30_GPIO_LOCK_ASSERT(sc);
151 data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DDR);
152 if (func == GPIO_PIN_OUTPUT)
155 data &= ~(1U << pin);
156 RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DDR, data);
160 rk30_gpio_set_pud(struct rk30_gpio_softc *sc, uint32_t pin, uint32_t state)
164 /* Must be called with lock held. */
165 RK30_GPIO_LOCK_ASSERT(sc);
167 case GPIO_PIN_PULLUP:
168 pud = RK30_GPIO_PULLUP;
170 case GPIO_PIN_PULLDOWN:
171 pud = RK30_GPIO_PULLDOWN;
174 pud = RK30_GPIO_NONE;
177 * The pull up/down registers for GPIO0A and half of GPIO0B
178 * (the first 12 pins on bank 0) are at a different location.
180 if (sc->sc_bank == 0 && pin < 12)
181 rk30_pmu_gpio_pud(pin, pud);
183 rk30_grf_gpio_pud(sc->sc_bank, pin, pud);
187 rk30_gpio_pin_configure(struct rk30_gpio_softc *sc, struct gpio_pin *pin,
193 * Manage input/output.
195 if (flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) {
196 pin->gp_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
197 if (flags & GPIO_PIN_OUTPUT)
198 pin->gp_flags |= GPIO_PIN_OUTPUT;
200 pin->gp_flags |= GPIO_PIN_INPUT;
201 rk30_gpio_set_function(sc, pin->gp_pin, pin->gp_flags);
203 /* Manage Pull-up/pull-down. */
204 pin->gp_flags &= ~(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
205 if (flags & (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)) {
206 if (flags & GPIO_PIN_PULLUP)
207 pin->gp_flags |= GPIO_PIN_PULLUP;
209 pin->gp_flags |= GPIO_PIN_PULLDOWN;
211 rk30_gpio_set_pud(sc, pin->gp_pin, pin->gp_flags);
212 RK30_GPIO_UNLOCK(sc);
216 rk30_gpio_get_bus(device_t dev)
218 struct rk30_gpio_softc *sc;
220 sc = device_get_softc(dev);
222 return (sc->sc_busdev);
226 rk30_gpio_pin_max(device_t dev, int *maxpin)
229 *maxpin = RK30_GPIO_PINS - 1;
234 rk30_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
236 struct rk30_gpio_softc *sc = device_get_softc(dev);
239 for (i = 0; i < sc->sc_gpio_npins; i++) {
240 if (sc->sc_gpio_pins[i].gp_pin == pin)
244 if (i >= sc->sc_gpio_npins)
248 *caps = sc->sc_gpio_pins[i].gp_caps;
249 RK30_GPIO_UNLOCK(sc);
255 rk30_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
257 struct rk30_gpio_softc *sc = device_get_softc(dev);
260 for (i = 0; i < sc->sc_gpio_npins; i++) {
261 if (sc->sc_gpio_pins[i].gp_pin == pin)
265 if (i >= sc->sc_gpio_npins)
269 *flags = sc->sc_gpio_pins[i].gp_flags;
270 RK30_GPIO_UNLOCK(sc);
276 rk30_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
278 struct rk30_gpio_softc *sc = device_get_softc(dev);
281 for (i = 0; i < sc->sc_gpio_npins; i++) {
282 if (sc->sc_gpio_pins[i].gp_pin == pin)
286 if (i >= sc->sc_gpio_npins)
290 memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
291 RK30_GPIO_UNLOCK(sc);
297 rk30_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
299 struct rk30_gpio_softc *sc = device_get_softc(dev);
302 for (i = 0; i < sc->sc_gpio_npins; i++) {
303 if (sc->sc_gpio_pins[i].gp_pin == pin)
307 if (i >= sc->sc_gpio_npins)
310 rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
316 rk30_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
319 struct rk30_gpio_softc *sc;
322 sc = device_get_softc(dev);
323 for (i = 0; i < sc->sc_gpio_npins; i++) {
324 if (sc->sc_gpio_pins[i].gp_pin == pin)
327 if (i >= sc->sc_gpio_npins)
330 data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
334 data &= ~(1U << pin);
335 RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
336 RK30_GPIO_UNLOCK(sc);
342 rk30_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
345 struct rk30_gpio_softc *sc;
348 sc = device_get_softc(dev);
349 for (i = 0; i < sc->sc_gpio_npins; i++) {
350 if (sc->sc_gpio_pins[i].gp_pin == pin)
353 if (i >= sc->sc_gpio_npins)
356 data = RK30_GPIO_READ(sc, RK30_GPIO_EXT_PORT);
357 RK30_GPIO_UNLOCK(sc);
358 *val = (data & (1U << pin)) ? 1 : 0;
364 rk30_gpio_pin_toggle(device_t dev, uint32_t pin)
367 struct rk30_gpio_softc *sc;
370 sc = device_get_softc(dev);
371 for (i = 0; i < sc->sc_gpio_npins; i++) {
372 if (sc->sc_gpio_pins[i].gp_pin == pin)
375 if (i >= sc->sc_gpio_npins)
378 data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
379 if (data & (1U << pin))
380 data &= ~(1U << pin);
383 RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
384 RK30_GPIO_UNLOCK(sc);
390 rk30_gpio_probe(device_t dev)
393 if (!ofw_bus_status_okay(dev))
396 if (!ofw_bus_is_compatible(dev, "rockchip,rk30xx-gpio"))
399 device_set_desc(dev, "Rockchip RK30XX GPIO controller");
400 return (BUS_PROBE_DEFAULT);
404 rk30_gpio_attach(device_t dev)
406 struct rk30_gpio_softc *sc = device_get_softc(dev);
414 mtx_init(&sc->sc_mtx, "rk30 gpio", "gpio", MTX_DEF);
417 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
419 if (!sc->sc_mem_res) {
420 device_printf(dev, "cannot allocate memory window\n");
423 sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
424 sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
425 /* Check the unit we are attaching by our base address. */
427 start = rman_get_start(sc->sc_mem_res);
428 for (i = 0; i < nitems(rk30_gpio_base_addr); i++) {
429 if (rk30_gpio_base_addr[i] == start) {
434 if (sc->sc_bank == -1) {
436 "unsupported device unit (only GPIO0..3 are supported)\n");
441 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
443 if (!sc->sc_irq_res) {
444 device_printf(dev, "cannot allocate interrupt\n");
449 gpio = ofw_bus_get_node(sc->sc_dev);
451 if (!OF_hasprop(gpio, "gpio-controller"))
452 /* Node is not a GPIO controller. */
455 /* Initialize the software controlled pins. */
456 for (i = 0; i < RK30_GPIO_PINS; i++) {
457 snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
459 sc->sc_gpio_pins[i].gp_pin = i;
460 sc->sc_gpio_pins[i].gp_caps = RK30_GPIO_DEFAULT_CAPS;
461 sc->sc_gpio_pins[i].gp_flags = rk30_gpio_get_function(sc, i);
463 sc->sc_gpio_npins = i;
466 sc->sc_busdev = gpiobus_attach_bus(dev);
467 if (sc->sc_busdev == NULL)
474 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
476 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
477 mtx_destroy(&sc->sc_mtx);
483 rk30_gpio_detach(device_t dev)
489 static device_method_t rk30_gpio_methods[] = {
490 /* Device interface */
491 DEVMETHOD(device_probe, rk30_gpio_probe),
492 DEVMETHOD(device_attach, rk30_gpio_attach),
493 DEVMETHOD(device_detach, rk30_gpio_detach),
496 DEVMETHOD(gpio_get_bus, rk30_gpio_get_bus),
497 DEVMETHOD(gpio_pin_max, rk30_gpio_pin_max),
498 DEVMETHOD(gpio_pin_getname, rk30_gpio_pin_getname),
499 DEVMETHOD(gpio_pin_getflags, rk30_gpio_pin_getflags),
500 DEVMETHOD(gpio_pin_getcaps, rk30_gpio_pin_getcaps),
501 DEVMETHOD(gpio_pin_setflags, rk30_gpio_pin_setflags),
502 DEVMETHOD(gpio_pin_get, rk30_gpio_pin_get),
503 DEVMETHOD(gpio_pin_set, rk30_gpio_pin_set),
504 DEVMETHOD(gpio_pin_toggle, rk30_gpio_pin_toggle),
509 static devclass_t rk30_gpio_devclass;
511 static driver_t rk30_gpio_driver = {
514 sizeof(struct rk30_gpio_softc),
517 DRIVER_MODULE(rk30_gpio, simplebus, rk30_gpio_driver, rk30_gpio_devclass, 0, 0);
520 rk30_gpios_prop_handle(phandle_t ctrl, pcell_t *gpios, int len)
522 struct rk30_gpio_softc *sc;
524 int inc, t, tuples, tuple_size;
525 int dir, flags, pin, i;
526 u_long gpio_ctrl, size;
532 if (OF_getprop(ctrl, "#gpio-cells", &gpio_cells, sizeof(pcell_t)) < 0)
535 gpio_cells = fdt32_to_cpu(gpio_cells);
539 tuple_size = gpio_cells * sizeof(pcell_t) + sizeof(phandle_t);
540 tuples = len / tuple_size;
542 if (fdt_regsize(ctrl, &gpio_ctrl, &size))
546 * Skip controller reference, since controller's phandle is given
547 * explicitly (in a function argument).
549 inc = sizeof(ihandle_t) / sizeof(pcell_t);
551 for (t = 0; t < tuples; t++) {
552 pin = fdt32_to_cpu(gpios[0]);
553 dir = fdt32_to_cpu(gpios[1]);
554 flags = fdt32_to_cpu(gpios[2]);
556 for (i = 0; i < sc->sc_gpio_npins; i++) {
557 if (sc->sc_gpio_pins[i].gp_pin == pin)
560 if (i >= sc->sc_gpio_npins)
563 rk30_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
567 rk30_gpio_pin_set(sc->sc_dev, pin, GPIO_PIN_INPUT);
570 rk30_gpio_pin_set(sc->sc_dev, pin, GPIO_PIN_OUTPUT);
572 gpios += gpio_cells + inc;
578 #define MAX_PINS_PER_NODE 5
579 #define GPIOS_PROP_CELLS 4
584 phandle_t child, parent, root, ctrl;
585 pcell_t gpios[MAX_PINS_PER_NODE * GPIOS_PROP_CELLS];
586 struct gpio_ctrl_entry *e;
589 root = OF_finddevice("/");
593 /* Traverse through entire tree to find nodes with 'gpios' prop */
594 for (child = OF_child(parent); child != 0; child = OF_peer(child)) {
596 /* Find a 'leaf'. Start the search from this node. */
597 while (OF_child(child)) {
599 child = OF_child(child);
601 if ((len = OF_getproplen(child, "gpios")) > 0) {
603 if (len > sizeof(gpios))
606 /* Get 'gpios' property. */
607 OF_getprop(child, "gpios", &gpios, len);
609 e = (struct gpio_ctrl_entry *)&gpio_controllers;
611 /* Find and call a handler. */
612 for (; e->compat; e++) {
614 * First cell of 'gpios' property should
615 * contain a ref. to a node defining GPIO
618 ctrl = OF_node_from_xref(fdt32_to_cpu(gpios[0]));
620 if (fdt_is_compatible(ctrl, e->compat))
621 /* Call a handler. */
622 if ((rv = e->handler(ctrl,
623 (pcell_t *)&gpios, len)))
628 if (OF_peer(child) == 0) {
629 /* No more siblings. */
631 parent = OF_parent(child);