1 /* $NetBSD: sa11x0_ppcreg.h,v 1.2 2001/07/30 12:19:04 rjs Exp $ */
4 * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by IWAMOTO Toshihiro.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 /* SA11[01]0 PPC (peripheral pin controller) */
36 /* size of I/O space */
37 #define SAPPC_NPORTS 13
39 #define SAPPC_PDR 0x00 /* pin direction register */
41 #define SAPPC_PSR 0x04 /* pin state register */
43 #define SAPPC_PAR 0x08 /* pin assignment register */
44 #define PAR_UPR 0x01000 /* UART pin assignment */
45 #define PAR_SPR 0x40000 /* SSP pin assignment */
47 #define SAPPC_SDR 0x0C /* sleep mode direction register */
49 #define SAPPC_PFR 0x10 /* pin flag register */
50 #define PFR_LCD 0x00001 /* LCD controller flag */
51 #define PFR_SP1TX 0x01000 /* serial port 1 Tx flag */
52 #define PFR_SP1RX 0x02000 /* serial port 1 Rx flag */
53 #define PFR_SP2TX 0x04000 /* serial port 2 Tx flag */
54 #define PFR_SP2RX 0x08000 /* serial port 2 Rx flag */
55 #define PFR_SP3TX 0x10000 /* serial port 3 Tx flag */
56 #define PFR_SP3RX 0x20000 /* serial port 3 Rx flag */
57 #define PFR_SP4 0x40000 /* serial port 4 flag */
59 /* MCP control register 1 */
60 #define SAMCP_CR1 0x30 /* MCP control register 1 */