2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * This module just enables Exynos MCT, so ARMv7 Generic Timer will works
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/malloc.h>
41 #include <sys/timeet.h>
42 #include <sys/timetc.h>
43 #include <sys/watchdog.h>
44 #include <machine/bus.h>
45 #include <machine/cpu.h>
46 #include <machine/intr.h>
48 #include <dev/ofw/openfirm.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
52 #include <machine/bus.h>
54 #define MCT_CTRL_START (1 << 8)
55 #define MCT_CTRL (0x240)
56 #define MCT_WRITE_STAT (0x24C)
58 struct arm_tmr_softc {
59 struct resource *tmr_res[1];
61 bus_space_handle_t bsh;
64 static struct resource_spec arm_tmr_spec[] = {
65 { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Timer registers */
70 arm_tmr_probe(device_t dev)
73 if (!ofw_bus_status_okay(dev))
76 if (!ofw_bus_is_compatible(dev, "exynos,mct"))
79 device_set_desc(dev, "Exynos MPCore Timer");
80 return (BUS_PROBE_DEFAULT);
84 arm_tmr_attach(device_t dev)
86 struct arm_tmr_softc *sc;
90 sc = device_get_softc(dev);
92 if (bus_alloc_resources(dev, arm_tmr_spec, sc->tmr_res)) {
93 device_printf(dev, "could not allocate resources\n");
98 sc->bst = rman_get_bustag(sc->tmr_res[0]);
99 sc->bsh = rman_get_bushandle(sc->tmr_res[0]);
101 reg = bus_space_read_4(sc->bst, sc->bsh, MCT_CTRL);
102 reg |= MCT_CTRL_START;
103 bus_space_write_4(sc->bst, sc->bsh, MCT_CTRL, reg);
107 /* Wait 10 times until written value is applied */
108 for (i = 0; i < 10; i++) {
109 reg = bus_space_read_4(sc->bst, sc->bsh, MCT_WRITE_STAT);
111 bus_space_write_4(sc->bst, sc->bsh,
112 MCT_WRITE_STAT, mask);
120 panic("Can't enable timer\n");
123 static device_method_t arm_tmr_methods[] = {
124 DEVMETHOD(device_probe, arm_tmr_probe),
125 DEVMETHOD(device_attach, arm_tmr_attach),
129 static driver_t arm_tmr_driver = {
132 sizeof(struct arm_tmr_softc),
135 static devclass_t arm_tmr_devclass;
137 DRIVER_MODULE(mct, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0);