2 * Copyright (c) 2015 Ian lepore <ian@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * AM335x PPS driver using DMTimer capture.
30 * Note that this PPS driver does not use an interrupt. Instead it uses the
31 * hardware's ability to latch the timer's count register in response to a
32 * signal on an IO pin. Each of timers 4-7 have an associated pin, and this
33 * code allows any one of those to be used.
35 * The timecounter routines in kern_tc.c call the pps poll routine periodically
36 * to see if a new counter value has been latched. When a new value has been
37 * latched, the only processing done in the poll routine is to capture the
38 * current set of timecounter timehands (done with pps_capture()) and the
39 * latched value from the timer. The remaining work (done by pps_event() while
40 * holding a mutex) is scheduled to be done later in a non-interrupt context.
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
46 #include <sys/param.h>
47 #include <sys/systm.h>
50 #include <sys/kernel.h>
51 #include <sys/module.h>
52 #include <sys/malloc.h>
53 #include <sys/mutex.h>
55 #include <sys/taskqueue.h>
56 #include <sys/timepps.h>
57 #include <sys/timetc.h>
58 #include <machine/bus.h>
60 #include <dev/ofw/openfirm.h>
61 #include <dev/ofw/ofw_bus.h>
62 #include <dev/ofw/ofw_bus_subr.h>
64 #include <arm/ti/ti_prcm.h>
65 #include <arm/ti/ti_hwmods.h>
66 #include <arm/ti/ti_pinmux.h>
67 #include <arm/ti/am335x/am335x_scm_padconf.h>
69 #include "am335x_dmtreg.h"
71 #define PPS_CDEV_NAME "dmtpps"
76 struct resource * mem_res;
77 int tmr_num; /* N from hwmod str "timerN" */
78 char tmr_name[12]; /* "DMTimerN" */
79 uint32_t tclr; /* Cached TCLR register. */
80 struct timecounter tc;
81 int pps_curmode; /* Edge mode now set in hw. */
82 struct task pps_task; /* For pps_event handling. */
83 struct cdev * pps_cdev;
84 struct pps_state pps_state;
88 static int dmtpps_tmr_num; /* Set by probe() */
90 /* List of compatible strings for FDT tree */
91 static struct ofw_compat_data compat_data[] = {
92 {"ti,am335x-timer", 1},
93 {"ti,am335x-timer-1ms", 1},
98 * A table relating pad names to the hardware timer number they can be mux'd to.
104 static struct padinfo dmtpps_padinfo[] = {
105 {"GPMC_ADVn_ALE", 4},
108 {"XDMA_EVENT_INTR0", 4},
109 {"GPMC_BEn0_CLE", 5},
120 {"XDMA_EVENT_INTR1", 7},
125 * This is either brilliantly user-friendly, or utterly lame...
127 * The am335x chip is used on the popular Beaglebone boards. Those boards have
128 * pins for all four capture-capable timers available on the P8 header. Allow
129 * users to configure the input pin by giving the name of the header pin.
135 static struct nicknames dmtpps_pin_nicks[] = {
136 {"P8-7", "GPMC_ADVn_ALE"},
137 {"P8-9", "GPMC_BEn0_CLE"},
138 {"P8-10", "GPMC_WEn"},
139 {"P8-8", "GPMC_OEn_REn",},
143 #define DMTIMER_READ4(sc, reg) bus_read_4((sc)->mem_res, (reg))
144 #define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->mem_res, (reg), (val))
147 * Translate a short friendly case-insensitive name to its canonical name.
150 dmtpps_translate_nickname(const char *nick)
152 struct nicknames *nn;
154 for (nn = dmtpps_pin_nicks; nn->nick != NULL; nn++)
155 if (strcasecmp(nick, nn->nick) == 0)
161 * See if our tunable is set to the name of the input pin. If not, that's NOT
162 * an error, return 0. If so, try to configure that pin as a timer capture
163 * input pin, and if that works, then we have our timer unit number and if it
164 * fails that IS an error, return -1.
167 dmtpps_find_tmr_num_by_tunable(void)
172 const char * ballname;
175 if (!TUNABLE_STR_FETCH("hw.am335x_dmtpps.input", iname, sizeof(iname)))
177 ballname = dmtpps_translate_nickname(iname);
178 for (pi = dmtpps_padinfo; pi->ballname != NULL; pi++) {
179 if (strcmp(ballname, pi->ballname) != 0)
181 snprintf(muxmode, sizeof(muxmode), "timer%d", pi->tmr_num);
182 err = ti_pinmux_padconf_set(pi->ballname, muxmode,
185 printf("am335x_dmtpps: unable to configure capture pin "
186 "for %s to input mode\n", muxmode);
188 } else if (bootverbose) {
189 printf("am335x_dmtpps: configured pin %s as input "
190 "for %s\n", iname, muxmode);
192 return (pi->tmr_num);
195 /* Invalid name in the tunable, that's an error. */
196 printf("am335x_dmtpps: unknown pin name '%s'\n", iname);
201 * Ask the pinmux driver whether any pin has been configured as a TIMER4..TIMER7
202 * input pin. If so, return the timer number, if not return 0.
205 dmtpps_find_tmr_num_by_padconf(void)
208 unsigned int padstate;
213 for (pi = dmtpps_padinfo; pi->ballname != NULL; pi++) {
214 err = ti_pinmux_padconf_get(pi->ballname, &padmux, &padstate);
215 snprintf(muxmode, sizeof(muxmode), "timer%d", pi->tmr_num);
216 if (err == 0 && (padstate & RXACTIVE) != 0 &&
217 strcmp(muxmode, padmux) == 0)
218 return (pi->tmr_num);
220 /* Nothing found, not an error. */
225 * Figure out which hardware timer number to use based on input pin
226 * configuration. This is done just once, the first time probe() runs.
229 dmtpps_find_tmr_num(void)
233 if ((tmr_num = dmtpps_find_tmr_num_by_tunable()) == 0)
234 tmr_num = dmtpps_find_tmr_num_by_padconf();
237 printf("am335x_dmtpps: PPS driver not enabled: unable to find "
238 "or configure a capture input pin\n");
239 tmr_num = -1; /* Must return non-zero to prevent re-probing. */
245 dmtpps_set_hw_capture(struct dmtpps_softc *sc, bool force_off)
252 newmode = sc->pps_state.ppsparam.mode & PPS_CAPTUREASSERT;
254 if (newmode == sc->pps_curmode)
256 sc->pps_curmode = newmode;
258 if (newmode == PPS_CAPTUREASSERT)
259 sc->tclr |= DMT_TCLR_CAPTRAN_LOHI;
261 sc->tclr &= ~DMT_TCLR_CAPTRAN_MASK;
262 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr);
266 dmtpps_get_timecount(struct timecounter *tc)
268 struct dmtpps_softc *sc;
272 return (DMTIMER_READ4(sc, DMT_TCRR));
276 dmtpps_poll(struct timecounter *tc)
278 struct dmtpps_softc *sc;
283 * If a new value has been latched we've got a PPS event. Capture the
284 * timecounter data, then override the capcount field (pps_capture()
285 * populates it from the current DMT_TCRR register) with the latched
286 * value from the TCAR1 register.
288 * There is no locking here, by design. pps_capture() writes into an
289 * area of struct pps_state which is read only by pps_event(). The
290 * synchronization of access to that area is temporal rather than
291 * interlock based... we write in this routine and trigger the task that
292 * will read the data, so no simultaneous access can occur.
294 * Note that we don't have the TCAR interrupt enabled, but the hardware
295 * still provides the status bits in the "RAW" status register even when
296 * they're masked from generating an irq. However, when clearing the
297 * TCAR status to re-arm the capture for the next second, we have to
298 * write to the IRQ status register, not the RAW register. Quirky.
300 if (DMTIMER_READ4(sc, DMT_IRQSTATUS_RAW) & DMT_IRQ_TCAR) {
301 pps_capture(&sc->pps_state);
302 sc->pps_state.capcount = DMTIMER_READ4(sc, DMT_TCAR1);
303 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_TCAR);
304 taskqueue_enqueue(taskqueue_fast, &sc->pps_task);
309 dmtpps_event(void *arg, int pending)
311 struct dmtpps_softc *sc;
315 /* This is the task function that gets enqueued by poll_pps. Once the
316 * time has been captured by the timecounter polling code which runs in
317 * primary interrupt context, the remaining (more expensive) work to
318 * process the event is done later in a threaded context.
320 * Here there is an interlock that protects the event data in struct
321 * pps_state. That data can be accessed at any time from userland via
322 * ioctl() calls so we must ensure that there is no read access to
323 * partially updated data while pps_event() does its work.
325 mtx_lock(&sc->pps_mtx);
326 pps_event(&sc->pps_state, PPS_CAPTUREASSERT);
327 mtx_unlock(&sc->pps_mtx);
331 dmtpps_open(struct cdev *dev, int flags, int fmt,
334 struct dmtpps_softc *sc;
339 * Begin polling for pps and enable capture in the hardware whenever the
340 * device is open. Doing this stuff again is harmless if this isn't the
343 sc->tc.tc_poll_pps = dmtpps_poll;
344 dmtpps_set_hw_capture(sc, false);
350 dmtpps_close(struct cdev *dev, int flags, int fmt,
353 struct dmtpps_softc *sc;
358 * Stop polling and disable capture on last close. Use the force-off
359 * flag to override the configured mode and turn off the hardware.
361 sc->tc.tc_poll_pps = NULL;
362 dmtpps_set_hw_capture(sc, true);
368 dmtpps_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
369 int flags, struct thread *td)
371 struct dmtpps_softc *sc;
376 /* Let the kernel do the heavy lifting for ioctl. */
377 mtx_lock(&sc->pps_mtx);
378 err = pps_ioctl(cmd, data, &sc->pps_state);
379 mtx_unlock(&sc->pps_mtx);
384 * The capture mode could have changed, set the hardware to whatever
385 * mode is now current. Effectively a no-op if nothing changed.
387 dmtpps_set_hw_capture(sc, false);
392 static struct cdevsw dmtpps_cdevsw = {
393 .d_version = D_VERSION,
394 .d_open = dmtpps_open,
395 .d_close = dmtpps_close,
396 .d_ioctl = dmtpps_ioctl,
397 .d_name = PPS_CDEV_NAME,
401 dmtpps_probe(device_t dev)
406 if (!ofw_bus_status_okay(dev))
409 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
413 * If we haven't chosen which hardware timer to use yet, go do that now.
414 * We need to know that to decide whether to return success for this
415 * hardware timer instance or not.
417 if (dmtpps_tmr_num == 0)
418 dmtpps_tmr_num = dmtpps_find_tmr_num();
421 * Figure out which hardware timer is being probed and see if it matches
422 * the configured timer number determined earlier.
424 tmr_num = ti_hwmods_get_unit(dev, "timer");
425 if (dmtpps_tmr_num != tmr_num)
428 snprintf(strbuf, sizeof(strbuf), "AM335x PPS-Capture DMTimer%d",
430 device_set_desc_copy(dev, strbuf);
432 return(BUS_PROBE_DEFAULT);
436 dmtpps_attach(device_t dev)
438 struct dmtpps_softc *sc;
439 clk_ident_t timer_id;
440 int err, sysclk_freq;
442 sc = device_get_softc(dev);
445 /* Get the base clock frequency. */
446 err = ti_prcm_clk_get_source_freq(SYS_CLK, &sysclk_freq);
448 /* Enable clocks and power on the device. */
449 if ((timer_id = ti_hwmods_get_clock(dev)) == INVALID_CLK_IDENT)
451 if ((err = ti_prcm_clk_set_source(timer_id, SYSCLK_CLK)) != 0)
453 if ((err = ti_prcm_clk_enable(timer_id)) != 0)
456 /* Request the memory resources. */
457 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
458 &sc->mem_rid, RF_ACTIVE);
459 if (sc->mem_res == NULL) {
463 /* Figure out which hardware timer this is and set the name string. */
464 sc->tmr_num = ti_hwmods_get_unit(dev, "timer");
465 snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num);
468 * Configure the timer pulse/capture pin to input/capture mode. This is
469 * required in addition to configuring the pin as input with the pinmux
470 * controller (which was done via fdt data or tunable at probe time).
472 sc->tclr = DMT_TCLR_GPO_CFG;
473 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr);
475 /* Set up timecounter hardware, start it. */
476 DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET);
477 while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET)
480 sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD;
481 DMTIMER_WRITE4(sc, DMT_TLDR, 0);
482 DMTIMER_WRITE4(sc, DMT_TCRR, 0);
483 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr);
485 /* Register the timecounter. */
486 sc->tc.tc_name = sc->tmr_name;
487 sc->tc.tc_get_timecount = dmtpps_get_timecount;
488 sc->tc.tc_counter_mask = ~0u;
489 sc->tc.tc_frequency = sysclk_freq;
490 sc->tc.tc_quality = 1000;
496 * Indicate our PPS capabilities. Have the kernel init its part of the
497 * pps_state struct and add its capabilities.
499 * While the hardware has a mode to capture each edge, it's not clear we
500 * can use it that way, because there's only a single interrupt/status
501 * bit to say something was captured, but not which edge it was. For
502 * now, just say we can only capture assert events (the positive-going
503 * edge of the pulse).
505 mtx_init(&sc->pps_mtx, "dmtpps", NULL, MTX_DEF);
506 sc->pps_state.ppscap = PPS_CAPTUREASSERT;
507 sc->pps_state.driver_abi = PPS_ABI_VERSION;
508 sc->pps_state.driver_mtx = &sc->pps_mtx;
509 pps_init_abi(&sc->pps_state);
512 * Init the task that does deferred pps_event() processing after
513 * the polling routine has captured a pps pulse time.
515 TASK_INIT(&sc->pps_task, 0, dmtpps_event, sc);
517 /* Create the PPS cdev. */
518 sc->pps_cdev = make_dev(&dmtpps_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600,
520 sc->pps_cdev->si_drv1 = sc;
523 device_printf(sc->dev, "Using %s for PPS device /dev/%s\n",
524 sc->tmr_name, PPS_CDEV_NAME);
530 dmtpps_detach(device_t dev)
534 * There is no way to remove a timecounter once it has been registered,
535 * even if it's not in use, so we can never detach. If we were
536 * dynamically loaded as a module this will prevent unloading.
541 static device_method_t dmtpps_methods[] = {
542 DEVMETHOD(device_probe, dmtpps_probe),
543 DEVMETHOD(device_attach, dmtpps_attach),
544 DEVMETHOD(device_detach, dmtpps_detach),
548 static driver_t dmtpps_driver = {
551 sizeof(struct dmtpps_softc),
554 static devclass_t dmtpps_devclass;
556 DRIVER_MODULE(am335x_dmtpps, simplebus, dmtpps_driver, dmtpps_devclass, 0, 0);
557 MODULE_DEPEND(am335x_dmtpps, am335x_prcm, 1, 1, 1);