2 * Copyright 2014 Luiz Otavio O Souza <loos@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #define TI_ADC_NPINS 8
34 #define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg)
35 #define ADC_WRITE4(_sc, reg, value) \
36 bus_write_4((_sc)->sc_mem_res, reg, value)
42 struct resource *sc_mem_res;
43 struct resource *sc_irq_res;
46 int sc_tsc_wire_config[TI_ADC_NPINS];
47 int sc_coord_readouts;
48 int sc_x_plate_resistance;
51 int sc_adc_channels[TI_ADC_NPINS];
52 int sc_xp_bit, sc_xp_inp;
53 int sc_xn_bit, sc_xn_inp;
54 int sc_yp_bit, sc_yp_inp;
55 int sc_yn_bit, sc_yn_inp;
56 uint32_t sc_tsc_enabled;
61 struct evdev_dev *sc_evdev;
66 int32_t enable; /* input enabled */
67 int32_t samples; /* samples average */
68 int32_t input; /* input number */
69 int32_t value; /* raw converted value */
70 uint32_t stepconfig; /* step config register */
71 uint32_t stepdelay; /* step delay register */
72 struct ti_adc_softc *sc; /* pointer to adc softc */
75 #define TI_ADC_LOCK(_sc) \
76 mtx_lock(&(_sc)->sc_mtx)
77 #define TI_ADC_UNLOCK(_sc) \
78 mtx_unlock(&(_sc)->sc_mtx)
79 #define TI_ADC_LOCK_INIT(_sc) \
80 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
82 #define TI_ADC_LOCK_DESTROY(_sc) \
83 mtx_destroy(&_sc->sc_mtx);
84 #define TI_ADC_LOCK_ASSERT(_sc) \
85 mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
87 #endif /* _TI_ADCVAR_H_ */