sys/arm/ti/ti_sysc.c

   1 /*-
   2  * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.org>
   3  *
   4  * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD$
  28  */
  29
  30 #include <sys/cdefs.h>
  31 __FBSDID("$FreeBSD$");
  32
  33 #include <sys/param.h>
  34 #include <sys/systm.h>
  35 #include <sys/bus.h>
  36 #include <sys/fbio.h>
  37 #include <sys/kernel.h>
  38 #include <sys/module.h>
  39 #include <sys/queue.h>
  40 #include <sys/rman.h>
  41 #include <sys/resource.h>
  42 #include <machine/bus.h>
  43 #include <vm/vm.h>
  44 #include <vm/vm_extern.h>
  45 #include <vm/vm_kern.h>
  46 #include <vm/pmap.h>
  47
  48 #include <dev/fdt/simplebus.h>
  49
  50 #include <dev/ofw/ofw_bus.h>
  51 #include <dev/ofw/ofw_bus_subr.h>
  52
  53 #include <dev/extres/clk/clk.h>
  54
  55 #include <arm/ti/ti_sysc.h>
  56 #include <arm/ti/clk/clock_common.h>
  57
  58 #define DEBUG_SYSC      0
  59
  60 #if DEBUG_SYSC
  61 #define DPRINTF(dev, msg...) device_printf(dev, msg)
  62 #else
  63 #define DPRINTF(dev, msg...)
  64 #endif
  65
  66 /* Documentation/devicetree/bindings/bus/ti-sysc.txt
  67  *
  68  * Documentation/devicetree/clock/clock-bindings.txt
  69  * Defines phandle + optional pair
  70  * Documentation/devicetree/clock/ti-clkctl.txt
  71  */
  72
  73 static int ti_sysc_probe(device_t dev);
  74 static int ti_sysc_attach(device_t dev);
  75 static int ti_sysc_detach(device_t dev);
  76
  77 #define TI_SYSC_DRA7_MCAN       15
  78 #define TI_SYSC_USB_HOST_FS     14
  79 #define TI_SYSC_DRA7_MCASP      13
  80 #define TI_SYSC_MCASP           12
  81 #define TI_SYSC_OMAP_AES        11
  82 #define TI_SYSC_OMAP3_SHAM      10
  83 #define TI_SYSC_OMAP4_SR        9
  84 #define TI_SYSC_OMAP3630_SR     8
  85 #define TI_SYSC_OMAP3430_SR     7
  86 #define TI_SYSC_OMAP4_TIMER     6
  87 #define TI_SYSC_OMAP2_TIMER     5
  88 /* Above needs special workarounds */
  89 #define TI_SYSC_OMAP4_SIMPLE    4
  90 #define TI_SYSC_OMAP4           3
  91 #define TI_SYSC_OMAP2           2
  92 #define TI_SYSC                 1
  93 #define TI_SYSC_END             0
  94
  95 static struct ofw_compat_data compat_data[] = {
  96         { "ti,sysc-dra7-mcan",          TI_SYSC_DRA7_MCAN },
  97         { "ti,sysc-usb-host-fs",        TI_SYSC_USB_HOST_FS },
  98         { "ti,sysc-dra7-mcasp",         TI_SYSC_DRA7_MCASP },
  99         { "ti,sysc-mcasp",              TI_SYSC_MCASP },
 100         { "ti,sysc-omap-aes",           TI_SYSC_OMAP_AES },
 101         { "ti,sysc-omap3-sham",         TI_SYSC_OMAP3_SHAM },
 102         { "ti,sysc-omap4-sr",           TI_SYSC_OMAP4_SR },
 103         { "ti,sysc-omap3630-sr",        TI_SYSC_OMAP3630_SR },
 104         { "ti,sysc-omap3430-sr",        TI_SYSC_OMAP3430_SR },
 105         { "ti,sysc-omap4-timer",        TI_SYSC_OMAP4_TIMER },
 106         { "ti,sysc-omap2-timer",        TI_SYSC_OMAP2_TIMER },
 107         /* Above needs special workarounds */
 108         { "ti,sysc-omap4-simple",       TI_SYSC_OMAP4_SIMPLE },
 109         { "ti,sysc-omap4",              TI_SYSC_OMAP4 },
 110         { "ti,sysc-omap2",              TI_SYSC_OMAP2 },
 111         { "ti,sysc",                    TI_SYSC },
 112         { NULL,                         TI_SYSC_END }
 113 };
 114
 115 /* reg-names can be "rev", "sysc" and "syss" */
 116 static const char * reg_names[] = { "rev", "sysc", "syss" };
 117 #define REG_REV         0
 118 #define REG_SYSC        1
 119 #define REG_SYSS        2
 120 #define REG_MAX         3
 121
 122 /* master idle / slave idle mode defined in 8.1.3.2.1 / 8.1.3.2.2 */
 123 #include <gnu/dts/include/dt-bindings/bus/ti-sysc.h>
 124 #define SYSC_IDLE_MAX           4
 125
 126 struct sysc_reg {
 127         uint64_t        address;
 128         uint64_t        size;
 129 };
 130
 131 struct clk_list {
 132         TAILQ_ENTRY(clk_list)   next;
 133         clk_t                   clk;
 134 };
 135
 136 struct ti_sysc_softc {
 137         struct simplebus_softc  sc;
 138         bool                    attach_done;
 139
 140         device_t                dev;
 141         int                     device_type;
 142
 143         struct sysc_reg         reg[REG_MAX];
 144         /* Offset from host base address */
 145         uint64_t                offset_reg[REG_MAX];
 146
 147         uint32_t                ti_sysc_mask;
 148         int32_t                 ti_sysc_midle[SYSC_IDLE_MAX];
 149         int32_t                 ti_sysc_sidle[SYSC_IDLE_MAX];
 150         uint32_t                ti_sysc_delay_us;
 151         uint32_t                ti_syss_mask;
 152
 153         int                     num_clocks;
 154         TAILQ_HEAD(, clk_list)  clk_list;
 155
 156         /* deprecated ti_hwmods */
 157         bool                    ti_no_reset_on_init;
 158         bool                    ti_no_idle_on_init;
 159         bool                    ti_no_idle;
 160 };
 161
 162 /*
 163  * All sysc seems to have a reg["rev"] register.
 164  * Lets use that for identification of which module the driver are connected to.
 165  */
 166 uint64_t
 167 ti_sysc_get_rev_address(device_t dev) {
 168         struct ti_sysc_softc *sc = device_get_softc(dev);
 169
 170         return (sc->reg[REG_REV].address);
 171 }
 172
 173 uint64_t
 174 ti_sysc_get_rev_address_offset_host(device_t dev) {
 175         struct ti_sysc_softc *sc = device_get_softc(dev);
 176
 177         return (sc->offset_reg[REG_REV]);
 178 }
 179
 180 uint64_t
 181 ti_sysc_get_sysc_address(device_t dev) {
 182         struct ti_sysc_softc *sc = device_get_softc(dev);
 183
 184         return (sc->reg[REG_SYSC].address);
 185 }
 186
 187 uint64_t
 188 ti_sysc_get_sysc_address_offset_host(device_t dev) {
 189         struct ti_sysc_softc *sc = device_get_softc(dev);
 190
 191         return (sc->offset_reg[REG_SYSC]);
 192 }
 193
 194 uint64_t
 195 ti_sysc_get_syss_address(device_t dev) {
 196         struct ti_sysc_softc *sc = device_get_softc(dev);
 197
 198         return (sc->reg[REG_SYSS].address);
 199 }
 200
 201 uint64_t
 202 ti_sysc_get_syss_address_offset_host(device_t dev) {
 203         struct ti_sysc_softc *sc = device_get_softc(dev);
 204
 205         return (sc->offset_reg[REG_SYSS]);
 206 }
 207
 208 /*
 209  * Due no memory region is assigned the sysc driver the children needs to
 210  * handle the practical read/writes to the registers.
 211  * Check if sysc has reset bit.
 212  */
 213 uint32_t
 214 ti_sysc_get_soft_reset_bit(device_t dev) {
 215         struct ti_sysc_softc *sc = device_get_softc(dev);
 216         switch (sc->device_type) {
 217                 case TI_SYSC_OMAP4_TIMER:
 218                 case TI_SYSC_OMAP4_SIMPLE:
 219                 case TI_SYSC_OMAP4:
 220                         if (sc->ti_sysc_mask & SYSC_OMAP4_SOFTRESET) {
 221                                 return (SYSC_OMAP4_SOFTRESET);
 222                         }
 223                         break;
 224
 225                 case TI_SYSC_OMAP2_TIMER:
 226                 case TI_SYSC_OMAP2:
 227                 case TI_SYSC:
 228                         if (sc->ti_sysc_mask & SYSC_OMAP2_SOFTRESET) {
 229                                 return (SYSC_OMAP2_SOFTRESET);
 230                         }
 231                         break;
 232                 default:
 233                         break;
 234         }
 235
 236         return (0);
 237 }
 238
 239 int
 240 ti_sysc_clock_enable(device_t dev) {
 241         struct clk_list *clkp, *clkp_tmp;
 242         struct ti_sysc_softc *sc = device_get_softc(dev);
 243         int err;
 244
 245         TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
 246                 err = clk_enable(clkp->clk);
 247
 248                 if (err) {
 249                         DPRINTF(sc->dev, "clk_enable %s failed %d\n",
 250                                 clk_get_name(clkp->clk), err);
 251                         break;
 252                 }
 253         }
 254         return (err);
 255 }
 256
 257 int
 258 ti_sysc_clock_disable(device_t dev) {
 259         struct clk_list *clkp, *clkp_tmp;
 260         struct ti_sysc_softc *sc = device_get_softc(dev);
 261         int err = 0;
 262
 263         TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
 264                 err = clk_disable(clkp->clk);
 265
 266                 if (err) {
 267                         DPRINTF(sc->dev, "clk_enable %s failed %d\n",
 268                                 clk_get_name(clkp->clk), err);
 269                         break;
 270                 }
 271         }
 272         return (err);
 273 }
 274
 275 static int
 276 parse_regfields(struct ti_sysc_softc *sc) {
 277         phandle_t node;
 278         uint32_t parent_address_cells;
 279         uint32_t parent_size_cells;
 280         cell_t *reg;
 281         ssize_t nreg;
 282         int err, k, reg_i, prop_idx;
 283         uint32_t idx;
 284
 285         node = ofw_bus_get_node(sc->dev);
 286
 287         /* Get parents address and size properties */
 288         err = OF_searchencprop(OF_parent(node), "#address-cells",
 289                 &parent_address_cells, sizeof(parent_address_cells));
 290         if (err == -1)
 291                 return (ENXIO);
 292         if (!(parent_address_cells == 1 || parent_address_cells == 2)) {
 293                 DPRINTF(sc->dev, "Expect parent #address-cells=[1||2]\n");
 294                 return (ENXIO);
 295         }
 296
 297         err = OF_searchencprop(OF_parent(node), "#size-cells",
 298                 &parent_size_cells, sizeof(parent_size_cells));
 299         if (err == -1)
 300                 return (ENXIO);
 301
 302         if (!(parent_size_cells == 1 || parent_size_cells == 2)) {
 303                 DPRINTF(sc->dev, "Expect parent #size-cells = [1||2]\n");
 304                 return (ENXIO);
 305         }
 306
 307         /* Grab the content of reg properties */
 308         nreg = OF_getproplen(node, "reg");
 309         reg = malloc(nreg, M_DEVBUF, M_WAITOK);
 310         OF_getencprop(node, "reg", reg, nreg);
 311
 312         /* Make sure address & size are 0 */
 313         for (idx = 0; idx < REG_MAX; idx++) {
 314                 sc->reg[idx].address = 0;
 315                 sc->reg[idx].size = 0;
 316         }
 317
 318         /* Loop through reg-names and figure out which reg-name corresponds to
 319          * index populate the values into the reg array.
 320         */
 321         for (idx = 0, reg_i = 0; idx < REG_MAX && reg_i < nreg; idx++) {
 322                 err = ofw_bus_find_string_index(node, "reg-names",
 323                     reg_names[idx], &prop_idx);
 324                 if (err != 0)
 325                         continue;
 326
 327                 for (k = 0; k < parent_address_cells; k++) {
 328                         sc->reg[prop_idx].address <<= 32;
 329                         sc->reg[prop_idx].address |= reg[reg_i++];
 330                 }
 331
 332                 for (k = 0; k < parent_size_cells; k++) {
 333                         sc->reg[prop_idx].size <<= 32;
 334                         sc->reg[prop_idx].size |= reg[reg_i++];
 335                 }
 336
 337                 if (sc->sc.nranges == 0)
 338                         sc->offset_reg[prop_idx] = sc->reg[prop_idx].address;
 339                 else
 340                         sc->offset_reg[prop_idx] = sc->reg[prop_idx].address -
 341                             sc->sc.ranges[REG_REV].host;
 342
 343                 DPRINTF(sc->dev, "reg[%s] adress %#jx size %#jx\n",
 344                         reg_names[idx],
 345                         sc->reg[prop_idx].address,
 346                         sc->reg[prop_idx].size);
 347         }
 348         free(reg, M_DEVBUF);
 349         return (0);
 350 }
 351
 352 static void
 353 parse_idle(struct ti_sysc_softc *sc, const char *name, uint32_t *idle) {
 354         phandle_t node;
 355         cell_t  value[SYSC_IDLE_MAX];
 356         int len, no, i;
 357
 358         node = ofw_bus_get_node(sc->dev);
 359
 360         if (!OF_hasprop(node, name)) {
 361                 return;
 362         }
 363
 364         len = OF_getproplen(node, name);
 365         no = len / sizeof(cell_t);
 366         if (no >= SYSC_IDLE_MAX) {
 367                 DPRINTF(sc->dev, "Limit %s\n", name);
 368                 no = SYSC_IDLE_MAX-1;
 369                 len = no * sizeof(cell_t);
 370         }
 371
 372         OF_getencprop(node, name, value, len);
 373         for (i = 0; i < no; i++) {
 374                 idle[i] = value[i];
 375 #if DEBUG_SYSC
 376                 DPRINTF(sc->dev, "%s[%d] = %d ",
 377                         name, i, value[i]);
 378                 switch(value[i]) {
 379                 case SYSC_IDLE_FORCE:
 380                         DPRINTF(sc->dev, "SYSC_IDLE_FORCE\n");
 381                         break;
 382                 case SYSC_IDLE_NO:
 383                         DPRINTF(sc->dev, "SYSC_IDLE_NO\n");
 384                         break;
 385                 case SYSC_IDLE_SMART:
 386                         DPRINTF(sc->dev, "SYSC_IDLE_SMART\n");
 387                         break;
 388                 case SYSC_IDLE_SMART_WKUP:
 389                         DPRINTF(sc->dev, "SYSC_IDLE_SMART_WKUP\n");
 390                         break;
 391                 }
 392 #endif
 393         }
 394         for ( ; i < SYSC_IDLE_MAX; i++)
 395                 idle[i] = -1;
 396 }
 397
 398 static int
 399 ti_sysc_attach_clocks(struct ti_sysc_softc *sc) {
 400         clk_t *clk;
 401         struct clk_list *clkp;
 402         int index, err;
 403         phandle_t cnode;
 404
 405         clk = malloc(sc->num_clocks*sizeof(clk_t), M_DEVBUF, M_WAITOK | M_ZERO);
 406
 407         cnode = ofw_bus_get_node(sc->dev);
 408
 409         /* Check if all clocks can be found */
 410         for (index = 0; index < sc->num_clocks; index++) {
 411                 err = clk_get_by_ofw_index(sc->dev, 0, index, &clk[index]);
 412
 413                 if (err != 0) {
 414                         free(clk, M_DEVBUF);
 415                         return (1);
 416                 }
 417         }
 418
 419         /* All clocks are found, add to list */
 420         for (index = 0; index < sc->num_clocks; index++) {
 421                 clkp = malloc(sizeof(*clkp), M_DEVBUF, M_WAITOK | M_ZERO);
 422                 clkp->clk = clk[index];
 423                 TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);
 424         }
 425
 426         /* Release the clk array */
 427         free(clk, M_DEVBUF);
 428         return (0);
 429 }
 430
 431 static int
 432 ti_sysc_simplebus_attach_child(device_t dev) {
 433         device_t cdev;
 434         phandle_t node, child;
 435         struct ti_sysc_softc *sc = device_get_softc(dev);
 436
 437         node = ofw_bus_get_node(sc->dev);
 438
 439         for (child = OF_child(node); child > 0; child = OF_peer(child)) {
 440                 cdev = simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL);
 441                 if (cdev != NULL)
 442                         device_probe_and_attach(cdev);
 443         }
 444         return (0);
 445 }
 446
 447 /* Device interface */
 448 static int
 449 ti_sysc_probe(device_t dev)
 450 {
 451         if (!ofw_bus_status_okay(dev))
 452                 return (ENXIO);
 453
 454         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
 455                 return (ENXIO);
 456
 457         device_set_desc(dev, "TI SYSC Interconnect");
 458
 459         return (BUS_PROBE_DEFAULT);
 460 }
 461
 462 static int
 463 ti_sysc_attach(device_t dev)
 464 {
 465         struct ti_sysc_softc *sc;
 466         phandle_t node;
 467         int err;
 468         cell_t  value;
 469
 470         sc = device_get_softc(dev);
 471         sc->dev = dev;
 472         sc->device_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
 473
 474         node = ofw_bus_get_node(sc->dev);
 475         /* ranges - use simplebus */
 476         simplebus_init(sc->dev, node);
 477         if (simplebus_fill_ranges(node, &sc->sc) < 0) {
 478                 DPRINTF(sc->dev, "could not get ranges\n");
 479                 return (ENXIO);
 480         }
 481
 482         if (sc->sc.nranges == 0) {
 483                 DPRINTF(sc->dev, "nranges == 0\n");
 484                 return (ENXIO);
 485         }
 486
 487         /* Required field reg & reg-names - assume at least "rev" exists */
 488         err = parse_regfields(sc);
 489         if (err) {
 490                 DPRINTF(sc->dev, "parse_regfields failed %d\n", err);
 491                 return (ENXIO);
 492         }
 493
 494         /* Optional */
 495         if (OF_hasprop(node, "ti,sysc-mask")) {
 496                 OF_getencprop(node, "ti,sysc-mask", &value, sizeof(cell_t));
 497                 sc->ti_sysc_mask = value;
 498         }
 499         if (OF_hasprop(node, "ti,syss-mask")) {
 500                 OF_getencprop(node, "ti,syss-mask", &value, sizeof(cell_t));
 501                 sc->ti_syss_mask = value;
 502         }
 503         if (OF_hasprop(node, "ti,sysc-delay-us")) {
 504                 OF_getencprop(node, "ti,sysc-delay-us", &value, sizeof(cell_t));
 505                 sc->ti_sysc_delay_us = value;
 506         }
 507
 508         DPRINTF(sc->dev, "sysc_mask %x syss_mask %x delay_us %x\n",
 509                 sc->ti_sysc_mask, sc->ti_syss_mask, sc->ti_sysc_delay_us);
 510
 511         parse_idle(sc, "ti,sysc-midle", sc->ti_sysc_midle);
 512         parse_idle(sc, "ti,sysc-sidle", sc->ti_sysc_sidle);
 513
 514         if (OF_hasprop(node, "ti,no-reset-on-init"))
 515                 sc->ti_no_reset_on_init = true;
 516         else
 517                 sc->ti_no_reset_on_init = false;
 518
 519         if (OF_hasprop(node, "ti,no-idle-on-init"))
 520                 sc->ti_no_idle_on_init = true;
 521         else
 522                 sc->ti_no_idle_on_init = false;
 523
 524         if (OF_hasprop(node, "ti,no-idle"))
 525                 sc->ti_no_idle = true;
 526         else
 527                 sc->ti_no_idle = false;
 528
 529         DPRINTF(sc->dev,
 530                 "no-reset-on-init %d, no-idle-on-init %d, no-idle %d\n",
 531                 sc->ti_no_reset_on_init,
 532                 sc->ti_no_idle_on_init,
 533                 sc->ti_no_idle);
 534
 535         if (OF_hasprop(node, "clocks")) {
 536                 struct clock_cell_info cell_info;
 537                 read_clock_cells(sc->dev, &cell_info);
 538                 free(cell_info.clock_cells, M_DEVBUF);
 539                 free(cell_info.clock_cells_ncells, M_DEVBUF);
 540
 541                 sc->num_clocks = cell_info.num_real_clocks;
 542                 TAILQ_INIT(&sc->clk_list);
 543
 544                 err = ti_sysc_attach_clocks(sc);
 545                 if (err) {
 546                         DPRINTF(sc->dev, "Failed to attach clocks\n");
 547                         return (bus_generic_attach(sc->dev));
 548                 }
 549         }
 550
 551         err = ti_sysc_simplebus_attach_child(sc->dev);
 552         if (err) {
 553                 DPRINTF(sc->dev, "ti_sysc_simplebus_attach_child %d\n",
 554                     err);
 555                 return (err);
 556         }
 557
 558         sc->attach_done = true;
 559
 560         return (bus_generic_attach(sc->dev));
 561 }
 562
 563 static int
 564 ti_sysc_detach(device_t dev)
 565 {
 566         return (EBUSY);
 567 }
 568
 569 /* Bus interface */
 570 static void
 571 ti_sysc_new_pass(device_t dev)
 572 {
 573         struct ti_sysc_softc *sc;
 574         int err;
 575         phandle_t node;
 576
 577         sc = device_get_softc(dev);
 578
 579         if (sc->attach_done) {
 580                 bus_generic_new_pass(sc->dev);
 581                 return;
 582         }
 583
 584         node = ofw_bus_get_node(sc->dev);
 585         if (OF_hasprop(node, "clocks")) {
 586                 err = ti_sysc_attach_clocks(sc);
 587                 if (err) {
 588                         DPRINTF(sc->dev, "Failed to attach clocks\n");
 589                         return;
 590                 }
 591         }
 592
 593         err = ti_sysc_simplebus_attach_child(sc->dev);
 594         if (err) {
 595                 DPRINTF(sc->dev,
 596                     "ti_sysc_simplebus_attach_child failed %d\n", err);
 597                 return;
 598         }
 599         sc->attach_done = true;
 600
 601         bus_generic_attach(sc->dev);
 602 }
 603
 604 static device_method_t ti_sysc_methods[] = {
 605         /* Device interface */
 606         DEVMETHOD(device_probe,         ti_sysc_probe),
 607         DEVMETHOD(device_attach,        ti_sysc_attach),
 608         DEVMETHOD(device_detach,        ti_sysc_detach),
 609
 610         /* Bus interface */
 611         DEVMETHOD(bus_new_pass,         ti_sysc_new_pass),
 612
 613         DEVMETHOD_END
 614 };
 615
 616 DEFINE_CLASS_1(ti_sysc, ti_sysc_driver, ti_sysc_methods,
 617         sizeof(struct ti_sysc_softc), simplebus_driver);
 618
 619 static devclass_t ti_sysc_devclass;
 620
 621 EARLY_DRIVER_MODULE(ti_sysc, simplebus, ti_sysc_driver,
 622     ti_sysc_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_FIRST);