sys/arm/ti/ti_sysc.c

   1 /*-
   2  * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.org>
   3  *
   4  * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27
  28 #include <sys/cdefs.h>
  29 #include <sys/param.h>
  30 #include <sys/systm.h>
  31 #include <sys/bus.h>
  32 #include <sys/fbio.h>
  33 #include <sys/kernel.h>
  34 #include <sys/module.h>
  35 #include <sys/queue.h>
  36 #include <sys/rman.h>
  37 #include <sys/resource.h>
  38 #include <machine/bus.h>
  39 #include <vm/vm.h>
  40 #include <vm/vm_extern.h>
  41 #include <vm/vm_kern.h>
  42 #include <vm/pmap.h>
  43
  44 #include <dev/fdt/simplebus.h>
  45
  46 #include <dev/ofw/ofw_bus.h>
  47 #include <dev/ofw/ofw_bus_subr.h>
  48
  49 #include <dev/extres/clk/clk.h>
  50
  51 #include <arm/ti/ti_sysc.h>
  52 #include <arm/ti/clk/clock_common.h>
  53
  54 #define DEBUG_SYSC      0
  55
  56 #if DEBUG_SYSC
  57 #define DPRINTF(dev, msg...) device_printf(dev, msg)
  58 #else
  59 #define DPRINTF(dev, msg...)
  60 #endif
  61
  62 /* Documentation/devicetree/bindings/bus/ti-sysc.txt
  63  *
  64  * Documentation/devicetree/clock/clock-bindings.txt
  65  * Defines phandle + optional pair
  66  * Documentation/devicetree/clock/ti-clkctl.txt
  67  */
  68
  69 static int ti_sysc_probe(device_t dev);
  70 static int ti_sysc_attach(device_t dev);
  71 static int ti_sysc_detach(device_t dev);
  72
  73 #define TI_SYSC_DRA7_MCAN       15
  74 #define TI_SYSC_USB_HOST_FS     14
  75 #define TI_SYSC_DRA7_MCASP      13
  76 #define TI_SYSC_MCASP           12
  77 #define TI_SYSC_OMAP_AES        11
  78 #define TI_SYSC_OMAP3_SHAM      10
  79 #define TI_SYSC_OMAP4_SR        9
  80 #define TI_SYSC_OMAP3630_SR     8
  81 #define TI_SYSC_OMAP3430_SR     7
  82 #define TI_SYSC_OMAP4_TIMER     6
  83 #define TI_SYSC_OMAP2_TIMER     5
  84 /* Above needs special workarounds */
  85 #define TI_SYSC_OMAP4_SIMPLE    4
  86 #define TI_SYSC_OMAP4           3
  87 #define TI_SYSC_OMAP2           2
  88 #define TI_SYSC                 1
  89 #define TI_SYSC_END             0
  90
  91 static struct ofw_compat_data compat_data[] = {
  92         { "ti,sysc-dra7-mcan",          TI_SYSC_DRA7_MCAN },
  93         { "ti,sysc-usb-host-fs",        TI_SYSC_USB_HOST_FS },
  94         { "ti,sysc-dra7-mcasp",         TI_SYSC_DRA7_MCASP },
  95         { "ti,sysc-mcasp",              TI_SYSC_MCASP },
  96         { "ti,sysc-omap-aes",           TI_SYSC_OMAP_AES },
  97         { "ti,sysc-omap3-sham",         TI_SYSC_OMAP3_SHAM },
  98         { "ti,sysc-omap4-sr",           TI_SYSC_OMAP4_SR },
  99         { "ti,sysc-omap3630-sr",        TI_SYSC_OMAP3630_SR },
 100         { "ti,sysc-omap3430-sr",        TI_SYSC_OMAP3430_SR },
 101         { "ti,sysc-omap4-timer",        TI_SYSC_OMAP4_TIMER },
 102         { "ti,sysc-omap2-timer",        TI_SYSC_OMAP2_TIMER },
 103         /* Above needs special workarounds */
 104         { "ti,sysc-omap4-simple",       TI_SYSC_OMAP4_SIMPLE },
 105         { "ti,sysc-omap4",              TI_SYSC_OMAP4 },
 106         { "ti,sysc-omap2",              TI_SYSC_OMAP2 },
 107         { "ti,sysc",                    TI_SYSC },
 108         { NULL,                         TI_SYSC_END }
 109 };
 110
 111 /* reg-names can be "rev", "sysc" and "syss" */
 112 static const char * reg_names[] = { "rev", "sysc", "syss" };
 113 #define REG_REV         0
 114 #define REG_SYSC        1
 115 #define REG_SYSS        2
 116 #define REG_MAX         3
 117
 118 /* master idle / slave idle mode defined in 8.1.3.2.1 / 8.1.3.2.2 */
 119 #include <dt-bindings/bus/ti-sysc.h>
 120 #define SYSC_IDLE_MAX           4
 121
 122 struct sysc_reg {
 123         uint64_t        address;
 124         uint64_t        size;
 125 };
 126
 127 struct clk_list {
 128         TAILQ_ENTRY(clk_list)   next;
 129         clk_t                   clk;
 130 };
 131
 132 struct ti_sysc_softc {
 133         struct simplebus_softc  sc;
 134         bool                    attach_done;
 135
 136         device_t                dev;
 137         int                     device_type;
 138
 139         struct sysc_reg         reg[REG_MAX];
 140         /* Offset from host base address */
 141         uint64_t                offset_reg[REG_MAX];
 142
 143         uint32_t                ti_sysc_mask;
 144         int32_t                 ti_sysc_midle[SYSC_IDLE_MAX];
 145         int32_t                 ti_sysc_sidle[SYSC_IDLE_MAX];
 146         uint32_t                ti_sysc_delay_us;
 147         uint32_t                ti_syss_mask;
 148
 149         int                     num_clocks;
 150         TAILQ_HEAD(, clk_list)  clk_list;
 151
 152         /* deprecated ti_hwmods */
 153         bool                    ti_no_reset_on_init;
 154         bool                    ti_no_idle_on_init;
 155         bool                    ti_no_idle;
 156 };
 157
 158 /*
 159  * All sysc seems to have a reg["rev"] register.
 160  * Lets use that for identification of which module the driver are connected to.
 161  */
 162 uint64_t
 163 ti_sysc_get_rev_address(device_t dev) {
 164         struct ti_sysc_softc *sc = device_get_softc(dev);
 165
 166         return (sc->reg[REG_REV].address);
 167 }
 168
 169 uint64_t
 170 ti_sysc_get_rev_address_offset_host(device_t dev) {
 171         struct ti_sysc_softc *sc = device_get_softc(dev);
 172
 173         return (sc->offset_reg[REG_REV]);
 174 }
 175
 176 uint64_t
 177 ti_sysc_get_sysc_address(device_t dev) {
 178         struct ti_sysc_softc *sc = device_get_softc(dev);
 179
 180         return (sc->reg[REG_SYSC].address);
 181 }
 182
 183 uint64_t
 184 ti_sysc_get_sysc_address_offset_host(device_t dev) {
 185         struct ti_sysc_softc *sc = device_get_softc(dev);
 186
 187         return (sc->offset_reg[REG_SYSC]);
 188 }
 189
 190 uint64_t
 191 ti_sysc_get_syss_address(device_t dev) {
 192         struct ti_sysc_softc *sc = device_get_softc(dev);
 193
 194         return (sc->reg[REG_SYSS].address);
 195 }
 196
 197 uint64_t
 198 ti_sysc_get_syss_address_offset_host(device_t dev) {
 199         struct ti_sysc_softc *sc = device_get_softc(dev);
 200
 201         return (sc->offset_reg[REG_SYSS]);
 202 }
 203
 204 /*
 205  * Due no memory region is assigned the sysc driver the children needs to
 206  * handle the practical read/writes to the registers.
 207  * Check if sysc has reset bit.
 208  */
 209 uint32_t
 210 ti_sysc_get_soft_reset_bit(device_t dev) {
 211         struct ti_sysc_softc *sc = device_get_softc(dev);
 212         switch (sc->device_type) {
 213                 case TI_SYSC_OMAP4_TIMER:
 214                 case TI_SYSC_OMAP4_SIMPLE:
 215                 case TI_SYSC_OMAP4:
 216                         if (sc->ti_sysc_mask & SYSC_OMAP4_SOFTRESET) {
 217                                 return (SYSC_OMAP4_SOFTRESET);
 218                         }
 219                         break;
 220
 221                 case TI_SYSC_OMAP2_TIMER:
 222                 case TI_SYSC_OMAP2:
 223                 case TI_SYSC:
 224                         if (sc->ti_sysc_mask & SYSC_OMAP2_SOFTRESET) {
 225                                 return (SYSC_OMAP2_SOFTRESET);
 226                         }
 227                         break;
 228                 default:
 229                         break;
 230         }
 231
 232         return (0);
 233 }
 234
 235 int
 236 ti_sysc_clock_enable(device_t dev) {
 237         struct clk_list *clkp, *clkp_tmp;
 238         struct ti_sysc_softc *sc = device_get_softc(dev);
 239         int err;
 240
 241         TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
 242                 err = clk_enable(clkp->clk);
 243
 244                 if (err) {
 245                         DPRINTF(sc->dev, "clk_enable %s failed %d\n",
 246                                 clk_get_name(clkp->clk), err);
 247                         break;
 248                 }
 249         }
 250         return (err);
 251 }
 252
 253 int
 254 ti_sysc_clock_disable(device_t dev) {
 255         struct clk_list *clkp, *clkp_tmp;
 256         struct ti_sysc_softc *sc = device_get_softc(dev);
 257         int err = 0;
 258
 259         TAILQ_FOREACH_SAFE(clkp, &sc->clk_list, next, clkp_tmp) {
 260                 err = clk_disable(clkp->clk);
 261
 262                 if (err) {
 263                         DPRINTF(sc->dev, "clk_enable %s failed %d\n",
 264                                 clk_get_name(clkp->clk), err);
 265                         break;
 266                 }
 267         }
 268         return (err);
 269 }
 270
 271 static int
 272 parse_regfields(struct ti_sysc_softc *sc) {
 273         phandle_t node;
 274         uint32_t parent_address_cells;
 275         uint32_t parent_size_cells;
 276         cell_t *reg;
 277         ssize_t nreg;
 278         int err, k, reg_i, prop_idx;
 279         uint32_t idx;
 280
 281         node = ofw_bus_get_node(sc->dev);
 282
 283         /* Get parents address and size properties */
 284         err = OF_searchencprop(OF_parent(node), "#address-cells",
 285                 &parent_address_cells, sizeof(parent_address_cells));
 286         if (err == -1)
 287                 return (ENXIO);
 288         if (!(parent_address_cells == 1 || parent_address_cells == 2)) {
 289                 DPRINTF(sc->dev, "Expect parent #address-cells=[1||2]\n");
 290                 return (ENXIO);
 291         }
 292
 293         err = OF_searchencprop(OF_parent(node), "#size-cells",
 294                 &parent_size_cells, sizeof(parent_size_cells));
 295         if (err == -1)
 296                 return (ENXIO);
 297
 298         if (!(parent_size_cells == 1 || parent_size_cells == 2)) {
 299                 DPRINTF(sc->dev, "Expect parent #size-cells = [1||2]\n");
 300                 return (ENXIO);
 301         }
 302
 303         /* Grab the content of reg properties */
 304         nreg = OF_getproplen(node, "reg");
 305         if (nreg <= 0)
 306                 return (ENXIO);
 307
 308         reg = malloc(nreg, M_DEVBUF, M_WAITOK);
 309         OF_getencprop(node, "reg", reg, nreg);
 310
 311         /* Make sure address & size are 0 */
 312         for (idx = 0; idx < REG_MAX; idx++) {
 313                 sc->reg[idx].address = 0;
 314                 sc->reg[idx].size = 0;
 315         }
 316
 317         /* Loop through reg-names and figure out which reg-name corresponds to
 318          * index populate the values into the reg array.
 319         */
 320         for (idx = 0, reg_i = 0; idx < REG_MAX && reg_i < nreg; idx++) {
 321                 err = ofw_bus_find_string_index(node, "reg-names",
 322                     reg_names[idx], &prop_idx);
 323                 if (err != 0)
 324                         continue;
 325
 326                 for (k = 0; k < parent_address_cells; k++) {
 327                         sc->reg[prop_idx].address <<= 32;
 328                         sc->reg[prop_idx].address |= reg[reg_i++];
 329                 }
 330
 331                 for (k = 0; k < parent_size_cells; k++) {
 332                         sc->reg[prop_idx].size <<= 32;
 333                         sc->reg[prop_idx].size |= reg[reg_i++];
 334                 }
 335
 336                 if (sc->sc.nranges == 0)
 337                         sc->offset_reg[prop_idx] = sc->reg[prop_idx].address;
 338                 else
 339                         sc->offset_reg[prop_idx] = sc->reg[prop_idx].address -
 340                             sc->sc.ranges[REG_REV].host;
 341
 342                 DPRINTF(sc->dev, "reg[%s] address %#jx size %#jx\n",
 343                         reg_names[idx],
 344                         sc->reg[prop_idx].address,
 345                         sc->reg[prop_idx].size);
 346         }
 347         free(reg, M_DEVBUF);
 348         return (0);
 349 }
 350
 351 static void
 352 parse_idle(struct ti_sysc_softc *sc, const char *name, uint32_t *idle) {
 353         phandle_t node;
 354         cell_t  value[SYSC_IDLE_MAX];
 355         int len, no, i;
 356
 357         node = ofw_bus_get_node(sc->dev);
 358
 359         if (!OF_hasprop(node, name)) {
 360                 return;
 361         }
 362
 363         len = OF_getproplen(node, name);
 364         no = len / sizeof(cell_t);
 365         if (no >= SYSC_IDLE_MAX) {
 366                 DPRINTF(sc->dev, "Limit %s\n", name);
 367                 no = SYSC_IDLE_MAX-1;
 368                 len = no * sizeof(cell_t);
 369         }
 370
 371         OF_getencprop(node, name, value, len);
 372         for (i = 0; i < no; i++) {
 373                 idle[i] = value[i];
 374 #if DEBUG_SYSC
 375                 DPRINTF(sc->dev, "%s[%d] = %d ",
 376                         name, i, value[i]);
 377                 switch(value[i]) {
 378                 case SYSC_IDLE_FORCE:
 379                         DPRINTF(sc->dev, "SYSC_IDLE_FORCE\n");
 380                         break;
 381                 case SYSC_IDLE_NO:
 382                         DPRINTF(sc->dev, "SYSC_IDLE_NO\n");
 383                         break;
 384                 case SYSC_IDLE_SMART:
 385                         DPRINTF(sc->dev, "SYSC_IDLE_SMART\n");
 386                         break;
 387                 case SYSC_IDLE_SMART_WKUP:
 388                         DPRINTF(sc->dev, "SYSC_IDLE_SMART_WKUP\n");
 389                         break;
 390                 }
 391 #endif
 392         }
 393         for ( ; i < SYSC_IDLE_MAX; i++)
 394                 idle[i] = -1;
 395 }
 396
 397 static int
 398 ti_sysc_attach_clocks(struct ti_sysc_softc *sc) {
 399         clk_t *clk;
 400         struct clk_list *clkp;
 401         int index, err;
 402
 403         clk = malloc(sc->num_clocks*sizeof(clk_t), M_DEVBUF, M_WAITOK | M_ZERO);
 404
 405         /* Check if all clocks can be found */
 406         for (index = 0; index < sc->num_clocks; index++) {
 407                 err = clk_get_by_ofw_index(sc->dev, 0, index, &clk[index]);
 408
 409                 if (err != 0) {
 410                         free(clk, M_DEVBUF);
 411                         return (1);
 412                 }
 413         }
 414
 415         /* All clocks are found, add to list */
 416         for (index = 0; index < sc->num_clocks; index++) {
 417                 clkp = malloc(sizeof(*clkp), M_DEVBUF, M_WAITOK | M_ZERO);
 418                 clkp->clk = clk[index];
 419                 TAILQ_INSERT_TAIL(&sc->clk_list, clkp, next);
 420         }
 421
 422         /* Release the clk array */
 423         free(clk, M_DEVBUF);
 424         return (0);
 425 }
 426
 427 static int
 428 ti_sysc_simplebus_attach_child(device_t dev) {
 429         device_t cdev;
 430         phandle_t node, child;
 431         struct ti_sysc_softc *sc = device_get_softc(dev);
 432
 433         node = ofw_bus_get_node(sc->dev);
 434
 435         for (child = OF_child(node); child > 0; child = OF_peer(child)) {
 436                 cdev = simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL);
 437                 if (cdev != NULL)
 438                         device_probe_and_attach(cdev);
 439         }
 440         return (0);
 441 }
 442
 443 /* Device interface */
 444 static int
 445 ti_sysc_probe(device_t dev)
 446 {
 447         if (!ofw_bus_status_okay(dev))
 448                 return (ENXIO);
 449
 450         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
 451                 return (ENXIO);
 452
 453         device_set_desc(dev, "TI SYSC Interconnect");
 454
 455         return (BUS_PROBE_DEFAULT);
 456 }
 457
 458 static int
 459 ti_sysc_attach(device_t dev)
 460 {
 461         struct ti_sysc_softc *sc;
 462         phandle_t node;
 463         int err;
 464         cell_t  value;
 465
 466         sc = device_get_softc(dev);
 467         sc->dev = dev;
 468         sc->device_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
 469
 470         node = ofw_bus_get_node(sc->dev);
 471         /* ranges - use simplebus */
 472         simplebus_init(sc->dev, node);
 473         if (simplebus_fill_ranges(node, &sc->sc) < 0) {
 474                 DPRINTF(sc->dev, "could not get ranges\n");
 475                 return (ENXIO);
 476         }
 477
 478         if (sc->sc.nranges == 0) {
 479                 DPRINTF(sc->dev, "nranges == 0\n");
 480                 return (ENXIO);
 481         }
 482
 483         /* Required field reg & reg-names - assume at least "rev" exists */
 484         err = parse_regfields(sc);
 485         if (err) {
 486                 DPRINTF(sc->dev, "parse_regfields failed %d\n", err);
 487                 return (ENXIO);
 488         }
 489
 490         /* Optional */
 491         if (OF_hasprop(node, "ti,sysc-mask")) {
 492                 OF_getencprop(node, "ti,sysc-mask", &value, sizeof(cell_t));
 493                 sc->ti_sysc_mask = value;
 494         }
 495         if (OF_hasprop(node, "ti,syss-mask")) {
 496                 OF_getencprop(node, "ti,syss-mask", &value, sizeof(cell_t));
 497                 sc->ti_syss_mask = value;
 498         }
 499         if (OF_hasprop(node, "ti,sysc-delay-us")) {
 500                 OF_getencprop(node, "ti,sysc-delay-us", &value, sizeof(cell_t));
 501                 sc->ti_sysc_delay_us = value;
 502         }
 503
 504         DPRINTF(sc->dev, "sysc_mask %x syss_mask %x delay_us %x\n",
 505                 sc->ti_sysc_mask, sc->ti_syss_mask, sc->ti_sysc_delay_us);
 506
 507         parse_idle(sc, "ti,sysc-midle", sc->ti_sysc_midle);
 508         parse_idle(sc, "ti,sysc-sidle", sc->ti_sysc_sidle);
 509
 510         if (OF_hasprop(node, "ti,no-reset-on-init"))
 511                 sc->ti_no_reset_on_init = true;
 512         else
 513                 sc->ti_no_reset_on_init = false;
 514
 515         if (OF_hasprop(node, "ti,no-idle-on-init"))
 516                 sc->ti_no_idle_on_init = true;
 517         else
 518                 sc->ti_no_idle_on_init = false;
 519
 520         if (OF_hasprop(node, "ti,no-idle"))
 521                 sc->ti_no_idle = true;
 522         else
 523                 sc->ti_no_idle = false;
 524
 525         DPRINTF(sc->dev,
 526                 "no-reset-on-init %d, no-idle-on-init %d, no-idle %d\n",
 527                 sc->ti_no_reset_on_init,
 528                 sc->ti_no_idle_on_init,
 529                 sc->ti_no_idle);
 530
 531         if (OF_hasprop(node, "clocks")) {
 532                 struct clock_cell_info cell_info;
 533                 read_clock_cells(sc->dev, &cell_info);
 534                 free(cell_info.clock_cells, M_DEVBUF);
 535                 free(cell_info.clock_cells_ncells, M_DEVBUF);
 536
 537                 sc->num_clocks = cell_info.num_real_clocks;
 538                 TAILQ_INIT(&sc->clk_list);
 539
 540                 err = ti_sysc_attach_clocks(sc);
 541                 if (err) {
 542                         DPRINTF(sc->dev, "Failed to attach clocks\n");
 543                         return (bus_generic_attach(sc->dev));
 544                 }
 545         }
 546
 547         err = ti_sysc_simplebus_attach_child(sc->dev);
 548         if (err) {
 549                 DPRINTF(sc->dev, "ti_sysc_simplebus_attach_child %d\n",
 550                     err);
 551                 return (err);
 552         }
 553
 554         sc->attach_done = true;
 555
 556         return (bus_generic_attach(sc->dev));
 557 }
 558
 559 static int
 560 ti_sysc_detach(device_t dev)
 561 {
 562         return (EBUSY);
 563 }
 564
 565 /* Bus interface */
 566 static void
 567 ti_sysc_new_pass(device_t dev)
 568 {
 569         struct ti_sysc_softc *sc;
 570         int err;
 571         phandle_t node;
 572
 573         sc = device_get_softc(dev);
 574
 575         if (sc->attach_done) {
 576                 bus_generic_new_pass(sc->dev);
 577                 return;
 578         }
 579
 580         node = ofw_bus_get_node(sc->dev);
 581         if (OF_hasprop(node, "clocks")) {
 582                 err = ti_sysc_attach_clocks(sc);
 583                 if (err) {
 584                         DPRINTF(sc->dev, "Failed to attach clocks\n");
 585                         return;
 586                 }
 587         }
 588
 589         err = ti_sysc_simplebus_attach_child(sc->dev);
 590         if (err) {
 591                 DPRINTF(sc->dev,
 592                     "ti_sysc_simplebus_attach_child failed %d\n", err);
 593                 return;
 594         }
 595         sc->attach_done = true;
 596
 597         bus_generic_attach(sc->dev);
 598 }
 599
 600 static device_method_t ti_sysc_methods[] = {
 601         /* Device interface */
 602         DEVMETHOD(device_probe,         ti_sysc_probe),
 603         DEVMETHOD(device_attach,        ti_sysc_attach),
 604         DEVMETHOD(device_detach,        ti_sysc_detach),
 605
 606         /* Bus interface */
 607         DEVMETHOD(bus_new_pass,         ti_sysc_new_pass),
 608
 609         DEVMETHOD_END
 610 };
 611
 612 DEFINE_CLASS_1(ti_sysc, ti_sysc_driver, ti_sysc_methods,
 613         sizeof(struct ti_sysc_softc), simplebus_driver);
 614
 615 EARLY_DRIVER_MODULE(ti_sysc, simplebus, ti_sysc_driver, 0, 0,
 616     BUS_PASS_BUS + BUS_PASS_ORDER_FIRST);