3 * Ben Gray <ben.r.gray@gmail.com>.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
36 #include <sys/module.h>
38 #include <dev/fdt/fdt_common.h>
39 #include <dev/ofw/ofw_bus_subr.h>
41 #include <machine/bus.h>
43 #include <arm/ti/ti_prcm.h>
44 #include <arm/ti/usb/omap_usb.h>
49 #define OMAP_USBTLL_REVISION 0x0000
50 #define OMAP_USBTLL_SYSCONFIG 0x0010
51 #define OMAP_USBTLL_SYSSTATUS 0x0014
52 #define OMAP_USBTLL_IRQSTATUS 0x0018
53 #define OMAP_USBTLL_IRQENABLE 0x001C
54 #define OMAP_USBTLL_TLL_SHARED_CONF 0x0030
55 #define OMAP_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i)))
56 #define OMAP_USBTLL_SAR_CNTX(i) (0x0400 + (0x04 * (i)))
57 #define OMAP_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i)))
58 #define OMAP_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i)))
59 #define OMAP_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i)))
60 #define OMAP_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i)))
61 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i)))
62 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i)))
63 #define OMAP_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i)))
64 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i)))
65 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i)))
66 #define OMAP_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i)))
67 #define OMAP_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i)))
68 #define OMAP_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i)))
69 #define OMAP_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i)))
70 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i)))
71 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i)))
72 #define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i)))
73 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i)))
74 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i)))
75 #define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i)))
76 #define OMAP_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i)))
77 #define OMAP_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i)))
78 #define OMAP_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i)))
79 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i)))
80 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i)))
81 #define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i)))
82 #define OMAP_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i)))
83 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i)))
84 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i)))
85 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i)))
86 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i)))
87 #define OMAP_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i)))
88 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i)))
89 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i)))
90 #define OMAP_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i)))
91 #define OMAP_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i)))
92 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i)))
93 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i)))
94 #define OMAP_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i)))
95 #define OMAP_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i)))
96 #define OMAP_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i)))
98 /* TLL Register Set */
99 #define TLL_SYSCONFIG_CACTIVITY (1UL << 8)
100 #define TLL_SYSCONFIG_SIDLE_SMART_IDLE (2UL << 3)
101 #define TLL_SYSCONFIG_SIDLE_NO_IDLE (1UL << 3)
102 #define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3)
103 #define TLL_SYSCONFIG_ENAWAKEUP (1UL << 2)
104 #define TLL_SYSCONFIG_SOFTRESET (1UL << 1)
105 #define TLL_SYSCONFIG_AUTOIDLE (1UL << 0)
107 #define TLL_SYSSTATUS_RESETDONE (1UL << 0)
109 #define TLL_SHARED_CONF_USB_90D_DDR_EN (1UL << 6)
110 #define TLL_SHARED_CONF_USB_180D_SDR_EN (1UL << 5)
111 #define TLL_SHARED_CONF_USB_DIVRATIO_MASK (7UL << 2)
112 #define TLL_SHARED_CONF_USB_DIVRATIO_128 (7UL << 2)
113 #define TLL_SHARED_CONF_USB_DIVRATIO_64 (6UL << 2)
114 #define TLL_SHARED_CONF_USB_DIVRATIO_32 (5UL << 2)
115 #define TLL_SHARED_CONF_USB_DIVRATIO_16 (4UL << 2)
116 #define TLL_SHARED_CONF_USB_DIVRATIO_8 (3UL << 2)
117 #define TLL_SHARED_CONF_USB_DIVRATIO_4 (2UL << 2)
118 #define TLL_SHARED_CONF_USB_DIVRATIO_2 (1UL << 2)
119 #define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2)
120 #define TLL_SHARED_CONF_FCLK_REQ (1UL << 1)
121 #define TLL_SHARED_CONF_FCLK_IS_ON (1UL << 0)
123 #define TLL_CHANNEL_CONF_DRVVBUS (1UL << 16)
124 #define TLL_CHANNEL_CONF_CHRGVBUS (1UL << 15)
125 #define TLL_CHANNEL_CONF_ULPINOBITSTUFF (1UL << 11)
126 #define TLL_CHANNEL_CONF_ULPIAUTOIDLE (1UL << 10)
127 #define TLL_CHANNEL_CONF_UTMIAUTOIDLE (1UL << 9)
128 #define TLL_CHANNEL_CONF_ULPIDDRMODE (1UL << 8)
129 #define TLL_CHANNEL_CONF_ULPIOUTCLKMODE (1UL << 7)
130 #define TLL_CHANNEL_CONF_TLLFULLSPEED (1UL << 6)
131 #define TLL_CHANNEL_CONF_TLLCONNECT (1UL << 5)
132 #define TLL_CHANNEL_CONF_TLLATTACH (1UL << 4)
133 #define TLL_CHANNEL_CONF_UTMIISADEV (1UL << 3)
134 #define TLL_CHANNEL_CONF_CHANEN (1UL << 0)
136 struct omap_tll_softc {
139 /* TLL register set */
140 struct resource* tll_mem_res;
144 static struct omap_tll_softc *omap_tll_sc;
146 static int omap_tll_attach(device_t dev);
147 static int omap_tll_detach(device_t dev);
149 static inline uint32_t
150 omap_tll_read_4(struct omap_tll_softc *sc, bus_size_t off)
152 return bus_read_4(sc->tll_mem_res, off);
156 omap_tll_write_4(struct omap_tll_softc *sc, bus_size_t off, uint32_t val)
158 bus_write_4(sc->tll_mem_res, off, val);
162 omap_tll_utmi_enable(unsigned int en_mask)
164 struct omap_tll_softc *sc;
172 /* There are 3 TLL channels, one per USB controller so set them all up the
173 * same, SDR mode, bit stuffing and no autoidle.
175 for (i=0; i<3; i++) {
176 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i));
178 reg &= ~(TLL_CHANNEL_CONF_UTMIAUTOIDLE
179 | TLL_CHANNEL_CONF_ULPINOBITSTUFF
180 | TLL_CHANNEL_CONF_ULPIDDRMODE);
182 omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg);
185 /* Program the common TLL register */
186 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_SHARED_CONF);
188 reg &= ~( TLL_SHARED_CONF_USB_90D_DDR_EN
189 | TLL_SHARED_CONF_USB_DIVRATIO_MASK);
190 reg |= ( TLL_SHARED_CONF_FCLK_IS_ON
191 | TLL_SHARED_CONF_USB_DIVRATIO_2
192 | TLL_SHARED_CONF_USB_180D_SDR_EN);
194 omap_tll_write_4(sc, OMAP_USBTLL_TLL_SHARED_CONF, reg);
196 /* Enable channels now */
197 for (i = 0; i < 3; i++) {
198 reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i));
200 /* Enable only the reg that is needed */
201 if ((en_mask & (1 << i)) == 0)
204 reg |= TLL_CHANNEL_CONF_CHANEN;
205 omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg);
210 omap_tll_init(struct omap_tll_softc *sc)
212 unsigned long timeout;
215 /* Enable the USB TLL */
216 ti_prcm_clk_enable(USBTLL_CLK);
218 /* Perform TLL soft reset, and wait until reset is complete */
219 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET);
221 /* Set the timeout to 100ms*/
222 timeout = (hz < 10) ? 1 : ((100 * hz) / 1000);
224 /* Wait for TLL reset to complete */
225 while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) &
226 TLL_SYSSTATUS_RESETDONE) == 0x00) {
228 /* Sleep for a tick */
229 pause("USBRESET", 1);
231 if (timeout-- == 0) {
232 device_printf(sc->sc_dev, "TLL reset operation timed out\n");
238 /* CLOCKACTIVITY = 1 : OCP-derived internal clocks ON during idle
239 * SIDLEMODE = 2 : Smart-idle mode. Sidleack asserted after Idlereq
240 * assertion when no more activity on the USB.
241 * ENAWAKEUP = 1 : Wakeup generation enabled
243 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_ENAWAKEUP |
244 TLL_SYSCONFIG_AUTOIDLE |
245 TLL_SYSCONFIG_SIDLE_SMART_IDLE |
246 TLL_SYSCONFIG_CACTIVITY);
251 /* Disable the TLL clocks */
252 ti_prcm_clk_disable(USBTLL_CLK);
258 omap_tll_disable(struct omap_tll_softc *sc)
260 unsigned long timeout;
262 timeout = (hz < 10) ? 1 : ((100 * hz) / 1000);
264 /* Reset the TLL module */
265 omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, 0x0002);
266 while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) & (0x01)) == 0x00) {
267 /* Sleep for a tick */
268 pause("USBRESET", 1);
270 if (timeout-- == 0) {
271 device_printf(sc->sc_dev, "operation timed out\n");
276 /* Disable functional and interface clocks for the TLL and HOST modules */
277 ti_prcm_clk_disable(USBTLL_CLK);
281 omap_tll_probe(device_t dev)
284 if (!ofw_bus_status_okay(dev))
287 if (!ofw_bus_is_compatible(dev, "ti,usbhs-tll"))
290 device_set_desc(dev, "TI OMAP USB 2.0 TLL module");
292 return (BUS_PROBE_DEFAULT);
296 omap_tll_attach(device_t dev)
298 struct omap_tll_softc *sc;
300 sc = device_get_softc(dev);
301 /* save the device */
304 /* Allocate resource for the TLL register set */
306 sc->tll_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
307 &sc->tll_mem_rid, RF_ACTIVE);
308 if (!sc->tll_mem_res) {
309 device_printf(dev, "Error: Could not map TLL memory\n");
320 omap_tll_detach(dev);
325 omap_tll_detach(device_t dev)
327 struct omap_tll_softc *sc;
329 sc = device_get_softc(dev);
330 omap_tll_disable(sc);
332 /* Release the other register set memory maps */
333 if (sc->tll_mem_res) {
334 bus_release_resource(dev, SYS_RES_MEMORY,
335 sc->tll_mem_rid, sc->tll_mem_res);
336 sc->tll_mem_res = NULL;
344 static device_method_t omap_tll_methods[] = {
345 /* Device interface */
346 DEVMETHOD(device_probe, omap_tll_probe),
347 DEVMETHOD(device_attach, omap_tll_attach),
348 DEVMETHOD(device_detach, omap_tll_detach),
349 DEVMETHOD(device_suspend, bus_generic_suspend),
350 DEVMETHOD(device_resume, bus_generic_resume),
351 DEVMETHOD(device_shutdown, bus_generic_shutdown),
356 static driver_t omap_tll_driver = {
359 sizeof(struct omap_tll_softc),
362 static devclass_t omap_tll_devclass;
364 DRIVER_MODULE(omap_tll, simplebus, omap_tll_driver, omap_tll_devclass, 0, 0);