2 * Copyright (c) 2012-2017 Oleksandr Tymoshenko <gonzo@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/kernel.h>
35 #include <sys/module.h>
38 #include <machine/bus.h>
39 #include <machine/intr.h>
41 #include <dev/ofw/openfirm.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
48 #define dprintf(fmt, args...) printf(fmt, ##args)
50 #define dprintf(fmt, args...)
53 #define SIC_STATUS 0x00
54 #define SIC_RAWSTAT 0x04
55 #define SIC_ENABLE 0x08
56 #define SIC_ENSET 0x08
57 #define SIC_ENCLR 0x0C
58 #define SIC_SOFTINTSET 0x10
59 #define SIC_SOFTINTCLR 0x14
60 #define SIC_PICENABLE 0x20
61 #define SIC_PICENSET 0x20
62 #define SIC_PICENCLR 0x24
66 struct versatile_sic_irqsrc {
67 struct intr_irqsrc isrc;
71 struct versatile_sic_softc {
74 struct resource * mem_res;
75 struct resource * irq_res;
77 struct versatile_sic_irqsrc isrcs[SIC_NIRQS];
80 #define SIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
81 #define SIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
83 #define SIC_READ_4(sc, reg) \
84 bus_read_4(sc->mem_res, (reg))
85 #define SIC_WRITE_4(sc, reg, val) \
86 bus_write_4(sc->mem_res, (reg), (val))
91 static int versatile_sic_probe(device_t);
92 static int versatile_sic_attach(device_t);
93 static int versatile_sic_detach(device_t);
96 versatile_sic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
98 struct versatile_sic_softc *sc;
99 struct versatile_sic_irqsrc *src;
101 sc = device_get_softc(dev);
102 src = (struct versatile_sic_irqsrc *)isrc;
105 SIC_WRITE_4(sc, SIC_ENCLR, (1 << src->irq));
110 versatile_sic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
112 struct versatile_sic_softc *sc;
113 struct versatile_sic_irqsrc *src;
115 sc = device_get_softc(dev);
116 src = (struct versatile_sic_irqsrc *)isrc;
119 SIC_WRITE_4(sc, SIC_ENSET, (1 << src->irq));
124 versatile_sic_map_intr(device_t dev, struct intr_map_data *data,
125 struct intr_irqsrc **isrcp)
127 struct intr_map_data_fdt *daf;
128 struct versatile_sic_softc *sc;
130 if (data->type != INTR_MAP_DATA_FDT)
133 daf = (struct intr_map_data_fdt *)data;
134 if (daf->ncells != 1 || daf->cells[0] >= SIC_NIRQS)
137 sc = device_get_softc(dev);
138 *isrcp = &sc->isrcs[daf->cells[0]].isrc;
143 versatile_sic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
145 versatile_sic_disable_intr(dev, isrc);
149 versatile_sic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
151 struct versatile_sic_irqsrc *src;
153 src = (struct versatile_sic_irqsrc *)isrc;
154 arm_irq_memory_barrier(src->irq);
155 versatile_sic_enable_intr(dev, isrc);
159 versatile_sic_post_filter(device_t dev, struct intr_irqsrc *isrc)
161 struct versatile_sic_irqsrc *src;
163 src = (struct versatile_sic_irqsrc *)isrc;
164 arm_irq_memory_barrier(src->irq);
168 versatile_sic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
169 struct resource *res, struct intr_map_data *data)
176 versatile_sic_filter(void *arg)
178 struct versatile_sic_softc *sc;
179 struct intr_irqsrc *isrc;
180 uint32_t i, interrupts;
184 interrupts = SIC_READ_4(sc, SIC_STATUS);
186 for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
187 if ((interrupts & 0x1) == 0)
189 isrc = &sc->isrcs[i].isrc;
190 if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
191 versatile_sic_disable_intr(sc->dev, isrc);
192 versatile_sic_post_filter(sc->dev, isrc);
193 device_printf(sc->dev, "Stray irq %u disabled\n", i);
197 return (FILTER_HANDLED);
201 versatile_sic_probe(device_t dev)
204 if (!ofw_bus_status_okay(dev))
207 if (!ofw_bus_is_compatible(dev, "arm,versatile-sic"))
209 device_set_desc(dev, "ARM Versatile SIC");
210 return (BUS_PROBE_DEFAULT);
214 versatile_sic_attach(device_t dev)
216 struct versatile_sic_softc *sc = device_get_softc(dev);
220 struct versatile_sic_irqsrc *isrcs;
223 mtx_init(&sc->mtx, device_get_nameunit(dev), "sic",
226 /* Request memory resources */
228 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
230 if (sc->mem_res == NULL) {
231 device_printf(dev, "Error: could not allocate memory resources\n");
235 /* Request memory resources */
237 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
239 if (sc->irq_res == NULL) {
240 device_printf(dev, "could not allocate IRQ resources\n");
241 versatile_sic_detach(dev);
245 if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
246 versatile_sic_filter, NULL, sc, &sc->intrh))) {
248 "unable to register interrupt handler\n");
249 versatile_sic_detach(dev);
253 /* Disable all interrupts on SIC */
254 SIC_WRITE_4(sc, SIC_ENCLR, 0xffffffff);
258 name = device_get_nameunit(sc->dev);
259 for (irq = 0; irq < SIC_NIRQS; irq++) {
260 isrcs[irq].irq = irq;
261 error = intr_isrc_register(&isrcs[irq].isrc, sc->dev,
262 0, "%s,%u", name, irq);
267 intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
273 versatile_sic_detach(device_t dev)
275 struct versatile_sic_softc *sc;
277 sc = device_get_softc(dev);
280 bus_teardown_intr(dev, sc->irq_res, sc->intrh);
282 if (sc->mem_res == NULL)
283 bus_release_resource(dev, SYS_RES_MEMORY,
284 rman_get_rid(sc->mem_res), sc->mem_res);
286 if (sc->irq_res == NULL)
287 bus_release_resource(dev, SYS_RES_IRQ,
288 rman_get_rid(sc->irq_res), sc->irq_res);
290 mtx_destroy(&sc->mtx);
296 static device_method_t versatile_sic_methods[] = {
297 DEVMETHOD(device_probe, versatile_sic_probe),
298 DEVMETHOD(device_attach, versatile_sic_attach),
299 DEVMETHOD(device_detach, versatile_sic_detach),
301 DEVMETHOD(pic_disable_intr, versatile_sic_disable_intr),
302 DEVMETHOD(pic_enable_intr, versatile_sic_enable_intr),
303 DEVMETHOD(pic_map_intr, versatile_sic_map_intr),
304 DEVMETHOD(pic_post_filter, versatile_sic_post_filter),
305 DEVMETHOD(pic_post_ithread, versatile_sic_post_ithread),
306 DEVMETHOD(pic_pre_ithread, versatile_sic_pre_ithread),
307 DEVMETHOD(pic_setup_intr, versatile_sic_setup_intr),
312 static driver_t versatile_sic_driver = {
314 versatile_sic_methods,
315 sizeof(struct versatile_sic_softc),
318 static devclass_t versatile_sic_devclass;
320 DRIVER_MODULE(sic, simplebus, versatile_sic_driver, versatile_sic_devclass, 0, 0);