2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2012-2017 Oleksandr Tymoshenko <gonzo@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/module.h>
40 #include <machine/bus.h>
41 #include <machine/intr.h>
43 #include <dev/ofw/openfirm.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
50 #define dprintf(fmt, args...) printf(fmt, ##args)
52 #define dprintf(fmt, args...)
55 #define SIC_STATUS 0x00
56 #define SIC_RAWSTAT 0x04
57 #define SIC_ENABLE 0x08
58 #define SIC_ENSET 0x08
59 #define SIC_ENCLR 0x0C
60 #define SIC_SOFTINTSET 0x10
61 #define SIC_SOFTINTCLR 0x14
62 #define SIC_PICENABLE 0x20
63 #define SIC_PICENSET 0x20
64 #define SIC_PICENCLR 0x24
68 struct versatile_sic_irqsrc {
69 struct intr_irqsrc isrc;
73 struct versatile_sic_softc {
76 struct resource * mem_res;
77 struct resource * irq_res;
79 struct versatile_sic_irqsrc isrcs[SIC_NIRQS];
82 #define SIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
83 #define SIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
85 #define SIC_READ_4(sc, reg) \
86 bus_read_4(sc->mem_res, (reg))
87 #define SIC_WRITE_4(sc, reg, val) \
88 bus_write_4(sc->mem_res, (reg), (val))
93 static int versatile_sic_probe(device_t);
94 static int versatile_sic_attach(device_t);
95 static int versatile_sic_detach(device_t);
98 versatile_sic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
100 struct versatile_sic_softc *sc;
101 struct versatile_sic_irqsrc *src;
103 sc = device_get_softc(dev);
104 src = (struct versatile_sic_irqsrc *)isrc;
107 SIC_WRITE_4(sc, SIC_ENCLR, (1 << src->irq));
112 versatile_sic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
114 struct versatile_sic_softc *sc;
115 struct versatile_sic_irqsrc *src;
117 sc = device_get_softc(dev);
118 src = (struct versatile_sic_irqsrc *)isrc;
121 SIC_WRITE_4(sc, SIC_ENSET, (1 << src->irq));
126 versatile_sic_map_intr(device_t dev, struct intr_map_data *data,
127 struct intr_irqsrc **isrcp)
129 struct intr_map_data_fdt *daf;
130 struct versatile_sic_softc *sc;
132 if (data->type != INTR_MAP_DATA_FDT)
135 daf = (struct intr_map_data_fdt *)data;
136 if (daf->ncells != 1 || daf->cells[0] >= SIC_NIRQS)
139 sc = device_get_softc(dev);
140 *isrcp = &sc->isrcs[daf->cells[0]].isrc;
145 versatile_sic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
147 versatile_sic_disable_intr(dev, isrc);
151 versatile_sic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
153 struct versatile_sic_irqsrc *src;
155 src = (struct versatile_sic_irqsrc *)isrc;
156 arm_irq_memory_barrier(src->irq);
157 versatile_sic_enable_intr(dev, isrc);
161 versatile_sic_post_filter(device_t dev, struct intr_irqsrc *isrc)
163 struct versatile_sic_irqsrc *src;
165 src = (struct versatile_sic_irqsrc *)isrc;
166 arm_irq_memory_barrier(src->irq);
170 versatile_sic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
171 struct resource *res, struct intr_map_data *data)
178 versatile_sic_filter(void *arg)
180 struct versatile_sic_softc *sc;
181 struct intr_irqsrc *isrc;
182 uint32_t i, interrupts;
186 interrupts = SIC_READ_4(sc, SIC_STATUS);
188 for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
189 if ((interrupts & 0x1) == 0)
191 isrc = &sc->isrcs[i].isrc;
192 if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
193 versatile_sic_disable_intr(sc->dev, isrc);
194 versatile_sic_post_filter(sc->dev, isrc);
195 device_printf(sc->dev, "Stray irq %u disabled\n", i);
199 return (FILTER_HANDLED);
203 versatile_sic_probe(device_t dev)
206 if (!ofw_bus_status_okay(dev))
209 if (!ofw_bus_is_compatible(dev, "arm,versatile-sic"))
211 device_set_desc(dev, "ARM Versatile SIC");
212 return (BUS_PROBE_DEFAULT);
216 versatile_sic_attach(device_t dev)
218 struct versatile_sic_softc *sc = device_get_softc(dev);
222 struct versatile_sic_irqsrc *isrcs;
225 mtx_init(&sc->mtx, device_get_nameunit(dev), "sic",
228 /* Request memory resources */
230 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
232 if (sc->mem_res == NULL) {
233 device_printf(dev, "Error: could not allocate memory resources\n");
237 /* Request memory resources */
239 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
241 if (sc->irq_res == NULL) {
242 device_printf(dev, "could not allocate IRQ resources\n");
243 versatile_sic_detach(dev);
247 if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
248 versatile_sic_filter, NULL, sc, &sc->intrh))) {
250 "unable to register interrupt handler\n");
251 versatile_sic_detach(dev);
255 /* Disable all interrupts on SIC */
256 SIC_WRITE_4(sc, SIC_ENCLR, 0xffffffff);
260 name = device_get_nameunit(sc->dev);
261 for (irq = 0; irq < SIC_NIRQS; irq++) {
262 isrcs[irq].irq = irq;
263 error = intr_isrc_register(&isrcs[irq].isrc, sc->dev,
264 0, "%s,%u", name, irq);
269 intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
275 versatile_sic_detach(device_t dev)
277 struct versatile_sic_softc *sc;
279 sc = device_get_softc(dev);
282 bus_teardown_intr(dev, sc->irq_res, sc->intrh);
284 if (sc->mem_res == NULL)
285 bus_release_resource(dev, SYS_RES_MEMORY,
286 rman_get_rid(sc->mem_res), sc->mem_res);
288 if (sc->irq_res == NULL)
289 bus_release_resource(dev, SYS_RES_IRQ,
290 rman_get_rid(sc->irq_res), sc->irq_res);
292 mtx_destroy(&sc->mtx);
298 static device_method_t versatile_sic_methods[] = {
299 DEVMETHOD(device_probe, versatile_sic_probe),
300 DEVMETHOD(device_attach, versatile_sic_attach),
301 DEVMETHOD(device_detach, versatile_sic_detach),
303 DEVMETHOD(pic_disable_intr, versatile_sic_disable_intr),
304 DEVMETHOD(pic_enable_intr, versatile_sic_enable_intr),
305 DEVMETHOD(pic_map_intr, versatile_sic_map_intr),
306 DEVMETHOD(pic_post_filter, versatile_sic_post_filter),
307 DEVMETHOD(pic_post_ithread, versatile_sic_post_ithread),
308 DEVMETHOD(pic_pre_ithread, versatile_sic_pre_ithread),
309 DEVMETHOD(pic_setup_intr, versatile_sic_setup_intr),
314 static driver_t versatile_sic_driver = {
316 versatile_sic_methods,
317 sizeof(struct versatile_sic_softc),
320 static devclass_t versatile_sic_devclass;
322 DRIVER_MODULE(sic, simplebus, versatile_sic_driver, versatile_sic_devclass, 0, 0);