2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2012-2017 Oleksandr Tymoshenko <gonzo@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
42 #include <machine/bus.h>
43 #include <machine/intr.h>
45 #include <dev/ofw/openfirm.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
52 #define dprintf(fmt, args...) printf(fmt, ##args)
54 #define dprintf(fmt, args...)
57 #define SIC_STATUS 0x00
58 #define SIC_RAWSTAT 0x04
59 #define SIC_ENABLE 0x08
60 #define SIC_ENSET 0x08
61 #define SIC_ENCLR 0x0C
62 #define SIC_SOFTINTSET 0x10
63 #define SIC_SOFTINTCLR 0x14
64 #define SIC_PICENABLE 0x20
65 #define SIC_PICENSET 0x20
66 #define SIC_PICENCLR 0x24
70 struct versatile_sic_irqsrc {
71 struct intr_irqsrc isrc;
75 struct versatile_sic_softc {
78 struct resource * mem_res;
79 struct resource * irq_res;
81 struct versatile_sic_irqsrc isrcs[SIC_NIRQS];
84 #define SIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
85 #define SIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
87 #define SIC_READ_4(sc, reg) \
88 bus_read_4(sc->mem_res, (reg))
89 #define SIC_WRITE_4(sc, reg, val) \
90 bus_write_4(sc->mem_res, (reg), (val))
95 static int versatile_sic_probe(device_t);
96 static int versatile_sic_attach(device_t);
97 static int versatile_sic_detach(device_t);
100 versatile_sic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
102 struct versatile_sic_softc *sc;
103 struct versatile_sic_irqsrc *src;
105 sc = device_get_softc(dev);
106 src = (struct versatile_sic_irqsrc *)isrc;
109 SIC_WRITE_4(sc, SIC_ENCLR, (1 << src->irq));
114 versatile_sic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
116 struct versatile_sic_softc *sc;
117 struct versatile_sic_irqsrc *src;
119 sc = device_get_softc(dev);
120 src = (struct versatile_sic_irqsrc *)isrc;
123 SIC_WRITE_4(sc, SIC_ENSET, (1 << src->irq));
128 versatile_sic_map_intr(device_t dev, struct intr_map_data *data,
129 struct intr_irqsrc **isrcp)
131 struct intr_map_data_fdt *daf;
132 struct versatile_sic_softc *sc;
134 if (data->type != INTR_MAP_DATA_FDT)
137 daf = (struct intr_map_data_fdt *)data;
138 if (daf->ncells != 1 || daf->cells[0] >= SIC_NIRQS)
141 sc = device_get_softc(dev);
142 *isrcp = &sc->isrcs[daf->cells[0]].isrc;
147 versatile_sic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
149 versatile_sic_disable_intr(dev, isrc);
153 versatile_sic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
155 struct versatile_sic_irqsrc *src;
157 src = (struct versatile_sic_irqsrc *)isrc;
158 arm_irq_memory_barrier(src->irq);
159 versatile_sic_enable_intr(dev, isrc);
163 versatile_sic_post_filter(device_t dev, struct intr_irqsrc *isrc)
165 struct versatile_sic_irqsrc *src;
167 src = (struct versatile_sic_irqsrc *)isrc;
168 arm_irq_memory_barrier(src->irq);
172 versatile_sic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
173 struct resource *res, struct intr_map_data *data)
180 versatile_sic_filter(void *arg)
182 struct versatile_sic_softc *sc;
183 struct intr_irqsrc *isrc;
184 uint32_t i, interrupts;
188 interrupts = SIC_READ_4(sc, SIC_STATUS);
190 for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
191 if ((interrupts & 0x1) == 0)
193 isrc = &sc->isrcs[i].isrc;
194 if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
195 versatile_sic_disable_intr(sc->dev, isrc);
196 versatile_sic_post_filter(sc->dev, isrc);
197 device_printf(sc->dev, "Stray irq %u disabled\n", i);
201 return (FILTER_HANDLED);
205 versatile_sic_probe(device_t dev)
208 if (!ofw_bus_status_okay(dev))
211 if (!ofw_bus_is_compatible(dev, "arm,versatile-sic"))
213 device_set_desc(dev, "ARM Versatile SIC");
214 return (BUS_PROBE_DEFAULT);
218 versatile_sic_attach(device_t dev)
220 struct versatile_sic_softc *sc = device_get_softc(dev);
224 struct versatile_sic_irqsrc *isrcs;
227 mtx_init(&sc->mtx, device_get_nameunit(dev), "sic",
230 /* Request memory resources */
232 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
234 if (sc->mem_res == NULL) {
235 device_printf(dev, "Error: could not allocate memory resources\n");
239 /* Request memory resources */
241 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
243 if (sc->irq_res == NULL) {
244 device_printf(dev, "could not allocate IRQ resources\n");
245 versatile_sic_detach(dev);
249 if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
250 versatile_sic_filter, NULL, sc, &sc->intrh))) {
252 "unable to register interrupt handler\n");
253 versatile_sic_detach(dev);
257 /* Disable all interrupts on SIC */
258 SIC_WRITE_4(sc, SIC_ENCLR, 0xffffffff);
262 name = device_get_nameunit(sc->dev);
263 for (irq = 0; irq < SIC_NIRQS; irq++) {
264 isrcs[irq].irq = irq;
265 error = intr_isrc_register(&isrcs[irq].isrc, sc->dev,
266 0, "%s,%u", name, irq);
271 intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
277 versatile_sic_detach(device_t dev)
279 struct versatile_sic_softc *sc;
281 sc = device_get_softc(dev);
284 bus_teardown_intr(dev, sc->irq_res, sc->intrh);
286 if (sc->mem_res == NULL)
287 bus_release_resource(dev, SYS_RES_MEMORY,
288 rman_get_rid(sc->mem_res), sc->mem_res);
290 if (sc->irq_res == NULL)
291 bus_release_resource(dev, SYS_RES_IRQ,
292 rman_get_rid(sc->irq_res), sc->irq_res);
294 mtx_destroy(&sc->mtx);
300 static device_method_t versatile_sic_methods[] = {
301 DEVMETHOD(device_probe, versatile_sic_probe),
302 DEVMETHOD(device_attach, versatile_sic_attach),
303 DEVMETHOD(device_detach, versatile_sic_detach),
305 DEVMETHOD(pic_disable_intr, versatile_sic_disable_intr),
306 DEVMETHOD(pic_enable_intr, versatile_sic_enable_intr),
307 DEVMETHOD(pic_map_intr, versatile_sic_map_intr),
308 DEVMETHOD(pic_post_filter, versatile_sic_post_filter),
309 DEVMETHOD(pic_post_ithread, versatile_sic_post_ithread),
310 DEVMETHOD(pic_pre_ithread, versatile_sic_pre_ithread),
311 DEVMETHOD(pic_setup_intr, versatile_sic_setup_intr),
316 static driver_t versatile_sic_driver = {
318 versatile_sic_methods,
319 sizeof(struct versatile_sic_softc),
322 static devclass_t versatile_sic_devclass;
324 DRIVER_MODULE(sic, simplebus, versatile_sic_driver, versatile_sic_devclass, 0, 0);