2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2012-2013 Thomas Skibo
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * A host-controller driver for Zynq-7000's USB OTG controller.
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
33 * (v1.4) November 16, 2012. Xilinx doc UG585. Ch. 15 covers the USB
34 * controller and register definitions are in appendix B.34.
37 #include <sys/cdefs.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
46 #include <sys/condvar.h>
47 #include <sys/resource.h>
50 #include <machine/bus.h>
51 #include <machine/resource.h>
52 #include <machine/stdarg.h>
54 #include <dev/ofw/ofw_bus.h>
55 #include <dev/ofw/ofw_bus_subr.h>
57 #include <dev/usb/usb.h>
58 #include <dev/usb/usbdi.h>
60 #include <dev/usb/usb_core.h>
61 #include <dev/usb/usb_busdma.h>
62 #include <dev/usb/usb_process.h>
63 #include <dev/usb/usb_util.h>
65 #include <dev/usb/usb_controller.h>
66 #include <dev/usb/usb_bus.h>
67 #include <dev/usb/controller/ehci.h>
68 #include <dev/usb/controller/ehcireg.h>
70 /* Register definitions. */
71 #define ZY7_USB_ID 0x0000
72 #define ZY7_USB_HWGENERAL 0x0004
73 #define ZY7_USB_HWHOST 0x0008
74 #define ZY7_USB_HWDEVICE 0x000c
75 #define ZY7_USB_HWTXBUF 0x0010
76 #define ZY7_USB_HWRXBUF 0x0014
77 #define ZY7_USB_GPTIMER0LD 0x0080
78 #define ZY7_USB_GPTIMER0CTRL 0x0084
79 #define ZY7_USB_GPTIMER1LD 0x0088
80 #define ZY7_USB_GPTIMER1CTRL 0x008c
81 #define ZY7_USB_SBUSCFG 0x0090
82 #define ZY7_USB_CAPLENGTH_HCIVERSION 0x0100
83 #define ZY7_USB_HCSPARAMS 0x0104
84 #define ZY7_USB_HCCPARAMS 0x0108
85 #define ZY7_USB_DCIVERSION 0x0120
86 #define ZY7_USB_DCCPARAMS 0x0124
87 #define ZY7_USB_USBCMD 0x0140
88 #define ZY7_USB_USBSTS 0x0144
89 #define ZY7_USB_USBINTR 0x0148
90 #define ZY7_USB_FRINDEX 0x014c
91 #define ZY7_USB_PERIODICLISTBASE_DEICEADDR 0x0154
92 #define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 0x0158
93 #define ZY7_USB_TTCTRL 0x015c
94 #define ZY7_USB_BURSTSIZE 0x0160
95 #define ZY7_USB_TXFILLTUNING 0x0164
96 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT 16
97 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK (0x3f<<16)
98 #define ZY7_USB_TXTFILLTUNING 0x0168
99 #define ZY7_USB_IC_USB 0x016c
100 #define ZY7_USB_ULPI_VIEWPORT 0x0170
101 #define ZY7_USB_ULPI_VIEWPORT_WU (1<<31)
102 #define ZY7_USB_ULPI_VIEWPORT_RUN (1<<30)
103 #define ZY7_USB_ULPI_VIEWPORT_RW (1<<29)
104 #define ZY7_USB_ULPI_VIEWPORT_SS (1<<27)
105 #define ZY7_USB_ULPI_VIEWPORT_PORT_MASK (7<<24)
106 #define ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT 24
107 #define ZY7_USB_ULPI_VIEWPORT_ADDR_MASK (0xff<<16)
108 #define ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT 16
109 #define ZY7_USB_ULPI_VIEWPORT_DATARD_MASK (0xff<<8)
110 #define ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT 8
111 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK (0xff<<0)
112 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT 0
113 #define ZY7_USB_ENDPTNAK 0x0178
114 #define ZY7_USB_ENDPTNAKEN 0x017c
115 #define ZY7_USB_CONFIGFLAG 0x0180
116 #define ZY7_USB_PORTSC(n) (0x0180+4*(n))
117 #define ZY7_USB_PORTSC_PTS_MASK (3<<30)
118 #define ZY7_USB_PORTSC_PTS_SHIFT 30
119 #define ZY7_USB_PORTSC_PTS_UTMI (0<<30)
120 #define ZY7_USB_PORTSC_PTS_ULPI (2<<30)
121 #define ZY7_USB_PORTSC_PTS_SERIAL (3<<30)
122 #define ZY7_USB_PORTSC_PTW (1<<28)
123 #define ZY7_USB_PORTSC_PTS2 (1<<25)
124 #define ZY7_USB_OTGSC 0x01a4
125 #define ZY7_USB_USBMODE 0x01a8
126 #define ZY7_USB_ENDPTSETUPSTAT 0x01ac
127 #define ZY7_USB_ENDPTPRIME 0x01b0
128 #define ZY7_USB_ENDPTFLUSH 0x01b4
129 #define ZY7_USB_ENDPTSTAT 0x01b8
130 #define ZY7_USB_ENDPTCOMPLETE 0x01bc
131 #define ZY7_USB_ENDPTCTRL(n) (0x01c0+4*(n))
133 #define EHCI_REG_OFFSET ZY7_USB_CAPLENGTH_HCIVERSION
134 #define EHCI_REG_SIZE 0x100
137 zy7_ehci_post_reset(struct ehci_softc *ehci_softc)
141 /* Force HOST mode */
142 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
143 usbmode &= ~EHCI_UM_CM;
144 usbmode |= EHCI_UM_CM_HOST;
145 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
149 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh)
156 node = ofw_bus_get_node(dev);
158 if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) {
159 portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1));
160 portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW |
161 ZY7_USB_PORTSC_PTS2);
163 if (strcmp(buf,"ulpi") == 0)
164 portsc |= ZY7_USB_PORTSC_PTS_ULPI;
165 else if (strcmp(buf,"utmi") == 0)
166 portsc |= ZY7_USB_PORTSC_PTS_UTMI;
167 else if (strcmp(buf,"utmi-wide") == 0)
168 portsc |= (ZY7_USB_PORTSC_PTS_UTMI |
170 else if (strcmp(buf, "serial") == 0)
171 portsc |= ZY7_USB_PORTSC_PTS_SERIAL;
173 bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc);
176 if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) {
177 /* Tell PHY that VBUS is supplied externally. */
178 bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT,
179 ZY7_USB_ULPI_VIEWPORT_RUN |
180 ZY7_USB_ULPI_VIEWPORT_RW |
181 (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) |
182 (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) |
183 (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT)
187 while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) &
188 ZY7_USB_ULPI_VIEWPORT_RUN) != 0) {
199 zy7_ehci_probe(device_t dev)
202 if (!ofw_bus_status_okay(dev))
205 if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci"))
208 device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller");
212 static int zy7_ehci_detach(device_t dev);
215 zy7_ehci_attach(device_t dev)
217 ehci_softc_t *sc = device_get_softc(dev);
218 bus_space_handle_t bsh;
221 /* initialize some bus fields */
222 sc->sc_bus.parent = dev;
223 sc->sc_bus.devices = sc->sc_devices;
224 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
225 sc->sc_bus.dma_bits = 32;
227 /* get all DMA memory */
228 if (usb_bus_mem_alloc_all(&sc->sc_bus,
229 USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc))
232 /* Allocate memory. */
234 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
236 if (sc->sc_io_res == NULL) {
237 device_printf(dev, "Can't allocate memory");
238 zy7_ehci_detach(dev);
242 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
243 bsh = rman_get_bushandle(sc->sc_io_res);
244 sc->sc_io_size = EHCI_REG_SIZE;
246 if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET,
247 sc->sc_io_size, &sc->sc_io_hdl) != 0)
248 panic("%s: unable to subregion USB host registers",
249 device_get_name(dev));
253 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
255 if (sc->sc_irq_res == NULL) {
256 device_printf(dev, "Can't allocate IRQ\n");
257 zy7_ehci_detach(dev);
262 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
263 if (!sc->sc_bus.bdev) {
264 device_printf(dev, "Could not add USB device\n");
265 zy7_ehci_detach(dev);
268 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
269 device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller");
271 strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */
273 /* Activate the interrupt */
274 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
275 NULL, (driver_intr_t *)ehci_interrupt, sc,
278 device_printf(dev, "Cannot setup IRQ\n");
279 zy7_ehci_detach(dev);
284 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM;
285 sc->sc_vendor_post_reset = zy7_ehci_post_reset;
286 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
288 /* Modify FIFO burst threshold from 2 to 8. */
289 bus_space_write_4(sc->sc_io_tag, bsh,
290 ZY7_USB_TXFILLTUNING,
291 8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT);
293 /* Handle PHY options. */
294 if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) {
295 device_printf(dev, "Cannot config phy!\n");
296 zy7_ehci_detach(dev);
303 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
304 err = device_probe_and_attach(sc->sc_bus.bdev);
307 device_printf(dev, "USB init failed err=%d\n", err);
308 zy7_ehci_detach(dev);
316 zy7_ehci_detach(device_t dev)
318 ehci_softc_t *sc = device_get_softc(dev);
320 /* during module unload there are lots of children leftover */
321 device_delete_children(dev);
323 if ((sc->sc_flags & EHCI_SCFLG_DONEINIT) != 0) {
325 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
328 if (sc->sc_irq_res) {
329 if (sc->sc_intr_hdl != NULL)
330 bus_teardown_intr(dev, sc->sc_irq_res,
332 bus_release_resource(dev, SYS_RES_IRQ,
333 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
337 bus_release_resource(dev, SYS_RES_MEMORY,
338 rman_get_rid(sc->sc_io_res), sc->sc_io_res);
339 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
344 static device_method_t ehci_methods[] = {
345 /* Device interface */
346 DEVMETHOD(device_probe, zy7_ehci_probe),
347 DEVMETHOD(device_attach, zy7_ehci_attach),
348 DEVMETHOD(device_detach, zy7_ehci_detach),
349 DEVMETHOD(device_suspend, bus_generic_suspend),
350 DEVMETHOD(device_resume, bus_generic_resume),
351 DEVMETHOD(device_shutdown, bus_generic_shutdown),
354 DEVMETHOD(bus_print_child, bus_generic_print_child),
359 static driver_t ehci_driver = {
362 sizeof(struct ehci_softc),
365 DRIVER_MODULE(zy7_ehci, simplebus, ehci_driver, NULL, NULL);
366 MODULE_DEPEND(zy7_ehci, usb, 1, 1, 1);