2 * Copyright (c) 2013 Thomas Skibo
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6 * modification, are permitted provided that the following conditions
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30 * Machine dependent code for Xilinx Zynq-7000 Soc.
32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
33 * (v1.4) November 16, 2012. Xilinx doc UG585.
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #define _ARM32_BUS_DMA_PRIVATE
40 #include <sys/param.h>
41 #include <sys/systm.h>
43 #include <sys/devmap.h>
48 #include <dev/fdt/fdt_common.h>
50 #include <machine/bus.h>
51 #include <machine/machdep.h>
52 #include <machine/platform.h>
54 #include <arm/xilinx/zy7_reg.h>
56 void (*zynq7_cpu_reset)(void);
59 platform_lastaddr(void)
62 return (devmap_lastaddr());
66 platform_probe_and_attach(void)
72 platform_gpio_init(void)
77 platform_late_init(void)
82 * Set up static device mappings. Not strictly necessary -- simplebus will
83 * dynamically establish mappings as needed -- but doing it this way gets us
84 * nice efficient 1MB section mappings.
87 platform_devmap_init(void)
90 devmap_add_entry(ZYNQ7_PSIO_HWBASE, ZYNQ7_PSIO_SIZE);
91 devmap_add_entry(ZYNQ7_PSCTL_HWBASE, ZYNQ7_PSCTL_SIZE);
97 struct fdt_fixup_entry fdt_fixup_table[] = {
103 fdt_gic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
107 if (!fdt_is_compatible(node, "arm,gic"))
110 *interrupt = fdt32_to_cpu(intr[0]);
111 *trig = INTR_TRIGGER_CONFORM;
112 *pol = INTR_POLARITY_CONFORM;
117 fdt_pic_decode_t fdt_pic_table[] = {
123 struct arm32_dma_range *
124 bus_dma_get_range(void)
131 bus_dma_get_range_nb(void)
140 if (zynq7_cpu_reset != NULL)
141 (*zynq7_cpu_reset)();
143 printf("cpu_reset: no platform cpu_reset. hanging.\n");