1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * RiscBSD kernel project
41 * Machine dependant functions for kernel setup
43 * This file needs a lot of work.
48 #include "opt_msgbuf.h"
50 #include <sys/cdefs.h>
51 __FBSDID("$FreeBSD$");
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
61 #include <sys/linker.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
67 #include <sys/ptrace.h>
74 #include <sys/msgbuf.h>
75 #include <machine/reg.h>
76 #include <machine/cpu.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_pager.h>
83 #include <vm/vm_map.h>
84 #include <vm/vnode_pager.h>
85 #include <machine/pmap.h>
86 #include <machine/vmparam.h>
87 #include <machine/pcb.h>
88 #include <machine/undefined.h>
89 #include <machine/machdep.h>
90 #include <machine/metadata.h>
91 #include <machine/armreg.h>
92 #include <machine/bus.h>
93 #include <sys/reboot.h>
95 #include <arm/xscale/i80321/i80321reg.h>
96 #include <arm/xscale/i80321/i80321var.h>
97 #include <arm/xscale/i80321/iq80321reg.h>
98 #include <arm/xscale/i80321/obiovar.h>
100 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
101 #define KERNEL_PT_IOPXS 1
102 #define KERNEL_PT_BEFOREKERN 2
103 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
104 #define KERNEL_PT_AFKERNEL_NUM 9
106 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
107 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
109 /* Define various stack sizes in pages */
110 #define IRQ_STACK_SIZE 1
111 #define ABT_STACK_SIZE 1
112 #define UND_STACK_SIZE 1
114 extern u_int data_abort_handler_address;
115 extern u_int prefetch_abort_handler_address;
116 extern u_int undefined_handler_address;
118 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
125 struct pcpu *pcpup = &__pcpu;
127 /* Physical and virtual addresses for some global pages */
129 vm_paddr_t phys_avail[10];
130 vm_paddr_t dump_avail[4];
131 vm_offset_t physical_pages;
133 struct pv_addr systempage;
134 struct pv_addr msgbufpv;
135 struct pv_addr irqstack;
136 struct pv_addr undstack;
137 struct pv_addr abtstack;
138 struct pv_addr kernelstack;
139 struct pv_addr minidataclean;
141 static struct trapframe proc0_tf;
143 #define IQ80321_OBIO_BASE 0xfe800000UL
144 #define IQ80321_OBIO_SIZE 0x00100000UL
145 /* Static device mappings. */
146 static const struct pmap_devmap iq80321_devmap[] = {
148 * Map the on-board devices VA == PA so that we can access them
149 * with the MMU on or off.
155 VM_PROT_READ|VM_PROT_WRITE,
160 VERDE_OUT_XLATE_IO_WIN0_BASE,
161 VERDE_OUT_XLATE_IO_WIN_SIZE,
162 VM_PROT_READ|VM_PROT_WRITE,
170 VM_PROT_READ|VM_PROT_WRITE,
182 #define SDRAM_START 0xa0000000
184 extern vm_offset_t xscale_cache_clean_addr;
187 initarm(void *arg, void *arg2)
189 struct pv_addr kernel_l1pt;
190 struct pv_addr dpcpu;
193 vm_offset_t freemempos;
194 vm_offset_t freemem_pt;
195 vm_offset_t afterkern;
196 vm_offset_t freemem_after;
197 vm_offset_t lastaddr;
198 uint32_t memsize, memstart;
201 lastaddr = fake_preload_metadata();
202 pcpu_init(pcpup, 0, sizeof(struct pcpu));
203 PCPU_SET(curthread, &thread0);
205 freemempos = 0xa0200000;
206 /* Define a macro to simplify memory allocation */
207 #define valloc_pages(var, np) \
208 alloc_pages((var).pv_pa, (np)); \
209 (var).pv_va = (var).pv_pa + 0x20000000;
211 #define alloc_pages(var, np) \
212 freemempos -= (np * PAGE_SIZE); \
213 (var) = freemempos; \
214 memset((char *)(var), 0, ((np) * PAGE_SIZE));
216 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
217 freemempos -= PAGE_SIZE;
218 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
219 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
220 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
221 valloc_pages(kernel_pt_table[loop],
222 L2_TABLE_SIZE / PAGE_SIZE);
224 kernel_pt_table[loop].pv_pa = freemempos +
225 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
227 kernel_pt_table[loop].pv_va =
228 kernel_pt_table[loop].pv_pa + 0x20000000;
231 freemem_pt = freemempos;
232 freemempos = 0xa0100000;
234 * Allocate a page for the system page mapped to V0x00000000
235 * This page will just contain the system vectors and can be
236 * shared by all processes.
238 valloc_pages(systempage, 1);
240 /* Allocate dynamic per-cpu area. */
241 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
242 dpcpu_init((void *)dpcpu.pv_va, 0);
244 /* Allocate stacks for all modes */
245 valloc_pages(irqstack, IRQ_STACK_SIZE);
246 valloc_pages(abtstack, ABT_STACK_SIZE);
247 valloc_pages(undstack, UND_STACK_SIZE);
248 valloc_pages(kernelstack, KSTACK_PAGES);
249 alloc_pages(minidataclean.pv_pa, 1);
250 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
251 #ifdef ARM_USE_SMALL_ALLOC
252 freemempos -= PAGE_SIZE;
253 freemem_pt = trunc_page(freemem_pt);
254 freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
255 PAGE_SIZE) * sizeof(struct arm_small_page);
256 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
257 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
258 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
259 sizeof(struct arm_small_page);
260 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
261 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0);
262 freemempos = trunc_page(freemem_after);
263 freemempos -= PAGE_SIZE;
266 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
267 * wasting memory by allocating the l1pt on the first 16k memory was
268 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
269 * this to work (which is supposed to be the case).
273 * Now we start construction of the L1 page table
274 * We start by mapping the L2 page tables into the L1.
275 * This means that we can replace L1 mappings later on if necessary
277 l1pagetable = kernel_l1pt.pv_va;
279 /* Map the L2 pages tables in the L1 page table */
280 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
281 &kernel_pt_table[KERNEL_PT_SYS]);
282 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
283 &kernel_pt_table[KERNEL_PT_IOPXS]);
284 pmap_link_l2pt(l1pagetable, KERNBASE,
285 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
286 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
287 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
288 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
289 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
290 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
291 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
292 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
293 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
294 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
296 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
297 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
298 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
300 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
301 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
304 #ifdef ARM_USE_SMALL_ALLOC
305 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
306 arm_add_smallalloc_pages((void *)(freemem_after),
307 (void*)(freemem_after + PAGE_SIZE),
308 afterkern - (freemem_after + PAGE_SIZE), 0);
313 /* Map the Mini-Data cache clean area. */
314 xscale_setup_minidata(l1pagetable, afterkern,
315 minidataclean.pv_pa);
317 /* Map the vector page. */
318 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
319 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
320 pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);
322 * Give the XScale global cache clean code an appropriately
323 * sized chunk of unmapped VA space starting at 0xff000000
324 * (our device mappings end before this address).
326 xscale_cache_clean_addr = 0xff000000U;
328 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
329 setttb(kernel_l1pt.pv_pa);
331 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
333 * Pages were allocated during the secondary bootstrap for the
334 * stacks for different CPU modes.
335 * We must now set the r13 registers in the different CPU modes to
336 * point to these stacks.
337 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
338 * of the stack memory.
342 set_stackptr(PSR_IRQ32_MODE,
343 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
344 set_stackptr(PSR_ABT32_MODE,
345 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
346 set_stackptr(PSR_UND32_MODE,
347 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
352 * We must now clean the cache again....
353 * Cleaning may be done by reading new data to displace any
354 * dirty data in the cache. This will have happened in setttb()
355 * but since we are boot strapping the addresses used for the read
356 * may have just been remapped and thus the cache could be out
357 * of sync. A re-clean after the switch will cure this.
358 * After booting there are no gross relocations of the kernel thus
359 * this problem will not occur after initarm().
361 cpu_idcache_wbinv_all();
363 * Fetch the SDRAM start/size from the i80321 SDRAM configration
366 i80321_calibrate_delay();
367 i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
368 &memstart, &memsize);
369 physmem = memsize / PAGE_SIZE;
372 /* Set stack for exception handlers */
374 data_abort_handler_address = (u_int)data_abort_handler;
375 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
376 undefined_handler_address = (u_int)undefinedinstruction_bounce;
379 proc_linkup0(&proc0, &thread0);
380 thread0.td_kstack = kernelstack.pv_va;
381 thread0.td_pcb = (struct pcb *)
382 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
383 thread0.td_pcb->pcb_flags = 0;
384 thread0.td_frame = &proc0_tf;
385 pcpup->pc_curpcb = thread0.td_pcb;
387 /* Enable MMU, I-cache, D-cache, write buffer. */
389 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
393 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
395 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
396 * calling pmap_bootstrap.
398 dump_avail[0] = 0xa0000000;
399 dump_avail[1] = 0xa0000000 + memsize;
403 pmap_bootstrap(pmap_curmaxkvaddr,
404 0xd0000000, &kernel_l1pt);
405 msgbufp = (void*)msgbufpv.pv_va;
406 msgbufinit(msgbufp, MSGBUF_SIZE);
410 #ifdef ARM_USE_SMALL_ALLOC
411 phys_avail[i++] = 0xa0000000;
412 phys_avail[i++] = 0xa0001000; /*
413 *XXX: Gross hack to get our
414 * pages in the vm_page_array
417 phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
418 phys_avail[i++] = trunc_page(0xa0000000 + memsize - 1);
422 /* Do basic tuning, hz etc */
424 init_param2(physmem);
426 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
427 sizeof(struct pcb)));
432 machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
438 struct i80321_pci_softc *sc = device_get_softc(pcib);
439 bus = pci_get_bus(dev);
440 device = pci_get_slot(dev);
441 func = pci_get_function(dev);
442 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
443 busno = PCIXSR_BUSNO(busno);
450 case 1: /* PCIX-PCIX bridge */
452 * The S-ATA chips are behind the bridge, and all of
453 * the S-ATA interrupts are wired together.
455 return (ICU_INT_XINT(2));
456 case 2: /* PCI slot */
457 /* All pins are wired together. */
458 return (ICU_INT_XINT(3));
459 case 3: /* i82546 dual Gig-E */
460 if (pin == 1 || pin == 2)
461 return (ICU_INT_XINT(0));
464 case 4: /* i82544 Gig-E */
466 * Apparently you can set the device for the ethernet adapter
467 * to 8 with a jumper, so handle that as well
470 return (ICU_INT_XINT(0));
472 case 6: /* S-PCI-X slot */
474 return (ICU_INT_XINT(2));
476 return (ICU_INT_XINT(3));
480 printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);