1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * RiscBSD kernel project
41 * Machine dependant functions for kernel setup
43 * This file needs a lot of work.
50 #include <sys/cdefs.h>
51 __FBSDID("$FreeBSD$");
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
61 #include <sys/linker.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
67 #include <sys/ptrace.h>
74 #include <sys/msgbuf.h>
75 #include <machine/reg.h>
76 #include <machine/cpu.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <machine/devmap.h>
84 #include <machine/vmparam.h>
85 #include <machine/pcb.h>
86 #include <machine/undefined.h>
87 #include <machine/machdep.h>
88 #include <machine/metadata.h>
89 #include <machine/armreg.h>
90 #include <machine/bus.h>
91 #include <machine/physmem.h>
92 #include <sys/reboot.h>
94 #include <arm/xscale/pxa/pxareg.h>
95 #include <arm/xscale/pxa/pxavar.h>
97 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
98 #define KERNEL_PT_IOPXS 1
99 #define KERNEL_PT_BEFOREKERN 2
100 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
101 #define KERNEL_PT_AFKERNEL_NUM 9
103 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
104 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
106 extern u_int data_abort_handler_address;
107 extern u_int prefetch_abort_handler_address;
108 extern u_int undefined_handler_address;
110 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
112 /* Physical and virtual addresses for some global pages */
114 struct pv_addr systempage;
115 struct pv_addr msgbufpv;
116 struct pv_addr irqstack;
117 struct pv_addr undstack;
118 struct pv_addr abtstack;
119 struct pv_addr kernelstack;
120 struct pv_addr minidataclean;
122 static void pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t,
123 uint32_t *, uint32_t *);
125 /* Static device mappings. */
126 static const struct arm_devmap_entry pxa_devmap[] = {
128 * Map the on-board devices up into the KVA region so we don't muck
132 PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
134 PXA250_PERIPH_END - PXA2X0_PERIPH_START,
135 VM_PROT_READ|VM_PROT_WRITE,
141 #define SDRAM_START 0xa0000000
143 extern vm_offset_t xscale_cache_clean_addr;
146 initarm(struct arm_boot_params *abp)
148 struct pv_addr kernel_l1pt;
149 struct pv_addr dpcpu;
152 vm_offset_t freemempos;
153 vm_offset_t freemem_pt;
154 vm_offset_t afterkern;
155 vm_offset_t freemem_after;
156 vm_offset_t lastaddr;
158 uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS];
160 lastaddr = parse_boot_param(abp);
161 arm_physmem_kernaddr = abp->abp_physaddr;
163 pcpu_init(pcpup, 0, sizeof(struct pcpu));
164 PCPU_SET(curthread, &thread0);
166 /* Do basic tuning, hz etc */
169 freemempos = 0xa0200000;
170 /* Define a macro to simplify memory allocation */
171 #define valloc_pages(var, np) \
172 alloc_pages((var).pv_pa, (np)); \
173 (var).pv_va = (var).pv_pa + 0x20000000;
175 #define alloc_pages(var, np) \
176 freemempos -= (np * PAGE_SIZE); \
177 (var) = freemempos; \
178 memset((char *)(var), 0, ((np) * PAGE_SIZE));
180 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
181 freemempos -= PAGE_SIZE;
182 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
183 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
184 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
185 valloc_pages(kernel_pt_table[loop],
186 L2_TABLE_SIZE / PAGE_SIZE);
188 kernel_pt_table[loop].pv_pa = freemempos +
189 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
191 kernel_pt_table[loop].pv_va =
192 kernel_pt_table[loop].pv_pa + 0x20000000;
195 freemem_pt = freemempos;
196 freemempos = 0xa0100000;
198 * Allocate a page for the system page mapped to V0x00000000
199 * This page will just contain the system vectors and can be
200 * shared by all processes.
202 valloc_pages(systempage, 1);
204 /* Allocate dynamic per-cpu area. */
205 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
206 dpcpu_init((void *)dpcpu.pv_va, 0);
208 /* Allocate stacks for all modes */
209 valloc_pages(irqstack, IRQ_STACK_SIZE);
210 valloc_pages(abtstack, ABT_STACK_SIZE);
211 valloc_pages(undstack, UND_STACK_SIZE);
212 valloc_pages(kernelstack, KSTACK_PAGES);
213 alloc_pages(minidataclean.pv_pa, 1);
214 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
216 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
217 * wasting memory by allocating the l1pt on the first 16k memory was
218 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
219 * this to work (which is supposed to be the case).
223 * Now we start construction of the L1 page table
224 * We start by mapping the L2 page tables into the L1.
225 * This means that we can replace L1 mappings later on if necessary
227 l1pagetable = kernel_l1pt.pv_va;
229 /* Map the L2 pages tables in the L1 page table */
230 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
231 &kernel_pt_table[KERNEL_PT_SYS]);
232 #if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */
233 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
234 &kernel_pt_table[KERNEL_PT_IOPXS]);
236 pmap_link_l2pt(l1pagetable, KERNBASE,
237 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
238 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
239 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
240 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
241 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
242 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
243 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
244 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
245 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
246 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) &
248 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
249 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
250 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
252 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
253 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
256 /* Map the Mini-Data cache clean area. */
257 xscale_setup_minidata(l1pagetable, afterkern,
258 minidataclean.pv_pa);
260 /* Map the vector page. */
261 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
262 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
263 arm_devmap_bootstrap(l1pagetable, pxa_devmap);
266 * Give the XScale global cache clean code an appropriately
267 * sized chunk of unmapped VA space starting at 0xff000000
268 * (our device mappings end before this address).
270 xscale_cache_clean_addr = 0xff000000U;
272 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
273 setttb(kernel_l1pt.pv_pa);
275 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
278 * Pages were allocated during the secondary bootstrap for the
279 * stacks for different CPU modes.
280 * We must now set the r13 registers in the different CPU modes to
281 * point to these stacks.
282 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
283 * of the stack memory.
288 * We must now clean the cache again....
289 * Cleaning may be done by reading new data to displace any
290 * dirty data in the cache. This will have happened in setttb()
291 * but since we are boot strapping the addresses used for the read
292 * may have just been remapped and thus the cache could be out
293 * of sync. A re-clean after the switch will cure this.
294 * After booting there are no gross relocations of the kernel thus
295 * this problem will not occur after initarm().
297 cpu_idcache_wbinv_all();
301 * Sort out bus_space for on-board devices.
306 * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration
309 pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize);
311 /* Fire up consoles. */
314 /* Set stack for exception handlers */
315 data_abort_handler_address = (u_int)data_abort_handler;
316 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
317 undefined_handler_address = (u_int)undefinedinstruction_bounce;
320 init_proc0(kernelstack.pv_va);
322 /* Enable MMU, I-cache, D-cache, write buffer. */
323 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
325 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
326 vm_max_kernel_address = 0xe0000000;
327 pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
328 msgbufp = (void*)msgbufpv.pv_va;
329 msgbufinit(msgbufp, msgbufsize);
333 * Add the physical ram we have available.
335 * Exclude the kernel (and all the things we allocated which immediately
336 * follow the kernel) from the VM allocation pool but not from crash
337 * dumps. virtual_avail is a global variable which tracks the kva we've
338 * "allocated" while setting up pmaps.
340 * Prepare the list of physical memory available to the vm subsystem.
342 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) {
344 arm_physmem_hardware_region(memstart[j], memsize[j]);
346 arm_physmem_exclude_region(abp->abp_physaddr,
347 virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
348 arm_physmem_init_kernel_globals();
350 init_param2(physmem);
352 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
353 sizeof(struct pcb)));
357 pxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh,
358 uint32_t *memstart, uint32_t *memsize)
360 uint32_t mdcnfg, dwid, dcac, drac, dnb;
363 mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG);
366 * Scan all 4 SDRAM banks
368 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
375 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
376 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
378 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
379 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
380 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
381 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
386 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
387 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
389 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
390 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
391 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
392 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
395 panic("pxa_probe_sdram: impossible");
398 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */
399 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */
400 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
401 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */
403 memsize[i] = dwid * dcac * drac * dnb;
404 memstart[i] = PXA2X0_SDRAM0_START +
405 (i * PXA2X0_SDRAM_BANK_SIZE);
409 #define TIMER_FREQUENCY 3686400
410 #define UNIMPLEMENTED panic("%s: unimplemented", __func__)
412 /* XXXBJR: Belongs with DELAY in a timer.c of some sort. */
414 cpu_startprofclock(void)
420 cpu_stopprofclock(void)
425 static struct arm32_dma_range pxa_range = {
431 struct arm32_dma_range *
432 bus_dma_get_range(void)
439 bus_dma_get_range_nb(void)