1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * RiscBSD kernel project
41 * Machine dependant functions for kernel setup
43 * This file needs a lot of work.
50 #include <sys/cdefs.h>
51 __FBSDID("$FreeBSD$");
53 #define _ARM32_BUS_DMA_PRIVATE
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
61 #include <sys/linker.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
67 #include <sys/ptrace.h>
74 #include <sys/msgbuf.h>
75 #include <machine/reg.h>
76 #include <machine/cpu.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <machine/devmap.h>
84 #include <machine/vmparam.h>
85 #include <machine/pcb.h>
86 #include <machine/undefined.h>
87 #include <machine/machdep.h>
88 #include <machine/metadata.h>
89 #include <machine/armreg.h>
90 #include <machine/bus.h>
91 #include <sys/reboot.h>
93 #include <arm/xscale/pxa/pxareg.h>
94 #include <arm/xscale/pxa/pxavar.h>
96 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
97 #define KERNEL_PT_IOPXS 1
98 #define KERNEL_PT_BEFOREKERN 2
99 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
100 #define KERNEL_PT_AFKERNEL_NUM 9
102 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
103 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
105 extern u_int data_abort_handler_address;
106 extern u_int prefetch_abort_handler_address;
107 extern u_int undefined_handler_address;
109 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
111 /* Physical and virtual addresses for some global pages */
113 vm_paddr_t phys_avail[PXA2X0_SDRAM_BANKS * 2 + 4];
114 vm_paddr_t dump_avail[PXA2X0_SDRAM_BANKS * 2 + 4];
116 struct pv_addr systempage;
117 struct pv_addr msgbufpv;
118 struct pv_addr irqstack;
119 struct pv_addr undstack;
120 struct pv_addr abtstack;
121 struct pv_addr kernelstack;
122 struct pv_addr minidataclean;
124 static void pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t,
125 uint32_t *, uint32_t *);
127 /* Static device mappings. */
128 static const struct arm_devmap_entry pxa_devmap[] = {
130 * Map the on-board devices up into the KVA region so we don't muck
134 PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
136 PXA250_PERIPH_END - PXA2X0_PERIPH_START,
137 VM_PROT_READ|VM_PROT_WRITE,
143 #define SDRAM_START 0xa0000000
145 extern vm_offset_t xscale_cache_clean_addr;
148 initarm(struct arm_boot_params *abp)
150 struct pv_addr kernel_l1pt;
151 struct pv_addr dpcpu;
154 vm_offset_t freemempos;
155 vm_offset_t freemem_pt;
156 vm_offset_t afterkern;
157 vm_offset_t freemem_after;
158 vm_offset_t lastaddr;
160 uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS];
162 lastaddr = parse_boot_param(abp);
164 pcpu_init(pcpup, 0, sizeof(struct pcpu));
165 PCPU_SET(curthread, &thread0);
167 /* Do basic tuning, hz etc */
170 freemempos = 0xa0200000;
171 /* Define a macro to simplify memory allocation */
172 #define valloc_pages(var, np) \
173 alloc_pages((var).pv_pa, (np)); \
174 (var).pv_va = (var).pv_pa + 0x20000000;
176 #define alloc_pages(var, np) \
177 freemempos -= (np * PAGE_SIZE); \
178 (var) = freemempos; \
179 memset((char *)(var), 0, ((np) * PAGE_SIZE));
181 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
182 freemempos -= PAGE_SIZE;
183 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
184 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
185 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
186 valloc_pages(kernel_pt_table[loop],
187 L2_TABLE_SIZE / PAGE_SIZE);
189 kernel_pt_table[loop].pv_pa = freemempos +
190 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
192 kernel_pt_table[loop].pv_va =
193 kernel_pt_table[loop].pv_pa + 0x20000000;
196 freemem_pt = freemempos;
197 freemempos = 0xa0100000;
199 * Allocate a page for the system page mapped to V0x00000000
200 * This page will just contain the system vectors and can be
201 * shared by all processes.
203 valloc_pages(systempage, 1);
205 /* Allocate dynamic per-cpu area. */
206 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
207 dpcpu_init((void *)dpcpu.pv_va, 0);
209 /* Allocate stacks for all modes */
210 valloc_pages(irqstack, IRQ_STACK_SIZE);
211 valloc_pages(abtstack, ABT_STACK_SIZE);
212 valloc_pages(undstack, UND_STACK_SIZE);
213 valloc_pages(kernelstack, KSTACK_PAGES);
214 alloc_pages(minidataclean.pv_pa, 1);
215 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
216 #ifdef ARM_USE_SMALL_ALLOC
217 freemempos -= PAGE_SIZE;
218 freemem_pt = trunc_page(freemem_pt);
219 freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
220 PAGE_SIZE) * sizeof(struct arm_small_page);
221 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
222 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
223 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
224 sizeof(struct arm_small_page);
225 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
226 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0);
227 freemempos = trunc_page(freemem_after);
228 freemempos -= PAGE_SIZE;
231 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
232 * wasting memory by allocating the l1pt on the first 16k memory was
233 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
234 * this to work (which is supposed to be the case).
238 * Now we start construction of the L1 page table
239 * We start by mapping the L2 page tables into the L1.
240 * This means that we can replace L1 mappings later on if necessary
242 l1pagetable = kernel_l1pt.pv_va;
244 /* Map the L2 pages tables in the L1 page table */
245 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
246 &kernel_pt_table[KERNEL_PT_SYS]);
247 #if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */
248 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
249 &kernel_pt_table[KERNEL_PT_IOPXS]);
251 pmap_link_l2pt(l1pagetable, KERNBASE,
252 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
253 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
254 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
255 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
256 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
257 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
258 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
259 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
260 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
261 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) &
263 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
264 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
265 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
267 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
268 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
270 #ifdef ARM_USE_SMALL_ALLOC
271 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
272 arm_add_smallalloc_pages((void *)(freemem_after),
273 (void*)(freemem_after + PAGE_SIZE),
274 afterkern - (freemem_after + PAGE_SIZE), 0);
278 /* Map the Mini-Data cache clean area. */
279 xscale_setup_minidata(l1pagetable, afterkern,
280 minidataclean.pv_pa);
282 /* Map the vector page. */
283 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
284 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
285 arm_devmap_bootstrap(l1pagetable, pxa_devmap);
288 * Give the XScale global cache clean code an appropriately
289 * sized chunk of unmapped VA space starting at 0xff000000
290 * (our device mappings end before this address).
292 xscale_cache_clean_addr = 0xff000000U;
294 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
295 setttb(kernel_l1pt.pv_pa);
297 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
300 * Pages were allocated during the secondary bootstrap for the
301 * stacks for different CPU modes.
302 * We must now set the r13 registers in the different CPU modes to
303 * point to these stacks.
304 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
305 * of the stack memory.
310 * We must now clean the cache again....
311 * Cleaning may be done by reading new data to displace any
312 * dirty data in the cache. This will have happened in setttb()
313 * but since we are boot strapping the addresses used for the read
314 * may have just been remapped and thus the cache could be out
315 * of sync. A re-clean after the switch will cure this.
316 * After booting there are no gross relocations of the kernel thus
317 * this problem will not occur after initarm().
319 cpu_idcache_wbinv_all();
323 * Sort out bus_space for on-board devices.
328 * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration
331 pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize);
334 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
335 physmem += memsize[i] / PAGE_SIZE;
338 /* Fire up consoles. */
341 /* Set stack for exception handlers */
342 data_abort_handler_address = (u_int)data_abort_handler;
343 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
344 undefined_handler_address = (u_int)undefinedinstruction_bounce;
347 init_proc0(kernelstack.pv_va);
349 /* Enable MMU, I-cache, D-cache, write buffer. */
350 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
352 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
354 * ARM USE_SMALL_ALLOC uses dump_avail, so it must be filled before
355 * calling pmap_bootstrap.
358 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) {
359 if (memsize[j] > 0) {
360 dump_avail[i++] = round_page(memstart[j]);
362 trunc_page(memstart[j] + memsize[j]);
367 vm_max_kernel_address = 0xe0000000;
368 pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
369 msgbufp = (void*)msgbufpv.pv_va;
370 msgbufinit(msgbufp, msgbufsize);
374 #ifdef ARM_USE_SMALL_ALLOC
375 phys_avail[i++] = 0xa0000000;
376 phys_avail[i++] = 0xa0001000; /*
377 *XXX: Gross hack to get our
378 * pages in the vm_page_array
381 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) {
382 if (memsize[j] > 0) {
383 phys_avail[i] = round_page(memstart[j]);
384 dump_avail[i++] = round_page(memstart[j]);
386 trunc_page(memstart[j] + memsize[j]);
388 trunc_page(memstart[j] + memsize[j]);
396 #ifdef ARM_USE_SMALL_ALLOC
397 phys_avail[2] = round_page(virtual_avail - KERNBASE + phys_avail[2]);
399 phys_avail[0] = round_page(virtual_avail - KERNBASE + phys_avail[0]);
402 init_param2(physmem);
404 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
405 sizeof(struct pcb)));
409 pxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh,
410 uint32_t *memstart, uint32_t *memsize)
412 uint32_t mdcnfg, dwid, dcac, drac, dnb;
415 mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG);
418 * Scan all 4 SDRAM banks
420 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
427 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
428 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
430 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
431 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
432 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
433 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
438 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
439 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
441 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
442 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
443 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
444 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
447 panic("pxa_probe_sdram: impossible");
450 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */
451 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */
452 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
453 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */
455 memsize[i] = dwid * dcac * drac * dnb;
456 memstart[i] = PXA2X0_SDRAM0_START +
457 (i * PXA2X0_SDRAM_BANK_SIZE);
461 #define TIMER_FREQUENCY 3686400
462 #define UNIMPLEMENTED panic("%s: unimplemented", __func__)
464 /* XXXBJR: Belongs with DELAY in a timer.c of some sort. */
466 cpu_startprofclock(void)
472 cpu_stopprofclock(void)
477 static struct arm32_dma_range pxa_range = {
483 struct arm32_dma_range *
484 bus_dma_get_range(void)
491 bus_dma_get_range_nb(void)