2 * Copyright (c) 2006 Benno Rice. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 #include <sys/cdefs.h>
26 __FBSDID("$FreeBSD$");
28 #include <sys/param.h>
29 #include <sys/systm.h>
31 #include <sys/kernel.h>
32 #include <sys/module.h>
33 #include <sys/malloc.h>
35 #include <sys/timetc.h>
36 #include <machine/armreg.h>
37 #include <machine/bus.h>
38 #include <machine/cpu.h>
39 #include <machine/frame.h>
40 #include <machine/intr.h>
42 #include <arm/xscale/pxa/pxavar.h>
43 #include <arm/xscale/pxa/pxareg.h>
45 #define PXA_TIMER_FREQUENCY 3686400
46 #define PXA_TIMER_TICK (PXA_TIMER_FREQUENCY / hz)
48 struct pxa_timer_softc {
49 struct resource * pt_res[5];
50 bus_space_tag_t pt_bst;
51 bus_space_handle_t pt_bsh;
54 static struct resource_spec pxa_timer_spec[] = {
55 { SYS_RES_MEMORY, 0, RF_ACTIVE },
56 { SYS_RES_IRQ, 0, RF_ACTIVE },
57 { SYS_RES_IRQ, 1, RF_ACTIVE },
58 { SYS_RES_IRQ, 2, RF_ACTIVE },
59 { SYS_RES_IRQ, 3, RF_ACTIVE },
63 static struct pxa_timer_softc *timer_softc = NULL;
65 static int pxa_timer_probe(device_t);
66 static int pxa_timer_attach(device_t);
68 static driver_filter_t pxa_hardclock;
70 static unsigned pxa_timer_get_timecount(struct timecounter *);
72 uint32_t pxa_timer_get_osmr(int);
73 void pxa_timer_set_osmr(int, uint32_t);
74 uint32_t pxa_timer_get_oscr(void);
75 void pxa_timer_set_oscr(uint32_t);
76 uint32_t pxa_timer_get_ossr(void);
77 void pxa_timer_clear_ossr(uint32_t);
78 void pxa_timer_watchdog_enable(void);
79 void pxa_timer_watchdog_disable(void);
80 void pxa_timer_interrupt_enable(int);
81 void pxa_timer_interrupt_disable(int);
83 static struct timecounter pxa_timer_timecounter = {
84 .tc_get_timecount = pxa_timer_get_timecount,
85 .tc_name = "OS Timer",
86 .tc_frequency = PXA_TIMER_FREQUENCY,
87 .tc_counter_mask = ~0u,
92 pxa_timer_probe(device_t dev)
95 device_set_desc(dev, "OS Timer");
100 pxa_timer_attach(device_t dev)
104 struct pxa_timer_softc *sc;
106 sc = (struct pxa_timer_softc *)device_get_softc(dev);
108 if (timer_softc != NULL)
111 error = bus_alloc_resources(dev, pxa_timer_spec, sc->pt_res);
113 device_printf(dev, "could not allocate resources\n");
117 sc->pt_bst = rman_get_bustag(sc->pt_res[0]);
118 sc->pt_bsh = rman_get_bushandle(sc->pt_res[0]);
122 pxa_timer_interrupt_disable(-1);
123 pxa_timer_watchdog_disable();
125 if (bus_setup_intr(dev, sc->pt_res[1], INTR_TYPE_CLK,
126 pxa_hardclock, NULL, NULL, &ihl) != 0) {
127 bus_release_resources(dev, pxa_timer_spec, sc->pt_res);
128 device_printf(dev, "could not setup hardclock interrupt\n");
136 pxa_hardclock(void *arg)
138 struct trapframe *frame;
140 frame = (struct trapframe *)arg;
142 /* Clear the interrupt */
143 pxa_timer_clear_ossr(OST_SR_CH0);
145 /* Schedule next tick */
146 pxa_timer_set_osmr(0, pxa_timer_get_oscr() + PXA_TIMER_TICK);
148 /* Do what we came here for */
149 hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
151 return (FILTER_HANDLED);
154 static device_method_t pxa_timer_methods[] = {
155 DEVMETHOD(device_probe, pxa_timer_probe),
156 DEVMETHOD(device_attach, pxa_timer_attach),
161 static driver_t pxa_timer_driver = {
164 sizeof(struct pxa_timer_softc),
167 static devclass_t pxa_timer_devclass;
169 DRIVER_MODULE(pxatimer, pxa, pxa_timer_driver, pxa_timer_devclass, 0, 0);
172 pxa_timer_get_timecount(struct timecounter *tc)
175 return (pxa_timer_get_oscr());
182 pxa_timer_set_oscr(0);
183 pxa_timer_set_osmr(0, PXA_TIMER_TICK);
184 pxa_timer_interrupt_enable(0);
186 tc_init(&pxa_timer_timecounter);
194 (void)disable_interrupts(PSR_I|PSR_F);
196 val = pxa_timer_get_oscr();
197 val += PXA_TIMER_FREQUENCY;
198 pxa_timer_set_osmr(3, val);
199 pxa_timer_watchdog_enable();
209 if (timer_softc == NULL) {
210 for (; usec > 0; usec--)
211 for (val = 100; val > 0; val--)
216 val = pxa_timer_get_oscr();
217 val += (PXA_TIMER_FREQUENCY * usec) / 1000000;
218 while (pxa_timer_get_oscr() <= val);
222 pxa_timer_get_osmr(int which)
225 return (bus_space_read_4(timer_softc->pt_bst,
226 timer_softc->pt_bsh, which * 0x4));
230 pxa_timer_set_osmr(int which, uint32_t val)
233 bus_space_write_4(timer_softc->pt_bst,
234 timer_softc->pt_bsh, which * 0x4, val);
241 return (bus_space_read_4(timer_softc->pt_bst,
242 timer_softc->pt_bsh, OST_CR));
246 pxa_timer_set_oscr(uint32_t val)
249 bus_space_write_4(timer_softc->pt_bst,
250 timer_softc->pt_bsh, OST_CR, val);
257 return (bus_space_read_4(timer_softc->pt_bst,
258 timer_softc->pt_bsh, OST_SR));
262 pxa_timer_clear_ossr(uint32_t val)
265 bus_space_write_4(timer_softc->pt_bst,
266 timer_softc->pt_bsh, OST_SR, val);
270 pxa_timer_watchdog_enable()
273 bus_space_write_4(timer_softc->pt_bst,
274 timer_softc->pt_bsh, OST_WR, 0x1);
278 pxa_timer_watchdog_disable()
281 bus_space_write_4(timer_softc->pt_bst,
282 timer_softc->pt_bsh, OST_WR, 0x0);
286 pxa_timer_interrupt_enable(int which)
291 bus_space_write_4(timer_softc->pt_bst,
292 timer_softc->pt_bsh, OST_IR, 0xf);
296 oier = bus_space_read_4(timer_softc->pt_bst,
297 timer_softc->pt_bsh, OST_IR);
299 bus_space_write_4(timer_softc->pt_bst,
300 timer_softc->pt_bsh, OST_IR, oier);
304 pxa_timer_interrupt_disable(int which)
309 bus_space_write_4(timer_softc->pt_bst,
310 timer_softc->pt_bsh, OST_IR, 0);
313 oier = bus_space_read_4(timer_softc->pt_bst,
314 timer_softc->pt_bsh, OST_IR);
315 oier &= ~(1 << which);
316 bus_space_write_4(timer_softc->pt_bst,
317 timer_softc->pt_bsh, OST_IR, oier);