2 * Copyright (c) 1997, 1998 Justin T. Gibbs.
3 * Copyright (c) 2015-2016 The FreeBSD Foundation
6 * Portions of this software were developed by Andrew Turner
7 * under sponsorship of the FreeBSD Foundation.
9 * Portions of this software were developed by Semihalf
10 * under sponsorship of the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification, immediately at the beginning of the file.
18 * 2. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/domainset.h>
37 #include <sys/malloc.h>
39 #include <sys/interrupt.h>
40 #include <sys/kernel.h>
44 #include <sys/memdesc.h>
45 #include <sys/mutex.h>
46 #include <sys/sysctl.h>
50 #include <vm/vm_extern.h>
51 #include <vm/vm_kern.h>
52 #include <vm/vm_page.h>
53 #include <vm/vm_map.h>
55 #include <machine/atomic.h>
56 #include <machine/bus.h>
57 #include <machine/md_var.h>
58 #include <arm64/include/bus_dma_impl.h>
60 #define MAX_BPAGES 4096
63 BF_COULD_BOUNCE = 0x01,
64 BF_MIN_ALLOC_COMP = 0x02,
73 struct bus_dma_tag_common common;
75 size_t alloc_alignment;
78 bus_dma_segment_t *segments;
79 struct bounce_zone *bounce_zone;
82 static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
86 vm_offset_t vaddr; /* kva of client data */
87 bus_addr_t paddr; /* physical address */
88 vm_page_t pages; /* starting page of client data */
89 bus_size_t datacount; /* client data count */
93 STAILQ_HEAD(, bounce_page) bpages;
98 bus_dmamap_callback_t *callback;
100 __sbintime_t queued_time;
101 STAILQ_ENTRY(bus_dmamap) links;
103 #define DMAMAP_COHERENT (1 << 0)
104 #define DMAMAP_FROM_DMAMEM (1 << 1)
105 #define DMAMAP_MBUF (1 << 2)
107 struct sync_list slist[];
110 static bool _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map,
111 vm_paddr_t buf, bus_size_t buflen, int *pagesneeded);
112 static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
113 pmap_t pmap, void *buf, bus_size_t buflen, int flags);
114 static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
115 vm_paddr_t buf, bus_size_t buflen, int flags);
117 static MALLOC_DEFINE(M_BUSDMA, "busdma", "busdma metadata");
119 #define dmat_alignment(dmat) ((dmat)->common.alignment)
120 #define dmat_domain(dmat) ((dmat)->common.domain)
121 #define dmat_flags(dmat) ((dmat)->common.flags)
122 #define dmat_highaddr(dmat) ((dmat)->common.highaddr)
123 #define dmat_lowaddr(dmat) ((dmat)->common.lowaddr)
124 #define dmat_lockfunc(dmat) ((dmat)->common.lockfunc)
125 #define dmat_lockfuncarg(dmat) ((dmat)->common.lockfuncarg)
127 #include "../../kern/subr_busdma_bounce.c"
130 bounce_bus_dma_zone_setup(bus_dma_tag_t dmat)
132 struct bounce_zone *bz;
137 * Round size up to a full page, and add one more page because
138 * there can always be one more boundary crossing than the
139 * number of pages in a transfer.
141 maxsize = roundup2(dmat->common.maxsize, PAGE_SIZE) + PAGE_SIZE;
144 if ((error = alloc_bounce_zone(dmat)) != 0)
146 bz = dmat->bounce_zone;
148 if (ptoa(bz->total_bpages) < maxsize) {
151 pages = atop(maxsize) + 1 - bz->total_bpages;
153 /* Add pages to our bounce pool */
154 if (alloc_bounce_pages(dmat, pages) < pages)
157 /* Performed initial allocation */
158 dmat->bounce_flags |= BF_MIN_ALLOC_COMP;
164 * Return true if the DMA should bounce because the start or end does not fall
165 * on a cacheline boundary (which would require a partial cacheline flush).
166 * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by
167 * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a
168 * strict rule that such memory cannot be accessed by the CPU while DMA is in
169 * progress (or by multiple DMA engines at once), so that it's always safe to do
170 * full cacheline flushes even if that affects memory outside the range of a
171 * given DMA operation that doesn't involve the full allocated buffer. If we're
172 * mapping an mbuf, that follows the same rules as a buffer we allocated.
175 cacheline_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
179 #define DMAMAP_CACHELINE_FLAGS \
180 (DMAMAP_FROM_DMAMEM | DMAMAP_COHERENT | DMAMAP_MBUF)
181 if ((dmat->bounce_flags & BF_COHERENT) != 0)
183 if (map != NULL && (map->flags & DMAMAP_CACHELINE_FLAGS) != 0)
185 return (((paddr | size) & (dcache_line_size - 1)) != 0);
186 #undef DMAMAP_CACHELINE_FLAGS
190 * Return true if the given address does not fall on the alignment boundary.
193 alignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr)
196 return (!vm_addr_align_ok(addr, dmat->common.alignment));
200 might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
204 /* Memory allocated by bounce_bus_dmamem_alloc won't bounce */
205 if (map && (map->flags & DMAMAP_FROM_DMAMEM) != 0)
208 if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0)
211 if (cacheline_bounce(dmat, map, paddr, size))
214 if (alignment_bounce(dmat, paddr))
221 must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
225 if (cacheline_bounce(dmat, map, paddr, size))
228 if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0 &&
229 addr_needs_bounce(dmat, paddr))
236 * Allocate a device specific dma_tag.
239 bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
240 bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
241 bus_size_t maxsize, int nsegments, bus_size_t maxsegsz, int flags,
242 bus_dma_lock_t *lockfunc, void *lockfuncarg, bus_dma_tag_t *dmat)
244 bus_dma_tag_t newtag;
248 error = common_bus_dma_tag_create(parent != NULL ? &parent->common :
249 NULL, alignment, boundary, lowaddr, highaddr, maxsize, nsegments,
250 maxsegsz, flags, lockfunc, lockfuncarg,
251 sizeof (struct bus_dma_tag), (void **)&newtag);
255 newtag->common.impl = &bus_dma_bounce_impl;
256 newtag->map_count = 0;
257 newtag->segments = NULL;
259 if ((flags & BUS_DMA_COHERENT) != 0) {
260 newtag->bounce_flags |= BF_COHERENT;
263 if (parent != NULL) {
264 if ((parent->bounce_flags & BF_COULD_BOUNCE) != 0)
265 newtag->bounce_flags |= BF_COULD_BOUNCE;
267 /* Copy some flags from the parent */
268 newtag->bounce_flags |= parent->bounce_flags & BF_COHERENT;
271 if ((newtag->bounce_flags & BF_COHERENT) != 0) {
272 newtag->alloc_alignment = newtag->common.alignment;
273 newtag->alloc_size = newtag->common.maxsize;
276 * Ensure the buffer is aligned to a cacheline when allocating
277 * a non-coherent buffer. This is so we don't have any data
278 * that another CPU may be accessing around DMA buffer
279 * causing the cache to become dirty.
281 newtag->alloc_alignment = MAX(newtag->common.alignment,
283 newtag->alloc_size = roundup2(newtag->common.maxsize,
287 if (newtag->common.lowaddr < ptoa((vm_paddr_t)Maxmem) ||
288 newtag->common.alignment > 1)
289 newtag->bounce_flags |= BF_COULD_BOUNCE;
291 if ((flags & BUS_DMA_ALLOCNOW) != 0)
292 error = bounce_bus_dma_zone_setup(newtag);
297 free(newtag, M_DEVBUF);
300 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
301 __func__, newtag, (newtag != NULL ? newtag->common.flags : 0),
307 bounce_bus_dma_tag_destroy(bus_dma_tag_t dmat)
312 if (dmat->map_count != 0) {
316 if (dmat->segments != NULL)
317 free(dmat->segments, M_DEVBUF);
318 free(dmat, M_DEVBUF);
321 CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat, error);
326 * Update the domain for the tag. We may need to reallocate the zone and
330 bounce_bus_dma_tag_set_domain(bus_dma_tag_t dmat)
333 KASSERT(dmat->map_count == 0,
334 ("bounce_bus_dma_tag_set_domain: Domain set after use.\n"));
335 if ((dmat->bounce_flags & BF_COULD_BOUNCE) == 0 ||
336 dmat->bounce_zone == NULL)
338 dmat->bounce_flags &= ~BF_MIN_ALLOC_COMP;
339 return (bounce_bus_dma_zone_setup(dmat));
343 bounce_bus_dma_id_mapped(bus_dma_tag_t dmat, vm_paddr_t buf, bus_size_t buflen)
346 if (!might_bounce(dmat, NULL, buf, buflen))
348 return (!_bus_dmamap_pagesneeded(dmat, NULL, buf, buflen, NULL));
352 alloc_dmamap(bus_dma_tag_t dmat, int flags)
357 mapsize = sizeof(*map);
358 mapsize += sizeof(struct sync_list) * dmat->common.nsegments;
359 map = malloc_domainset(mapsize, M_DEVBUF,
360 DOMAINSET_PREF(dmat->common.domain), flags | M_ZERO);
364 /* Initialize the new map */
365 STAILQ_INIT(&map->bpages);
371 * Allocate a handle for mapping from kva/uva/physical
372 * address space into bus device space.
375 bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
377 struct bounce_zone *bz;
378 int error, maxpages, pages;
382 if (dmat->segments == NULL) {
383 dmat->segments = mallocarray_domainset(dmat->common.nsegments,
384 sizeof(bus_dma_segment_t), M_DEVBUF,
385 DOMAINSET_PREF(dmat->common.domain), M_NOWAIT);
386 if (dmat->segments == NULL) {
387 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
388 __func__, dmat, ENOMEM);
393 *mapp = alloc_dmamap(dmat, M_NOWAIT);
395 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
396 __func__, dmat, ENOMEM);
401 * Bouncing might be required if the driver asks for an active
402 * exclusion region, a data alignment that is stricter than 1, and/or
403 * an active address boundary.
405 if (dmat->bounce_zone == NULL) {
406 if ((error = alloc_bounce_zone(dmat)) != 0) {
407 free(*mapp, M_DEVBUF);
411 bz = dmat->bounce_zone;
414 * Attempt to add pages to our pool on a per-instance basis up to a sane
415 * limit. Even if the tag isn't subject of bouncing due to alignment
416 * and boundary constraints, it could still auto-bounce due to
417 * cacheline alignment, which requires at most two bounce pages.
419 if (dmat->common.alignment > 1)
420 maxpages = MAX_BPAGES;
422 maxpages = MIN(MAX_BPAGES, Maxmem -
423 atop(dmat->common.lowaddr));
424 if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0 ||
425 (bz->map_count > 0 && bz->total_bpages < maxpages)) {
426 pages = atop(roundup2(dmat->common.maxsize, PAGE_SIZE)) + 1;
427 pages = MIN(maxpages - bz->total_bpages, pages);
428 pages = MAX(pages, 2);
429 if (alloc_bounce_pages(dmat, pages) < pages)
431 if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0) {
433 dmat->bounce_flags |= BF_MIN_ALLOC_COMP;
442 if ((dmat->bounce_flags & BF_COHERENT) != 0)
443 (*mapp)->flags |= DMAMAP_COHERENT;
445 free(*mapp, M_DEVBUF);
447 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
448 __func__, dmat, dmat->common.flags, error);
453 * Destroy a handle for mapping from kva/uva/physical
454 * address space into bus device space.
457 bounce_bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
460 /* Check we are destroying the correct map type */
461 if ((map->flags & DMAMAP_FROM_DMAMEM) != 0)
462 panic("bounce_bus_dmamap_destroy: Invalid map freed\n");
464 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
465 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, EBUSY);
468 if (dmat->bounce_zone)
469 dmat->bounce_zone->map_count--;
472 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
477 * Allocate a piece of memory that can be efficiently mapped into
478 * bus device space based on the constraints lited in the dma tag.
479 * A dmamap to for use with dmamap_load is also allocated.
482 bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
488 if (flags & BUS_DMA_NOWAIT)
493 if (dmat->segments == NULL) {
494 dmat->segments = mallocarray_domainset(dmat->common.nsegments,
495 sizeof(bus_dma_segment_t), M_DEVBUF,
496 DOMAINSET_PREF(dmat->common.domain), mflags);
497 if (dmat->segments == NULL) {
498 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
499 __func__, dmat, dmat->common.flags, ENOMEM);
503 if (flags & BUS_DMA_ZERO)
505 if (flags & BUS_DMA_NOCACHE)
506 attr = VM_MEMATTR_UNCACHEABLE;
507 else if ((flags & BUS_DMA_COHERENT) != 0 &&
508 (dmat->bounce_flags & BF_COHERENT) == 0)
510 * If we have a non-coherent tag, and are trying to allocate
511 * a coherent block of memory it needs to be uncached.
513 attr = VM_MEMATTR_UNCACHEABLE;
515 attr = VM_MEMATTR_DEFAULT;
518 * Create the map, but don't set the could bounce flag as
519 * this allocation should never bounce;
521 *mapp = alloc_dmamap(dmat, mflags);
523 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
524 __func__, dmat, dmat->common.flags, ENOMEM);
529 * Mark the map as coherent if we used uncacheable memory or the
530 * tag was already marked as coherent.
532 if (attr == VM_MEMATTR_UNCACHEABLE ||
533 (dmat->bounce_flags & BF_COHERENT) != 0)
534 (*mapp)->flags |= DMAMAP_COHERENT;
536 (*mapp)->flags |= DMAMAP_FROM_DMAMEM;
539 * Allocate the buffer from the malloc(9) allocator if...
540 * - It's small enough to fit into a single page.
541 * - Its alignment requirement is also smaller than the page size.
542 * - The low address requirement is fulfilled.
543 * - Default cache attributes are requested (WB).
544 * else allocate non-contiguous pages if...
545 * - The page count that could get allocated doesn't exceed
546 * nsegments also when the maximum segment size is less
548 * - The alignment constraint isn't larger than a page boundary.
549 * - There are no boundary-crossing constraints.
550 * else allocate a block of contiguous pages because one or more of the
551 * constraints is something that only the contig allocator can fulfill.
553 * NOTE: The (dmat->common.alignment <= dmat->maxsize) check
554 * below is just a quick hack. The exact alignment guarantees
555 * of malloc(9) need to be nailed down, and the code below
556 * should be rewritten to take that into account.
558 * In the meantime warn the user if malloc gets it wrong.
560 if (dmat->alloc_size <= PAGE_SIZE &&
561 dmat->alloc_alignment <= PAGE_SIZE &&
562 dmat->common.lowaddr >= ptoa((vm_paddr_t)Maxmem) &&
563 attr == VM_MEMATTR_DEFAULT) {
564 *vaddr = malloc_domainset_aligned(dmat->alloc_size,
565 dmat->alloc_alignment, M_DEVBUF,
566 DOMAINSET_PREF(dmat->common.domain), mflags);
567 } else if (dmat->common.nsegments >=
568 howmany(dmat->alloc_size, MIN(dmat->common.maxsegsz, PAGE_SIZE)) &&
569 dmat->alloc_alignment <= PAGE_SIZE &&
570 (dmat->common.boundary % PAGE_SIZE) == 0) {
571 /* Page-based multi-segment allocations allowed */
572 *vaddr = kmem_alloc_attr_domainset(
573 DOMAINSET_PREF(dmat->common.domain), dmat->alloc_size,
574 mflags, 0ul, dmat->common.lowaddr, attr);
575 dmat->bounce_flags |= BF_KMEM_ALLOC;
577 *vaddr = kmem_alloc_contig_domainset(
578 DOMAINSET_PREF(dmat->common.domain), dmat->alloc_size,
579 mflags, 0ul, dmat->common.lowaddr,
580 dmat->alloc_alignment != 0 ? dmat->alloc_alignment : 1ul,
581 dmat->common.boundary, attr);
582 dmat->bounce_flags |= BF_KMEM_ALLOC;
584 if (*vaddr == NULL) {
585 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
586 __func__, dmat, dmat->common.flags, ENOMEM);
587 free(*mapp, M_DEVBUF);
589 } else if (!vm_addr_align_ok(vtophys(*vaddr), dmat->alloc_alignment)) {
590 printf("bus_dmamem_alloc failed to align memory properly.\n");
593 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
594 __func__, dmat, dmat->common.flags, 0);
599 * Free a piece of memory and it's allociated dmamap, that was allocated
600 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
603 bounce_bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
607 * Check the map came from bounce_bus_dmamem_alloc, so the map
608 * should be NULL and the BF_KMEM_ALLOC flag cleared if malloc()
609 * was used and set if kmem_alloc_contig() was used.
611 if ((map->flags & DMAMAP_FROM_DMAMEM) == 0)
612 panic("bus_dmamem_free: Invalid map freed\n");
613 if ((dmat->bounce_flags & BF_KMEM_ALLOC) == 0)
614 free(vaddr, M_DEVBUF);
616 kmem_free(vaddr, dmat->alloc_size);
619 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat,
624 _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
625 bus_size_t buflen, int *pagesneeded)
632 * Count the number of bounce pages needed in order to
633 * complete this transfer
637 while (buflen != 0) {
638 sgsize = MIN(buflen, dmat->common.maxsegsz);
639 if (must_bounce(dmat, map, curaddr, sgsize)) {
641 PAGE_SIZE - (curaddr & PAGE_MASK));
642 if (pagesneeded == NULL)
650 if (pagesneeded != NULL)
651 *pagesneeded = count;
656 _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
657 bus_size_t buflen, int flags)
660 if (map->pagesneeded == 0) {
661 _bus_dmamap_pagesneeded(dmat, map, buf, buflen,
663 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
668 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
669 void *buf, bus_size_t buflen, int flags)
672 vm_offset_t vendaddr;
676 if (map->pagesneeded == 0) {
677 CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, "
678 "alignment= %d", dmat->common.lowaddr,
679 ptoa((vm_paddr_t)Maxmem),
680 dmat->common.boundary, dmat->common.alignment);
681 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", map,
684 * Count the number of bounce pages
685 * needed in order to complete this transfer
687 vaddr = (vm_offset_t)buf;
688 vendaddr = (vm_offset_t)buf + buflen;
690 while (vaddr < vendaddr) {
691 sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK);
692 if (pmap == kernel_pmap)
693 paddr = pmap_kextract(vaddr);
695 paddr = pmap_extract(pmap, vaddr);
696 if (must_bounce(dmat, map, paddr,
697 min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr &
698 PAGE_MASK)))) != 0) {
699 sg_len = roundup2(sg_len,
700 dmat->common.alignment);
705 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
710 * Add a single contiguous physical range to the segment list.
713 _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
714 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
719 * Make sure we don't cross any boundaries.
721 if (!vm_addr_bound_ok(curaddr, sgsize, dmat->common.boundary))
722 sgsize = roundup2(curaddr, dmat->common.boundary) - curaddr;
725 * Insert chunk into a segment, coalescing with
726 * previous segment if possible.
731 segs[seg].ds_addr = curaddr;
732 segs[seg].ds_len = sgsize;
734 if (curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
735 (segs[seg].ds_len + sgsize) <= dmat->common.maxsegsz &&
736 vm_addr_bound_ok(segs[seg].ds_addr,
737 segs[seg].ds_len + sgsize, dmat->common.boundary))
738 segs[seg].ds_len += sgsize;
740 if (++seg >= dmat->common.nsegments)
742 segs[seg].ds_addr = curaddr;
743 segs[seg].ds_len = sgsize;
751 * Utility function to load a physical buffer. segp contains
752 * the starting segment on entrace, and the ending segment on exit.
755 bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
756 vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs,
759 struct sync_list *sl;
761 bus_addr_t curaddr, sl_end;
765 segs = dmat->segments;
767 if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) {
768 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
769 if (map->pagesneeded != 0) {
770 error = _bus_dmamap_reserve_pages(dmat, map, flags);
776 sl = map->slist + map->sync_count - 1;
781 sgsize = MIN(buflen, dmat->common.maxsegsz);
782 if (map->pagesneeded != 0 &&
783 must_bounce(dmat, map, curaddr, sgsize)) {
785 * The attempt to split a physically continuous buffer
786 * seems very controversial, it's unclear whether we
787 * can do this in all cases. Also, memory for bounced
788 * buffers is allocated as pages, so we cannot
789 * guarantee multipage alignment.
791 KASSERT(dmat->common.alignment <= PAGE_SIZE,
792 ("bounced buffer cannot have alignment bigger "
793 "than PAGE_SIZE: %lu", dmat->common.alignment));
794 sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
795 curaddr = add_bounce_page(dmat, map, 0, curaddr,
797 } else if ((map->flags & DMAMAP_COHERENT) == 0) {
798 if (map->sync_count > 0)
799 sl_end = sl->paddr + sl->datacount;
801 if (map->sync_count == 0 || curaddr != sl_end) {
802 if (++map->sync_count > dmat->common.nsegments)
807 sl->pages = PHYS_TO_VM_PAGE(curaddr);
808 KASSERT(sl->pages != NULL,
809 ("%s: page at PA:0x%08lx is not in "
810 "vm_page_array", __func__, curaddr));
811 sl->datacount = sgsize;
813 sl->datacount += sgsize;
815 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
827 bus_dmamap_unload(dmat, map);
828 return (EFBIG); /* XXX better return value here? */
834 * Utility function to load a linear buffer. segp contains
835 * the starting segment on entrace, and the ending segment on exit.
838 bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
839 bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs,
842 struct sync_list *sl;
844 bus_addr_t curaddr, sl_pend;
845 vm_offset_t kvaddr, vaddr, sl_vend;
848 KASSERT((map->flags & DMAMAP_FROM_DMAMEM) != 0 ||
849 dmat->common.alignment <= PAGE_SIZE,
850 ("loading user buffer with alignment bigger than PAGE_SIZE is not "
854 segs = dmat->segments;
856 if (flags & BUS_DMA_LOAD_MBUF)
857 map->flags |= DMAMAP_MBUF;
859 if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) {
860 _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
861 if (map->pagesneeded != 0) {
862 error = _bus_dmamap_reserve_pages(dmat, map, flags);
869 * XXX Optimally we should parse input buffer for physically
870 * continuous segments first and then pass these segment into
873 sl = map->slist + map->sync_count - 1;
874 vaddr = (vm_offset_t)buf;
880 * Get the physical address for this segment.
882 if (__predict_true(pmap == kernel_pmap)) {
883 curaddr = pmap_kextract(vaddr);
886 curaddr = pmap_extract(pmap, vaddr);
891 * Compute the segment size, and adjust counts.
893 sgsize = MIN(buflen, dmat->common.maxsegsz);
894 if ((map->flags & DMAMAP_FROM_DMAMEM) == 0)
895 sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
897 if (map->pagesneeded != 0 &&
898 must_bounce(dmat, map, curaddr, sgsize)) {
899 /* See comment in bounce_bus_dmamap_load_phys */
900 KASSERT(dmat->common.alignment <= PAGE_SIZE,
901 ("bounced buffer cannot have alignment bigger "
902 "than PAGE_SIZE: %lu", dmat->common.alignment));
903 curaddr = add_bounce_page(dmat, map, kvaddr, curaddr,
905 } else if ((map->flags & DMAMAP_COHERENT) == 0) {
906 if (map->sync_count > 0) {
907 sl_pend = sl->paddr + sl->datacount;
908 sl_vend = sl->vaddr + sl->datacount;
911 if (map->sync_count == 0 ||
912 (kvaddr != 0 && kvaddr != sl_vend) ||
913 (curaddr != sl_pend)) {
914 if (++map->sync_count > dmat->common.nsegments)
922 sl->pages = PHYS_TO_VM_PAGE(curaddr);
923 KASSERT(sl->pages != NULL,
924 ("%s: page at PA:0x%08lx is not "
925 "in vm_page_array", __func__,
928 sl->datacount = sgsize;
930 sl->datacount += sgsize;
932 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
944 bus_dmamap_unload(dmat, map);
945 return (EFBIG); /* XXX better return value here? */
951 bounce_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
952 struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
957 map->callback = callback;
958 map->callback_arg = callback_arg;
961 static bus_dma_segment_t *
962 bounce_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
963 bus_dma_segment_t *segs, int nsegs, int error)
967 segs = dmat->segments;
972 * Release the mapping held by map.
975 bounce_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
977 free_bounce_pages(dmat, map);
979 map->flags &= ~DMAMAP_MBUF;
983 dma_preread_safe(vm_offset_t va, vm_size_t size)
986 * Write back any partial cachelines immediately before and
987 * after the DMA region.
989 if (va & (dcache_line_size - 1))
990 cpu_dcache_wb_range(va, 1);
991 if ((va + size) & (dcache_line_size - 1))
992 cpu_dcache_wb_range(va + size, 1);
994 cpu_dcache_inv_range(va, size);
998 dma_dcache_sync(struct sync_list *sl, bus_dmasync_op_t op)
1000 uint32_t len, offset;
1003 vm_offset_t va, tempva;
1006 offset = sl->paddr & PAGE_MASK;
1008 size = sl->datacount;
1011 for ( ; size != 0; size -= len, pa += len, offset = 0, ++m) {
1013 if (sl->vaddr == 0) {
1014 len = min(PAGE_SIZE - offset, size);
1015 tempva = pmap_quick_enter_page(m);
1016 va = tempva | offset;
1017 KASSERT(pa == (VM_PAGE_TO_PHYS(m) | offset),
1018 ("unexpected vm_page_t phys: 0x%16lx != 0x%16lx",
1019 VM_PAGE_TO_PHYS(m) | offset, pa));
1021 len = sl->datacount;
1026 case BUS_DMASYNC_PREWRITE:
1027 case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD:
1028 cpu_dcache_wb_range(va, len);
1030 case BUS_DMASYNC_PREREAD:
1032 * An mbuf may start in the middle of a cacheline. There
1033 * will be no cpu writes to the beginning of that line
1034 * (which contains the mbuf header) while dma is in
1035 * progress. Handle that case by doing a writeback of
1036 * just the first cacheline before invalidating the
1037 * overall buffer. Any mbuf in a chain may have this
1038 * misalignment. Buffers which are not mbufs bounce if
1039 * they are not aligned to a cacheline.
1041 dma_preread_safe(va, len);
1043 case BUS_DMASYNC_POSTREAD:
1044 case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE:
1045 cpu_dcache_inv_range(va, len);
1048 panic("unsupported combination of sync operations: "
1053 pmap_quick_remove_page(tempva);
1058 bounce_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map,
1059 bus_dmasync_op_t op)
1061 struct bounce_page *bpage;
1062 struct sync_list *sl, *end;
1063 vm_offset_t datavaddr, tempvaddr;
1065 if (op == BUS_DMASYNC_POSTWRITE)
1068 if ((op & BUS_DMASYNC_POSTREAD) != 0) {
1070 * Wait for any DMA operations to complete before the bcopy.
1075 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1076 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x "
1077 "performing bounce", __func__, dmat, dmat->common.flags,
1080 if ((op & BUS_DMASYNC_PREWRITE) != 0) {
1081 while (bpage != NULL) {
1083 datavaddr = bpage->datavaddr;
1084 if (datavaddr == 0) {
1085 tempvaddr = pmap_quick_enter_page(
1087 datavaddr = tempvaddr | bpage->dataoffs;
1090 bcopy((void *)datavaddr,
1091 (void *)bpage->vaddr, bpage->datacount);
1093 pmap_quick_remove_page(tempvaddr);
1094 if ((map->flags & DMAMAP_COHERENT) == 0)
1095 cpu_dcache_wb_range(bpage->vaddr,
1097 bpage = STAILQ_NEXT(bpage, links);
1099 dmat->bounce_zone->total_bounced++;
1100 } else if ((op & BUS_DMASYNC_PREREAD) != 0) {
1101 while (bpage != NULL) {
1102 if ((map->flags & DMAMAP_COHERENT) == 0)
1103 cpu_dcache_wbinv_range(bpage->vaddr,
1105 bpage = STAILQ_NEXT(bpage, links);
1109 if ((op & BUS_DMASYNC_POSTREAD) != 0) {
1110 while (bpage != NULL) {
1111 if ((map->flags & DMAMAP_COHERENT) == 0)
1112 cpu_dcache_inv_range(bpage->vaddr,
1115 datavaddr = bpage->datavaddr;
1116 if (datavaddr == 0) {
1117 tempvaddr = pmap_quick_enter_page(
1119 datavaddr = tempvaddr | bpage->dataoffs;
1122 bcopy((void *)bpage->vaddr,
1123 (void *)datavaddr, bpage->datacount);
1126 pmap_quick_remove_page(tempvaddr);
1127 bpage = STAILQ_NEXT(bpage, links);
1129 dmat->bounce_zone->total_bounced++;
1134 * Cache maintenance for normal (non-COHERENT non-bounce) buffers.
1136 if (map->sync_count != 0) {
1137 sl = &map->slist[0];
1138 end = &map->slist[map->sync_count];
1139 CTR3(KTR_BUSDMA, "%s: tag %p op 0x%x "
1140 "performing sync", __func__, dmat, op);
1142 for ( ; sl != end; ++sl)
1143 dma_dcache_sync(sl, op);
1146 if ((op & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)) != 0) {
1148 * Wait for the bcopy to complete before any DMA operations.
1154 struct bus_dma_impl bus_dma_bounce_impl = {
1155 .tag_create = bounce_bus_dma_tag_create,
1156 .tag_destroy = bounce_bus_dma_tag_destroy,
1157 .tag_set_domain = bounce_bus_dma_tag_set_domain,
1158 .id_mapped = bounce_bus_dma_id_mapped,
1159 .map_create = bounce_bus_dmamap_create,
1160 .map_destroy = bounce_bus_dmamap_destroy,
1161 .mem_alloc = bounce_bus_dmamem_alloc,
1162 .mem_free = bounce_bus_dmamem_free,
1163 .load_phys = bounce_bus_dmamap_load_phys,
1164 .load_buffer = bounce_bus_dmamap_load_buffer,
1165 .load_ma = bus_dmamap_load_ma_triv,
1166 .map_waitok = bounce_bus_dmamap_waitok,
1167 .map_complete = bounce_bus_dmamap_complete,
1168 .map_unload = bounce_bus_dmamap_unload,
1169 .map_sync = bounce_bus_dmamap_sync