2 * Copyright (c) 1997, 1998 Justin T. Gibbs.
3 * Copyright (c) 2015-2016 The FreeBSD Foundation
6 * Portions of this software were developed by Andrew Turner
7 * under sponsorship of the FreeBSD Foundation.
9 * Portions of this software were developed by Semihalf
10 * under sponsorship of the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification, immediately at the beginning of the file.
18 * 2. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/malloc.h>
41 #include <sys/interrupt.h>
42 #include <sys/kernel.h>
46 #include <sys/memdesc.h>
47 #include <sys/mutex.h>
48 #include <sys/sysctl.h>
52 #include <vm/vm_extern.h>
53 #include <vm/vm_kern.h>
54 #include <vm/vm_page.h>
55 #include <vm/vm_map.h>
57 #include <machine/atomic.h>
58 #include <machine/bus.h>
59 #include <machine/md_var.h>
60 #include <arm64/include/bus_dma_impl.h>
62 #define MAX_BPAGES 4096
65 BF_COULD_BOUNCE = 0x01,
66 BF_MIN_ALLOC_COMP = 0x02,
74 struct bus_dma_tag_common common;
76 size_t alloc_alignment;
79 bus_dma_segment_t *segments;
80 struct bounce_zone *bounce_zone;
84 vm_offset_t vaddr; /* kva of bounce buffer */
85 bus_addr_t busaddr; /* Physical address */
86 vm_offset_t datavaddr; /* kva of client data */
87 vm_page_t datapage; /* physical page of client data */
88 vm_offset_t dataoffs; /* page offset of client data */
89 bus_size_t datacount; /* client data count */
90 STAILQ_ENTRY(bounce_page) links;
93 int busdma_swi_pending;
96 STAILQ_ENTRY(bounce_zone) links;
97 STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
105 bus_size_t alignment;
109 struct sysctl_ctx_list sysctl_tree;
110 struct sysctl_oid *sysctl_tree_top;
113 static struct mtx bounce_lock;
114 static int total_bpages;
115 static int busdma_zonecount;
116 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
118 static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
119 "Busdma parameters");
120 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
121 "Total bounce pages");
124 vm_offset_t vaddr; /* kva of client data */
125 bus_addr_t paddr; /* physical address */
126 vm_page_t pages; /* starting page of client data */
127 bus_size_t datacount; /* client data count */
131 struct bp_list bpages;
136 bus_dmamap_callback_t *callback;
138 STAILQ_ENTRY(bus_dmamap) links;
140 #define DMAMAP_COHERENT (1 << 0)
141 #define DMAMAP_FROM_DMAMEM (1 << 1)
142 #define DMAMAP_MBUF (1 << 2)
144 struct sync_list slist[];
147 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
148 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
150 static void init_bounce_pages(void *dummy);
151 static int alloc_bounce_zone(bus_dma_tag_t dmat);
152 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
153 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
155 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
156 vm_offset_t vaddr, bus_addr_t addr, bus_size_t size);
157 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
158 int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr);
159 static bool _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map,
160 vm_paddr_t buf, bus_size_t buflen, int *pagesneeded);
161 static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
162 pmap_t pmap, void *buf, bus_size_t buflen, int flags);
163 static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
164 vm_paddr_t buf, bus_size_t buflen, int flags);
165 static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
169 * Return true if the DMA should bounce because the start or end does not fall
170 * on a cacheline boundary (which would require a partial cacheline flush).
171 * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by
172 * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a
173 * strict rule that such memory cannot be accessed by the CPU while DMA is in
174 * progress (or by multiple DMA engines at once), so that it's always safe to do
175 * full cacheline flushes even if that affects memory outside the range of a
176 * given DMA operation that doesn't involve the full allocated buffer. If we're
177 * mapping an mbuf, that follows the same rules as a buffer we allocated.
180 cacheline_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
184 #define DMAMAP_CACHELINE_FLAGS \
185 (DMAMAP_FROM_DMAMEM | DMAMAP_COHERENT | DMAMAP_MBUF)
186 if ((dmat->bounce_flags & BF_COHERENT) != 0)
188 if (map != NULL && (map->flags & DMAMAP_CACHELINE_FLAGS) != 0)
190 return (((paddr | size) & (dcache_line_size - 1)) != 0);
191 #undef DMAMAP_CACHELINE_FLAGS
195 * Return true if the given address does not fall on the alignment boundary.
198 alignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr)
201 return ((addr & (dmat->common.alignment - 1)) != 0);
205 might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
209 if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0)
212 if (cacheline_bounce(dmat, map, paddr, size))
215 if (alignment_bounce(dmat, paddr))
222 must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
226 if (cacheline_bounce(dmat, map, paddr, size))
229 if (alignment_bounce(dmat, paddr))
232 if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0 &&
233 bus_dma_run_filter(&dmat->common, paddr))
240 * Allocate a device specific dma_tag.
243 bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
244 bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
245 bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
246 int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
247 void *lockfuncarg, bus_dma_tag_t *dmat)
249 bus_dma_tag_t newtag;
253 error = common_bus_dma_tag_create(parent != NULL ? &parent->common :
254 NULL, alignment, boundary, lowaddr, highaddr, filter, filterarg,
255 maxsize, nsegments, maxsegsz, flags, lockfunc, lockfuncarg,
256 sizeof (struct bus_dma_tag), (void **)&newtag);
260 newtag->common.impl = &bus_dma_bounce_impl;
261 newtag->map_count = 0;
262 newtag->segments = NULL;
264 if ((flags & BUS_DMA_COHERENT) != 0) {
265 newtag->bounce_flags |= BF_COHERENT;
266 newtag->alloc_alignment = newtag->common.alignment;
267 newtag->alloc_size = newtag->common.maxsize;
270 * Ensure the buffer is aligned to a cacheline when allocating
271 * a non-coherent buffer. This is so we don't have any data
272 * that another CPU may be accessing around DMA buffer
273 * causing the cache to become dirty.
275 newtag->alloc_alignment = MAX(newtag->common.alignment,
277 newtag->alloc_size = roundup2(newtag->common.maxsize,
281 if (parent != NULL) {
282 if ((newtag->common.filter != NULL ||
283 (parent->bounce_flags & BF_COULD_BOUNCE) != 0))
284 newtag->bounce_flags |= BF_COULD_BOUNCE;
286 /* Copy some flags from the parent */
287 newtag->bounce_flags |= parent->bounce_flags & BF_COHERENT;
290 if (newtag->common.lowaddr < ptoa((vm_paddr_t)Maxmem) ||
291 newtag->common.alignment > 1)
292 newtag->bounce_flags |= BF_COULD_BOUNCE;
294 if ((flags & BUS_DMA_ALLOCNOW) != 0) {
295 struct bounce_zone *bz;
298 if ((error = alloc_bounce_zone(newtag)) != 0) {
299 free(newtag, M_DEVBUF);
302 bz = newtag->bounce_zone;
304 if (ptoa(bz->total_bpages) < maxsize) {
307 pages = atop(round_page(maxsize)) - bz->total_bpages;
309 /* Add pages to our bounce pool */
310 if (alloc_bounce_pages(newtag, pages) < pages)
313 /* Performed initial allocation */
314 newtag->bounce_flags |= BF_MIN_ALLOC_COMP;
319 free(newtag, M_DEVBUF);
322 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
323 __func__, newtag, (newtag != NULL ? newtag->common.flags : 0),
329 bounce_bus_dma_tag_destroy(bus_dma_tag_t dmat)
331 bus_dma_tag_t dmat_copy, parent;
338 if (dmat->map_count != 0) {
342 while (dmat != NULL) {
343 parent = (bus_dma_tag_t)dmat->common.parent;
344 atomic_subtract_int(&dmat->common.ref_count, 1);
345 if (dmat->common.ref_count == 0) {
346 if (dmat->segments != NULL)
347 free(dmat->segments, M_DEVBUF);
348 free(dmat, M_DEVBUF);
350 * Last reference count, so
351 * release our reference
352 * count on our parent.
360 CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error);
365 bounce_bus_dma_id_mapped(bus_dma_tag_t dmat, vm_paddr_t buf, bus_size_t buflen)
368 if (!might_bounce(dmat, NULL, buf, buflen))
370 return (!_bus_dmamap_pagesneeded(dmat, NULL, buf, buflen, NULL));
374 alloc_dmamap(bus_dma_tag_t dmat, int flags)
379 mapsize = sizeof(*map);
380 mapsize += sizeof(struct sync_list) * dmat->common.nsegments;
381 map = malloc(mapsize, M_DEVBUF, flags | M_ZERO);
385 /* Initialize the new map */
386 STAILQ_INIT(&map->bpages);
392 * Allocate a handle for mapping from kva/uva/physical
393 * address space into bus device space.
396 bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
398 struct bounce_zone *bz;
399 int error, maxpages, pages;
403 if (dmat->segments == NULL) {
404 dmat->segments = (bus_dma_segment_t *)malloc(
405 sizeof(bus_dma_segment_t) * dmat->common.nsegments,
407 if (dmat->segments == NULL) {
408 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
409 __func__, dmat, ENOMEM);
414 *mapp = alloc_dmamap(dmat, M_NOWAIT);
416 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
417 __func__, dmat, ENOMEM);
422 * Bouncing might be required if the driver asks for an active
423 * exclusion region, a data alignment that is stricter than 1, and/or
424 * an active address boundary.
426 if (dmat->bounce_zone == NULL) {
427 if ((error = alloc_bounce_zone(dmat)) != 0) {
428 free(*mapp, M_DEVBUF);
432 bz = dmat->bounce_zone;
435 * Attempt to add pages to our pool on a per-instance
436 * basis up to a sane limit.
438 if (dmat->common.alignment > 1)
439 maxpages = MAX_BPAGES;
441 maxpages = MIN(MAX_BPAGES, Maxmem -
442 atop(dmat->common.lowaddr));
443 if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0 ||
444 (bz->map_count > 0 && bz->total_bpages < maxpages)) {
445 pages = MAX(atop(dmat->common.maxsize), 1);
446 pages = MIN(maxpages - bz->total_bpages, pages);
447 pages = MAX(pages, 1);
448 if (alloc_bounce_pages(dmat, pages) < pages)
450 if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0) {
452 dmat->bounce_flags |= BF_MIN_ALLOC_COMP;
461 if ((dmat->bounce_flags & BF_COHERENT) != 0)
462 (*mapp)->flags |= DMAMAP_COHERENT;
464 free(*mapp, M_DEVBUF);
466 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
467 __func__, dmat, dmat->common.flags, error);
472 * Destroy a handle for mapping from kva/uva/physical
473 * address space into bus device space.
476 bounce_bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
479 /* Check we are destroying the correct map type */
480 if ((map->flags & DMAMAP_FROM_DMAMEM) != 0)
481 panic("bounce_bus_dmamap_destroy: Invalid map freed\n");
483 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
484 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, EBUSY);
487 if (dmat->bounce_zone)
488 dmat->bounce_zone->map_count--;
491 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
496 * Allocate a piece of memory that can be efficiently mapped into
497 * bus device space based on the constraints lited in the dma tag.
498 * A dmamap to for use with dmamap_load is also allocated.
501 bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
507 if (flags & BUS_DMA_NOWAIT)
512 if (dmat->segments == NULL) {
513 dmat->segments = (bus_dma_segment_t *)malloc(
514 sizeof(bus_dma_segment_t) * dmat->common.nsegments,
516 if (dmat->segments == NULL) {
517 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
518 __func__, dmat, dmat->common.flags, ENOMEM);
522 if (flags & BUS_DMA_ZERO)
524 if (flags & BUS_DMA_NOCACHE)
525 attr = VM_MEMATTR_UNCACHEABLE;
526 else if ((flags & BUS_DMA_COHERENT) != 0 &&
527 (dmat->bounce_flags & BF_COHERENT) == 0)
529 * If we have a non-coherent tag, and are trying to allocate
530 * a coherent block of memory it needs to be uncached.
532 attr = VM_MEMATTR_UNCACHEABLE;
534 attr = VM_MEMATTR_DEFAULT;
537 * Create the map, but don't set the could bounce flag as
538 * this allocation should never bounce;
540 *mapp = alloc_dmamap(dmat, mflags);
542 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
543 __func__, dmat, dmat->common.flags, ENOMEM);
548 * Mark the map as coherent if we used uncacheable memory or the
549 * tag was already marked as coherent.
551 if (attr == VM_MEMATTR_UNCACHEABLE ||
552 (dmat->bounce_flags & BF_COHERENT) != 0)
553 (*mapp)->flags |= DMAMAP_COHERENT;
555 (*mapp)->flags |= DMAMAP_FROM_DMAMEM;
558 * Allocate the buffer from the malloc(9) allocator if...
559 * - It's small enough to fit into a single power of two sized bucket.
560 * - The alignment is less than or equal to the maximum size
561 * - The low address requirement is fulfilled.
562 * else allocate non-contiguous pages if...
563 * - The page count that could get allocated doesn't exceed
564 * nsegments also when the maximum segment size is less
566 * - The alignment constraint isn't larger than a page boundary.
567 * - There are no boundary-crossing constraints.
568 * else allocate a block of contiguous pages because one or more of the
569 * constraints is something that only the contig allocator can fulfill.
571 * NOTE: The (dmat->common.alignment <= dmat->maxsize) check
572 * below is just a quick hack. The exact alignment guarantees
573 * of malloc(9) need to be nailed down, and the code below
574 * should be rewritten to take that into account.
576 * In the meantime warn the user if malloc gets it wrong.
578 if ((dmat->alloc_size <= PAGE_SIZE) &&
579 (dmat->alloc_alignment <= dmat->alloc_size) &&
580 dmat->common.lowaddr >= ptoa((vm_paddr_t)Maxmem) &&
581 attr == VM_MEMATTR_DEFAULT) {
582 *vaddr = malloc(dmat->alloc_size, M_DEVBUF, mflags);
583 } else if (dmat->common.nsegments >=
584 howmany(dmat->alloc_size, MIN(dmat->common.maxsegsz, PAGE_SIZE)) &&
585 dmat->alloc_alignment <= PAGE_SIZE &&
586 (dmat->common.boundary % PAGE_SIZE) == 0) {
587 /* Page-based multi-segment allocations allowed */
588 *vaddr = (void *)kmem_alloc_attr(dmat->alloc_size, mflags,
589 0ul, dmat->common.lowaddr, attr);
590 dmat->bounce_flags |= BF_KMEM_ALLOC;
592 *vaddr = (void *)kmem_alloc_contig(dmat->alloc_size, mflags,
593 0ul, dmat->common.lowaddr, dmat->alloc_alignment != 0 ?
594 dmat->alloc_alignment : 1ul, dmat->common.boundary, attr);
595 dmat->bounce_flags |= BF_KMEM_ALLOC;
597 if (*vaddr == NULL) {
598 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
599 __func__, dmat, dmat->common.flags, ENOMEM);
600 free(*mapp, M_DEVBUF);
602 } else if (vtophys(*vaddr) & (dmat->alloc_alignment - 1)) {
603 printf("bus_dmamem_alloc failed to align memory properly.\n");
606 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
607 __func__, dmat, dmat->common.flags, 0);
612 * Free a piece of memory and it's allociated dmamap, that was allocated
613 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
616 bounce_bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
620 * Check the map came from bounce_bus_dmamem_alloc, so the map
621 * should be NULL and the BF_KMEM_ALLOC flag cleared if malloc()
622 * was used and set if kmem_alloc_contig() was used.
624 if ((map->flags & DMAMAP_FROM_DMAMEM) == 0)
625 panic("bus_dmamem_free: Invalid map freed\n");
626 if ((dmat->bounce_flags & BF_KMEM_ALLOC) == 0)
627 free(vaddr, M_DEVBUF);
629 kmem_free((vm_offset_t)vaddr, dmat->alloc_size);
632 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat,
637 _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
638 bus_size_t buflen, int *pagesneeded)
645 * Count the number of bounce pages needed in order to
646 * complete this transfer
650 while (buflen != 0) {
651 sgsize = MIN(buflen, dmat->common.maxsegsz);
652 if (must_bounce(dmat, map, curaddr, sgsize)) {
654 PAGE_SIZE - (curaddr & PAGE_MASK));
655 if (pagesneeded == NULL)
663 if (pagesneeded != NULL)
664 *pagesneeded = count;
669 _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
670 bus_size_t buflen, int flags)
673 if (map->pagesneeded == 0) {
674 _bus_dmamap_pagesneeded(dmat, map, buf, buflen,
676 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
681 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
682 void *buf, bus_size_t buflen, int flags)
685 vm_offset_t vendaddr;
689 if (map->pagesneeded == 0) {
690 CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, "
691 "alignment= %d", dmat->common.lowaddr,
692 ptoa((vm_paddr_t)Maxmem),
693 dmat->common.boundary, dmat->common.alignment);
694 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", map,
697 * Count the number of bounce pages
698 * needed in order to complete this transfer
700 vaddr = (vm_offset_t)buf;
701 vendaddr = (vm_offset_t)buf + buflen;
703 while (vaddr < vendaddr) {
704 sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK);
705 if (pmap == kernel_pmap)
706 paddr = pmap_kextract(vaddr);
708 paddr = pmap_extract(pmap, vaddr);
709 if (must_bounce(dmat, map, paddr,
710 min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr &
711 PAGE_MASK)))) != 0) {
712 sg_len = roundup2(sg_len,
713 dmat->common.alignment);
718 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
723 _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags)
726 /* Reserve Necessary Bounce Pages */
727 mtx_lock(&bounce_lock);
728 if (flags & BUS_DMA_NOWAIT) {
729 if (reserve_bounce_pages(dmat, map, 0) != 0) {
730 mtx_unlock(&bounce_lock);
734 if (reserve_bounce_pages(dmat, map, 1) != 0) {
735 /* Queue us for resources */
736 STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links);
737 mtx_unlock(&bounce_lock);
738 return (EINPROGRESS);
741 mtx_unlock(&bounce_lock);
747 * Add a single contiguous physical range to the segment list.
750 _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
751 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
753 bus_addr_t baddr, bmask;
757 * Make sure we don't cross any boundaries.
759 bmask = ~(dmat->common.boundary - 1);
760 if (dmat->common.boundary > 0) {
761 baddr = (curaddr + dmat->common.boundary) & bmask;
762 if (sgsize > (baddr - curaddr))
763 sgsize = (baddr - curaddr);
767 * Insert chunk into a segment, coalescing with
768 * previous segment if possible.
773 segs[seg].ds_addr = curaddr;
774 segs[seg].ds_len = sgsize;
776 if (curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
777 (segs[seg].ds_len + sgsize) <= dmat->common.maxsegsz &&
778 (dmat->common.boundary == 0 ||
779 (segs[seg].ds_addr & bmask) == (curaddr & bmask)))
780 segs[seg].ds_len += sgsize;
782 if (++seg >= dmat->common.nsegments)
784 segs[seg].ds_addr = curaddr;
785 segs[seg].ds_len = sgsize;
793 * Utility function to load a physical buffer. segp contains
794 * the starting segment on entrace, and the ending segment on exit.
797 bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
798 vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs,
801 struct sync_list *sl;
803 bus_addr_t curaddr, sl_end;
807 segs = dmat->segments;
809 if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) {
810 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
811 if (map->pagesneeded != 0) {
812 error = _bus_dmamap_reserve_pages(dmat, map, flags);
818 sl = map->slist + map->sync_count - 1;
823 sgsize = MIN(buflen, dmat->common.maxsegsz);
824 if (map->pagesneeded != 0 &&
825 must_bounce(dmat, map, curaddr, sgsize)) {
827 * The attempt to split a physically continuous buffer
828 * seems very controversial, it's unclear whether we
829 * can do this in all cases. Also, memory for bounced
830 * buffers is allocated as pages, so we cannot
831 * guarantee multipage alignment.
833 KASSERT(dmat->common.alignment <= PAGE_SIZE,
834 ("bounced buffer cannot have alignment bigger "
835 "than PAGE_SIZE: %lu", dmat->common.alignment));
836 sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
837 sgsize = roundup2(sgsize, dmat->common.alignment);
838 sgsize = MIN(sgsize, dmat->common.maxsegsz);
839 curaddr = add_bounce_page(dmat, map, 0, curaddr,
841 } else if ((map->flags & DMAMAP_COHERENT) == 0) {
842 if (map->sync_count > 0)
843 sl_end = sl->paddr + sl->datacount;
845 if (map->sync_count == 0 || curaddr != sl_end) {
846 if (++map->sync_count > dmat->common.nsegments)
851 sl->pages = PHYS_TO_VM_PAGE(curaddr);
852 KASSERT(sl->pages != NULL,
853 ("%s: page at PA:0x%08lx is not in "
854 "vm_page_array", __func__, curaddr));
855 sl->datacount = sgsize;
857 sl->datacount += sgsize;
859 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
870 return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */
874 * Utility function to load a linear buffer. segp contains
875 * the starting segment on entrace, and the ending segment on exit.
878 bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
879 bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs,
882 struct sync_list *sl;
883 bus_size_t sgsize, max_sgsize;
884 bus_addr_t curaddr, sl_pend;
885 vm_offset_t kvaddr, vaddr, sl_vend;
888 KASSERT((map->flags & DMAMAP_FROM_DMAMEM) != 0 ||
889 dmat->common.alignment <= PAGE_SIZE,
890 ("loading user buffer with alignment bigger than PAGE_SIZE is not "
894 segs = dmat->segments;
896 if (flags & BUS_DMA_LOAD_MBUF)
897 map->flags |= DMAMAP_MBUF;
899 if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) {
900 _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
901 if (map->pagesneeded != 0) {
902 error = _bus_dmamap_reserve_pages(dmat, map, flags);
909 * XXX Optimally we should parse input buffer for physically
910 * continuous segments first and then pass these segment into
913 sl = map->slist + map->sync_count - 1;
914 vaddr = (vm_offset_t)buf;
920 * Get the physical address for this segment.
922 if (pmap == kernel_pmap) {
923 curaddr = pmap_kextract(vaddr);
926 curaddr = pmap_extract(pmap, vaddr);
931 * Compute the segment size, and adjust counts.
933 max_sgsize = MIN(buflen, dmat->common.maxsegsz);
934 if ((map->flags & DMAMAP_FROM_DMAMEM) != 0) {
937 sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
938 sgsize = MIN(sgsize, max_sgsize);
941 if (map->pagesneeded != 0 &&
942 must_bounce(dmat, map, curaddr, sgsize)) {
943 /* See comment in bounce_bus_dmamap_load_phys */
944 KASSERT(dmat->common.alignment <= PAGE_SIZE,
945 ("bounced buffer cannot have alignment bigger "
946 "than PAGE_SIZE: %lu", dmat->common.alignment));
947 sgsize = PAGE_SIZE - (curaddr & PAGE_MASK);
948 sgsize = roundup2(sgsize, dmat->common.alignment);
949 sgsize = MIN(sgsize, max_sgsize);
950 curaddr = add_bounce_page(dmat, map, kvaddr, curaddr,
952 } else if ((map->flags & DMAMAP_COHERENT) == 0) {
953 if (map->sync_count > 0) {
954 sl_pend = sl->paddr + sl->datacount;
955 sl_vend = sl->vaddr + sl->datacount;
958 if (map->sync_count == 0 ||
959 (kvaddr != 0 && kvaddr != sl_vend) ||
960 (curaddr != sl_pend)) {
961 if (++map->sync_count > dmat->common.nsegments)
969 sl->pages = PHYS_TO_VM_PAGE(curaddr);
970 KASSERT(sl->pages != NULL,
971 ("%s: page at PA:0x%08lx is not "
972 "in vm_page_array", __func__,
975 sl->datacount = sgsize;
977 sl->datacount += sgsize;
979 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
990 return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */
994 bounce_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
995 struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
1000 map->callback = callback;
1001 map->callback_arg = callback_arg;
1004 static bus_dma_segment_t *
1005 bounce_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
1006 bus_dma_segment_t *segs, int nsegs, int error)
1010 segs = dmat->segments;
1015 * Release the mapping held by map.
1018 bounce_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1020 struct bounce_page *bpage;
1022 while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1023 STAILQ_REMOVE_HEAD(&map->bpages, links);
1024 free_bounce_page(dmat, bpage);
1027 map->sync_count = 0;
1028 map->flags &= ~DMAMAP_MBUF;
1032 dma_preread_safe(vm_offset_t va, vm_size_t size)
1035 * Write back any partial cachelines immediately before and
1036 * after the DMA region.
1038 if (va & (dcache_line_size - 1))
1039 cpu_dcache_wb_range(va, 1);
1040 if ((va + size) & (dcache_line_size - 1))
1041 cpu_dcache_wb_range(va + size, 1);
1043 cpu_dcache_inv_range(va, size);
1047 dma_dcache_sync(struct sync_list *sl, bus_dmasync_op_t op)
1049 uint32_t len, offset;
1052 vm_offset_t va, tempva;
1055 offset = sl->paddr & PAGE_MASK;
1057 size = sl->datacount;
1060 for ( ; size != 0; size -= len, pa += len, offset = 0, ++m) {
1062 if (sl->vaddr == 0) {
1063 len = min(PAGE_SIZE - offset, size);
1064 tempva = pmap_quick_enter_page(m);
1065 va = tempva | offset;
1066 KASSERT(pa == (VM_PAGE_TO_PHYS(m) | offset),
1067 ("unexpected vm_page_t phys: 0x%16lx != 0x%16lx",
1068 VM_PAGE_TO_PHYS(m) | offset, pa));
1070 len = sl->datacount;
1075 case BUS_DMASYNC_PREWRITE:
1076 case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD:
1077 cpu_dcache_wb_range(va, len);
1079 case BUS_DMASYNC_PREREAD:
1081 * An mbuf may start in the middle of a cacheline. There
1082 * will be no cpu writes to the beginning of that line
1083 * (which contains the mbuf header) while dma is in
1084 * progress. Handle that case by doing a writeback of
1085 * just the first cacheline before invalidating the
1086 * overall buffer. Any mbuf in a chain may have this
1087 * misalignment. Buffers which are not mbufs bounce if
1088 * they are not aligned to a cacheline.
1090 dma_preread_safe(va, len);
1092 case BUS_DMASYNC_POSTREAD:
1093 case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE:
1094 cpu_dcache_inv_range(va, len);
1097 panic("unsupported combination of sync operations: "
1102 pmap_quick_remove_page(tempva);
1107 bounce_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map,
1108 bus_dmasync_op_t op)
1110 struct bounce_page *bpage;
1111 struct sync_list *sl, *end;
1112 vm_offset_t datavaddr, tempvaddr;
1114 if (op == BUS_DMASYNC_POSTWRITE)
1117 if ((op & BUS_DMASYNC_POSTREAD) != 0) {
1119 * Wait for any DMA operations to complete before the bcopy.
1124 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1125 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x "
1126 "performing bounce", __func__, dmat, dmat->common.flags,
1129 if ((op & BUS_DMASYNC_PREWRITE) != 0) {
1130 while (bpage != NULL) {
1132 datavaddr = bpage->datavaddr;
1133 if (datavaddr == 0) {
1134 tempvaddr = pmap_quick_enter_page(
1136 datavaddr = tempvaddr | bpage->dataoffs;
1139 bcopy((void *)datavaddr,
1140 (void *)bpage->vaddr, bpage->datacount);
1142 pmap_quick_remove_page(tempvaddr);
1143 if ((map->flags & DMAMAP_COHERENT) == 0)
1144 cpu_dcache_wb_range(bpage->vaddr,
1146 bpage = STAILQ_NEXT(bpage, links);
1148 dmat->bounce_zone->total_bounced++;
1149 } else if ((op & BUS_DMASYNC_PREREAD) != 0) {
1150 while (bpage != NULL) {
1151 if ((map->flags & DMAMAP_COHERENT) == 0)
1152 cpu_dcache_wbinv_range(bpage->vaddr,
1154 bpage = STAILQ_NEXT(bpage, links);
1158 if ((op & BUS_DMASYNC_POSTREAD) != 0) {
1159 while (bpage != NULL) {
1160 if ((map->flags & DMAMAP_COHERENT) == 0)
1161 cpu_dcache_inv_range(bpage->vaddr,
1164 datavaddr = bpage->datavaddr;
1165 if (datavaddr == 0) {
1166 tempvaddr = pmap_quick_enter_page(
1168 datavaddr = tempvaddr | bpage->dataoffs;
1171 bcopy((void *)bpage->vaddr,
1172 (void *)datavaddr, bpage->datacount);
1175 pmap_quick_remove_page(tempvaddr);
1176 bpage = STAILQ_NEXT(bpage, links);
1178 dmat->bounce_zone->total_bounced++;
1183 * Cache maintenance for normal (non-COHERENT non-bounce) buffers.
1185 if (map->sync_count != 0) {
1186 sl = &map->slist[0];
1187 end = &map->slist[map->sync_count];
1188 CTR3(KTR_BUSDMA, "%s: tag %p op 0x%x "
1189 "performing sync", __func__, dmat, op);
1191 for ( ; sl != end; ++sl)
1192 dma_dcache_sync(sl, op);
1195 if ((op & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)) != 0) {
1197 * Wait for the bcopy to complete before any DMA operations.
1204 init_bounce_pages(void *dummy __unused)
1208 STAILQ_INIT(&bounce_zone_list);
1209 STAILQ_INIT(&bounce_map_waitinglist);
1210 STAILQ_INIT(&bounce_map_callbacklist);
1211 mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1213 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1215 static struct sysctl_ctx_list *
1216 busdma_sysctl_tree(struct bounce_zone *bz)
1219 return (&bz->sysctl_tree);
1222 static struct sysctl_oid *
1223 busdma_sysctl_tree_top(struct bounce_zone *bz)
1226 return (bz->sysctl_tree_top);
1230 alloc_bounce_zone(bus_dma_tag_t dmat)
1232 struct bounce_zone *bz;
1234 /* Check to see if we already have a suitable zone */
1235 STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1236 if ((dmat->common.alignment <= bz->alignment) &&
1237 (dmat->common.lowaddr >= bz->lowaddr)) {
1238 dmat->bounce_zone = bz;
1243 if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
1244 M_NOWAIT | M_ZERO)) == NULL)
1247 STAILQ_INIT(&bz->bounce_page_list);
1248 bz->free_bpages = 0;
1249 bz->reserved_bpages = 0;
1250 bz->active_bpages = 0;
1251 bz->lowaddr = dmat->common.lowaddr;
1252 bz->alignment = MAX(dmat->common.alignment, PAGE_SIZE);
1254 snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1256 snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1257 STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1258 dmat->bounce_zone = bz;
1260 sysctl_ctx_init(&bz->sysctl_tree);
1261 bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1262 SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1263 CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "");
1264 if (bz->sysctl_tree_top == NULL) {
1265 sysctl_ctx_free(&bz->sysctl_tree);
1266 return (0); /* XXX error code? */
1269 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1270 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1271 "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1272 "Total bounce pages");
1273 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1274 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1275 "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1276 "Free bounce pages");
1277 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1278 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1279 "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1280 "Reserved bounce pages");
1281 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1282 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1283 "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1284 "Active bounce pages");
1285 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1286 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1287 "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1288 "Total bounce requests");
1289 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1290 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1291 "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1292 "Total bounce requests that were deferred");
1293 SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1294 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1295 "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1296 SYSCTL_ADD_UAUTO(busdma_sysctl_tree(bz),
1297 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1298 "alignment", CTLFLAG_RD, &bz->alignment, "");
1304 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1306 struct bounce_zone *bz;
1309 bz = dmat->bounce_zone;
1311 while (numpages > 0) {
1312 struct bounce_page *bpage;
1314 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
1319 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
1320 M_NOWAIT, 0ul, bz->lowaddr, PAGE_SIZE, 0);
1321 if (bpage->vaddr == 0) {
1322 free(bpage, M_DEVBUF);
1325 bpage->busaddr = pmap_kextract(bpage->vaddr);
1326 mtx_lock(&bounce_lock);
1327 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1331 mtx_unlock(&bounce_lock);
1339 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1341 struct bounce_zone *bz;
1344 mtx_assert(&bounce_lock, MA_OWNED);
1345 bz = dmat->bounce_zone;
1346 pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1347 if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1348 return (map->pagesneeded - (map->pagesreserved + pages));
1349 bz->free_bpages -= pages;
1350 bz->reserved_bpages += pages;
1351 map->pagesreserved += pages;
1352 pages = map->pagesneeded - map->pagesreserved;
1358 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1359 bus_addr_t addr, bus_size_t size)
1361 struct bounce_zone *bz;
1362 struct bounce_page *bpage;
1364 KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1366 bz = dmat->bounce_zone;
1367 if (map->pagesneeded == 0)
1368 panic("add_bounce_page: map doesn't need any pages");
1371 if (map->pagesreserved == 0)
1372 panic("add_bounce_page: map doesn't need any pages");
1373 map->pagesreserved--;
1375 mtx_lock(&bounce_lock);
1376 bpage = STAILQ_FIRST(&bz->bounce_page_list);
1378 panic("add_bounce_page: free page list is empty");
1380 STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1381 bz->reserved_bpages--;
1382 bz->active_bpages++;
1383 mtx_unlock(&bounce_lock);
1385 if (dmat->common.flags & BUS_DMA_KEEP_PG_OFFSET) {
1386 /* Page offset needs to be preserved. */
1387 bpage->vaddr |= addr & PAGE_MASK;
1388 bpage->busaddr |= addr & PAGE_MASK;
1390 bpage->datavaddr = vaddr;
1391 bpage->datapage = PHYS_TO_VM_PAGE(addr);
1392 bpage->dataoffs = addr & PAGE_MASK;
1393 bpage->datacount = size;
1394 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1395 return (bpage->busaddr);
1399 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1401 struct bus_dmamap *map;
1402 struct bounce_zone *bz;
1404 bz = dmat->bounce_zone;
1405 bpage->datavaddr = 0;
1406 bpage->datacount = 0;
1407 if (dmat->common.flags & BUS_DMA_KEEP_PG_OFFSET) {
1409 * Reset the bounce page to start at offset 0. Other uses
1410 * of this bounce page may need to store a full page of
1411 * data and/or assume it starts on a page boundary.
1413 bpage->vaddr &= ~PAGE_MASK;
1414 bpage->busaddr &= ~PAGE_MASK;
1417 mtx_lock(&bounce_lock);
1418 STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1420 bz->active_bpages--;
1421 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1422 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1423 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1424 STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1426 busdma_swi_pending = 1;
1427 bz->total_deferred++;
1428 swi_sched(vm_ih, 0);
1431 mtx_unlock(&bounce_lock);
1438 struct bus_dmamap *map;
1440 mtx_lock(&bounce_lock);
1441 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1442 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1443 mtx_unlock(&bounce_lock);
1445 (dmat->common.lockfunc)(dmat->common.lockfuncarg, BUS_DMA_LOCK);
1446 bus_dmamap_load_mem(map->dmat, map, &map->mem,
1447 map->callback, map->callback_arg, BUS_DMA_WAITOK);
1448 (dmat->common.lockfunc)(dmat->common.lockfuncarg,
1450 mtx_lock(&bounce_lock);
1452 mtx_unlock(&bounce_lock);
1455 struct bus_dma_impl bus_dma_bounce_impl = {
1456 .tag_create = bounce_bus_dma_tag_create,
1457 .tag_destroy = bounce_bus_dma_tag_destroy,
1458 .id_mapped = bounce_bus_dma_id_mapped,
1459 .map_create = bounce_bus_dmamap_create,
1460 .map_destroy = bounce_bus_dmamap_destroy,
1461 .mem_alloc = bounce_bus_dmamem_alloc,
1462 .mem_free = bounce_bus_dmamem_free,
1463 .load_phys = bounce_bus_dmamap_load_phys,
1464 .load_buffer = bounce_bus_dmamap_load_buffer,
1465 .load_ma = bus_dmamap_load_ma_triv,
1466 .map_waitok = bounce_bus_dmamap_waitok,
1467 .map_complete = bounce_bus_dmamap_complete,
1468 .map_unload = bounce_bus_dmamap_unload,
1469 .map_sync = bounce_bus_dmamap_sync