2 * Copyright (c) 1997, 1998 Justin T. Gibbs.
3 * Copyright (c) 2015-2016 The FreeBSD Foundation
6 * Portions of this software were developed by Andrew Turner
7 * under sponsorship of the FreeBSD Foundation.
9 * Portions of this software were developed by Semihalf
10 * under sponsorship of the FreeBSD Foundation.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification, immediately at the beginning of the file.
18 * 2. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/domainset.h>
37 #include <sys/malloc.h>
39 #include <sys/interrupt.h>
40 #include <sys/kernel.h>
44 #include <sys/memdesc.h>
45 #include <sys/mutex.h>
46 #include <sys/sysctl.h>
50 #include <vm/vm_extern.h>
51 #include <vm/vm_kern.h>
52 #include <vm/vm_page.h>
53 #include <vm/vm_map.h>
55 #include <machine/atomic.h>
56 #include <machine/bus.h>
57 #include <machine/md_var.h>
58 #include <arm64/include/bus_dma_impl.h>
60 #define MAX_BPAGES 4096
63 BF_COULD_BOUNCE = 0x01,
64 BF_MIN_ALLOC_COMP = 0x02,
73 struct bus_dma_tag_common common;
75 size_t alloc_alignment;
78 bus_dma_segment_t *segments;
79 struct bounce_zone *bounce_zone;
82 static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
86 vm_offset_t vaddr; /* kva of client data */
87 bus_addr_t paddr; /* physical address */
88 vm_page_t pages; /* starting page of client data */
89 bus_size_t datacount; /* client data count */
93 STAILQ_HEAD(, bounce_page) bpages;
98 bus_dmamap_callback_t *callback;
100 __sbintime_t queued_time;
101 STAILQ_ENTRY(bus_dmamap) links;
103 #define DMAMAP_COHERENT (1 << 0)
104 #define DMAMAP_FROM_DMAMEM (1 << 1)
105 #define DMAMAP_MBUF (1 << 2)
107 struct sync_list slist[];
110 int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr);
111 static bool _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map,
112 vm_paddr_t buf, bus_size_t buflen, int *pagesneeded);
113 static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
114 pmap_t pmap, void *buf, bus_size_t buflen, int flags);
115 static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
116 vm_paddr_t buf, bus_size_t buflen, int flags);
118 static MALLOC_DEFINE(M_BUSDMA, "busdma", "busdma metadata");
120 #define dmat_alignment(dmat) ((dmat)->common.alignment)
121 #define dmat_domain(dmat) ((dmat)->common.domain)
122 #define dmat_flags(dmat) ((dmat)->common.flags)
123 #define dmat_lowaddr(dmat) ((dmat)->common.lowaddr)
124 #define dmat_lockfunc(dmat) ((dmat)->common.lockfunc)
125 #define dmat_lockfuncarg(dmat) ((dmat)->common.lockfuncarg)
127 #include "../../kern/subr_busdma_bounce.c"
130 bounce_bus_dma_zone_setup(bus_dma_tag_t dmat)
132 struct bounce_zone *bz;
137 * Round size up to a full page, and add one more page because
138 * there can always be one more boundary crossing than the
139 * number of pages in a transfer.
141 maxsize = roundup2(dmat->common.maxsize, PAGE_SIZE) + PAGE_SIZE;
144 if ((error = alloc_bounce_zone(dmat)) != 0)
146 bz = dmat->bounce_zone;
148 if (ptoa(bz->total_bpages) < maxsize) {
151 pages = atop(maxsize) + 1 - bz->total_bpages;
153 /* Add pages to our bounce pool */
154 if (alloc_bounce_pages(dmat, pages) < pages)
157 /* Performed initial allocation */
158 dmat->bounce_flags |= BF_MIN_ALLOC_COMP;
164 * Return true if the DMA should bounce because the start or end does not fall
165 * on a cacheline boundary (which would require a partial cacheline flush).
166 * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by
167 * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a
168 * strict rule that such memory cannot be accessed by the CPU while DMA is in
169 * progress (or by multiple DMA engines at once), so that it's always safe to do
170 * full cacheline flushes even if that affects memory outside the range of a
171 * given DMA operation that doesn't involve the full allocated buffer. If we're
172 * mapping an mbuf, that follows the same rules as a buffer we allocated.
175 cacheline_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
179 #define DMAMAP_CACHELINE_FLAGS \
180 (DMAMAP_FROM_DMAMEM | DMAMAP_COHERENT | DMAMAP_MBUF)
181 if ((dmat->bounce_flags & BF_COHERENT) != 0)
183 if (map != NULL && (map->flags & DMAMAP_CACHELINE_FLAGS) != 0)
185 return (((paddr | size) & (dcache_line_size - 1)) != 0);
186 #undef DMAMAP_CACHELINE_FLAGS
190 * Return true if the given address does not fall on the alignment boundary.
193 alignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr)
196 return (!vm_addr_align_ok(addr, dmat->common.alignment));
200 might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
204 /* Memory allocated by bounce_bus_dmamem_alloc won't bounce */
205 if (map && (map->flags & DMAMAP_FROM_DMAMEM) != 0)
208 if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0)
211 if (cacheline_bounce(dmat, map, paddr, size))
214 if (alignment_bounce(dmat, paddr))
221 must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr,
225 if (cacheline_bounce(dmat, map, paddr, size))
228 if (alignment_bounce(dmat, paddr))
231 if ((dmat->bounce_flags & BF_COULD_BOUNCE) != 0 &&
232 bus_dma_run_filter(&dmat->common, paddr))
239 * Allocate a device specific dma_tag.
242 bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
243 bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
244 bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
245 int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
246 void *lockfuncarg, bus_dma_tag_t *dmat)
248 bus_dma_tag_t newtag;
252 error = common_bus_dma_tag_create(parent != NULL ? &parent->common :
253 NULL, alignment, boundary, lowaddr, highaddr, filter, filterarg,
254 maxsize, nsegments, maxsegsz, flags, lockfunc, lockfuncarg,
255 sizeof (struct bus_dma_tag), (void **)&newtag);
259 newtag->common.impl = &bus_dma_bounce_impl;
260 newtag->map_count = 0;
261 newtag->segments = NULL;
263 if ((flags & BUS_DMA_COHERENT) != 0) {
264 newtag->bounce_flags |= BF_COHERENT;
267 if (parent != NULL) {
268 if ((newtag->common.filter != NULL ||
269 (parent->bounce_flags & BF_COULD_BOUNCE) != 0))
270 newtag->bounce_flags |= BF_COULD_BOUNCE;
272 /* Copy some flags from the parent */
273 newtag->bounce_flags |= parent->bounce_flags & BF_COHERENT;
276 if ((newtag->bounce_flags & BF_COHERENT) != 0) {
277 newtag->alloc_alignment = newtag->common.alignment;
278 newtag->alloc_size = newtag->common.maxsize;
281 * Ensure the buffer is aligned to a cacheline when allocating
282 * a non-coherent buffer. This is so we don't have any data
283 * that another CPU may be accessing around DMA buffer
284 * causing the cache to become dirty.
286 newtag->alloc_alignment = MAX(newtag->common.alignment,
288 newtag->alloc_size = roundup2(newtag->common.maxsize,
292 if (newtag->common.lowaddr < ptoa((vm_paddr_t)Maxmem) ||
293 newtag->common.alignment > 1)
294 newtag->bounce_flags |= BF_COULD_BOUNCE;
296 if ((flags & BUS_DMA_ALLOCNOW) != 0)
297 error = bounce_bus_dma_zone_setup(newtag);
302 free(newtag, M_DEVBUF);
305 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
306 __func__, newtag, (newtag != NULL ? newtag->common.flags : 0),
312 bounce_bus_dma_tag_destroy(bus_dma_tag_t dmat)
315 bus_dma_tag_t dmat_copy;
317 bus_dma_tag_t parent;
327 if (dmat->map_count != 0) {
331 while (dmat != NULL) {
332 parent = (bus_dma_tag_t)dmat->common.parent;
333 atomic_subtract_int(&dmat->common.ref_count, 1);
334 if (dmat->common.ref_count == 0) {
335 if (dmat->segments != NULL)
336 free(dmat->segments, M_DEVBUF);
337 free(dmat, M_DEVBUF);
339 * Last reference count, so
340 * release our reference
341 * count on our parent.
349 CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error);
354 * Update the domain for the tag. We may need to reallocate the zone and
358 bounce_bus_dma_tag_set_domain(bus_dma_tag_t dmat)
361 KASSERT(dmat->map_count == 0,
362 ("bounce_bus_dma_tag_set_domain: Domain set after use.\n"));
363 if ((dmat->bounce_flags & BF_COULD_BOUNCE) == 0 ||
364 dmat->bounce_zone == NULL)
366 dmat->bounce_flags &= ~BF_MIN_ALLOC_COMP;
367 return (bounce_bus_dma_zone_setup(dmat));
371 bounce_bus_dma_id_mapped(bus_dma_tag_t dmat, vm_paddr_t buf, bus_size_t buflen)
374 if (!might_bounce(dmat, NULL, buf, buflen))
376 return (!_bus_dmamap_pagesneeded(dmat, NULL, buf, buflen, NULL));
380 alloc_dmamap(bus_dma_tag_t dmat, int flags)
385 mapsize = sizeof(*map);
386 mapsize += sizeof(struct sync_list) * dmat->common.nsegments;
387 map = malloc_domainset(mapsize, M_DEVBUF,
388 DOMAINSET_PREF(dmat->common.domain), flags | M_ZERO);
392 /* Initialize the new map */
393 STAILQ_INIT(&map->bpages);
399 * Allocate a handle for mapping from kva/uva/physical
400 * address space into bus device space.
403 bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
405 struct bounce_zone *bz;
406 int error, maxpages, pages;
410 if (dmat->segments == NULL) {
411 dmat->segments = mallocarray_domainset(dmat->common.nsegments,
412 sizeof(bus_dma_segment_t), M_DEVBUF,
413 DOMAINSET_PREF(dmat->common.domain), M_NOWAIT);
414 if (dmat->segments == NULL) {
415 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
416 __func__, dmat, ENOMEM);
421 *mapp = alloc_dmamap(dmat, M_NOWAIT);
423 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
424 __func__, dmat, ENOMEM);
429 * Bouncing might be required if the driver asks for an active
430 * exclusion region, a data alignment that is stricter than 1, and/or
431 * an active address boundary.
433 if (dmat->bounce_zone == NULL) {
434 if ((error = alloc_bounce_zone(dmat)) != 0) {
435 free(*mapp, M_DEVBUF);
439 bz = dmat->bounce_zone;
442 * Attempt to add pages to our pool on a per-instance basis up to a sane
443 * limit. Even if the tag isn't subject of bouncing due to alignment
444 * and boundary constraints, it could still auto-bounce due to
445 * cacheline alignment, which requires at most two bounce pages.
447 if (dmat->common.alignment > 1)
448 maxpages = MAX_BPAGES;
450 maxpages = MIN(MAX_BPAGES, Maxmem -
451 atop(dmat->common.lowaddr));
452 if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0 ||
453 (bz->map_count > 0 && bz->total_bpages < maxpages)) {
454 pages = atop(roundup2(dmat->common.maxsize, PAGE_SIZE)) + 1;
455 pages = MIN(maxpages - bz->total_bpages, pages);
456 pages = MAX(pages, 2);
457 if (alloc_bounce_pages(dmat, pages) < pages)
459 if ((dmat->bounce_flags & BF_MIN_ALLOC_COMP) == 0) {
461 dmat->bounce_flags |= BF_MIN_ALLOC_COMP;
470 if ((dmat->bounce_flags & BF_COHERENT) != 0)
471 (*mapp)->flags |= DMAMAP_COHERENT;
473 free(*mapp, M_DEVBUF);
475 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
476 __func__, dmat, dmat->common.flags, error);
481 * Destroy a handle for mapping from kva/uva/physical
482 * address space into bus device space.
485 bounce_bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
488 /* Check we are destroying the correct map type */
489 if ((map->flags & DMAMAP_FROM_DMAMEM) != 0)
490 panic("bounce_bus_dmamap_destroy: Invalid map freed\n");
492 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
493 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, EBUSY);
496 if (dmat->bounce_zone)
497 dmat->bounce_zone->map_count--;
500 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
505 * Allocate a piece of memory that can be efficiently mapped into
506 * bus device space based on the constraints lited in the dma tag.
507 * A dmamap to for use with dmamap_load is also allocated.
510 bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
516 if (flags & BUS_DMA_NOWAIT)
521 if (dmat->segments == NULL) {
522 dmat->segments = mallocarray_domainset(dmat->common.nsegments,
523 sizeof(bus_dma_segment_t), M_DEVBUF,
524 DOMAINSET_PREF(dmat->common.domain), mflags);
525 if (dmat->segments == NULL) {
526 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
527 __func__, dmat, dmat->common.flags, ENOMEM);
531 if (flags & BUS_DMA_ZERO)
533 if (flags & BUS_DMA_NOCACHE)
534 attr = VM_MEMATTR_UNCACHEABLE;
535 else if ((flags & BUS_DMA_COHERENT) != 0 &&
536 (dmat->bounce_flags & BF_COHERENT) == 0)
538 * If we have a non-coherent tag, and are trying to allocate
539 * a coherent block of memory it needs to be uncached.
541 attr = VM_MEMATTR_UNCACHEABLE;
543 attr = VM_MEMATTR_DEFAULT;
546 * Create the map, but don't set the could bounce flag as
547 * this allocation should never bounce;
549 *mapp = alloc_dmamap(dmat, mflags);
551 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
552 __func__, dmat, dmat->common.flags, ENOMEM);
557 * Mark the map as coherent if we used uncacheable memory or the
558 * tag was already marked as coherent.
560 if (attr == VM_MEMATTR_UNCACHEABLE ||
561 (dmat->bounce_flags & BF_COHERENT) != 0)
562 (*mapp)->flags |= DMAMAP_COHERENT;
564 (*mapp)->flags |= DMAMAP_FROM_DMAMEM;
567 * Allocate the buffer from the malloc(9) allocator if...
568 * - It's small enough to fit into a single page.
569 * - Its alignment requirement is also smaller than the page size.
570 * - The low address requirement is fulfilled.
571 * - Default cache attributes are requested (WB).
572 * else allocate non-contiguous pages if...
573 * - The page count that could get allocated doesn't exceed
574 * nsegments also when the maximum segment size is less
576 * - The alignment constraint isn't larger than a page boundary.
577 * - There are no boundary-crossing constraints.
578 * else allocate a block of contiguous pages because one or more of the
579 * constraints is something that only the contig allocator can fulfill.
581 * NOTE: The (dmat->common.alignment <= dmat->maxsize) check
582 * below is just a quick hack. The exact alignment guarantees
583 * of malloc(9) need to be nailed down, and the code below
584 * should be rewritten to take that into account.
586 * In the meantime warn the user if malloc gets it wrong.
588 if (dmat->alloc_size <= PAGE_SIZE &&
589 dmat->alloc_alignment <= PAGE_SIZE &&
590 dmat->common.lowaddr >= ptoa((vm_paddr_t)Maxmem) &&
591 attr == VM_MEMATTR_DEFAULT) {
592 *vaddr = malloc_domainset_aligned(dmat->alloc_size,
593 dmat->alloc_alignment, M_DEVBUF,
594 DOMAINSET_PREF(dmat->common.domain), mflags);
595 } else if (dmat->common.nsegments >=
596 howmany(dmat->alloc_size, MIN(dmat->common.maxsegsz, PAGE_SIZE)) &&
597 dmat->alloc_alignment <= PAGE_SIZE &&
598 (dmat->common.boundary % PAGE_SIZE) == 0) {
599 /* Page-based multi-segment allocations allowed */
600 *vaddr = kmem_alloc_attr_domainset(
601 DOMAINSET_PREF(dmat->common.domain), dmat->alloc_size,
602 mflags, 0ul, dmat->common.lowaddr, attr);
603 dmat->bounce_flags |= BF_KMEM_ALLOC;
605 *vaddr = kmem_alloc_contig_domainset(
606 DOMAINSET_PREF(dmat->common.domain), dmat->alloc_size,
607 mflags, 0ul, dmat->common.lowaddr,
608 dmat->alloc_alignment != 0 ? dmat->alloc_alignment : 1ul,
609 dmat->common.boundary, attr);
610 dmat->bounce_flags |= BF_KMEM_ALLOC;
612 if (*vaddr == NULL) {
613 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
614 __func__, dmat, dmat->common.flags, ENOMEM);
615 free(*mapp, M_DEVBUF);
617 } else if (!vm_addr_align_ok(vtophys(*vaddr), dmat->alloc_alignment)) {
618 printf("bus_dmamem_alloc failed to align memory properly.\n");
621 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
622 __func__, dmat, dmat->common.flags, 0);
627 * Free a piece of memory and it's allociated dmamap, that was allocated
628 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
631 bounce_bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
635 * Check the map came from bounce_bus_dmamem_alloc, so the map
636 * should be NULL and the BF_KMEM_ALLOC flag cleared if malloc()
637 * was used and set if kmem_alloc_contig() was used.
639 if ((map->flags & DMAMAP_FROM_DMAMEM) == 0)
640 panic("bus_dmamem_free: Invalid map freed\n");
641 if ((dmat->bounce_flags & BF_KMEM_ALLOC) == 0)
642 free(vaddr, M_DEVBUF);
644 kmem_free(vaddr, dmat->alloc_size);
647 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat,
652 _bus_dmamap_pagesneeded(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
653 bus_size_t buflen, int *pagesneeded)
660 * Count the number of bounce pages needed in order to
661 * complete this transfer
665 while (buflen != 0) {
666 sgsize = MIN(buflen, dmat->common.maxsegsz);
667 if (must_bounce(dmat, map, curaddr, sgsize)) {
669 PAGE_SIZE - (curaddr & PAGE_MASK));
670 if (pagesneeded == NULL)
678 if (pagesneeded != NULL)
679 *pagesneeded = count;
684 _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
685 bus_size_t buflen, int flags)
688 if (map->pagesneeded == 0) {
689 _bus_dmamap_pagesneeded(dmat, map, buf, buflen,
691 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
696 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
697 void *buf, bus_size_t buflen, int flags)
700 vm_offset_t vendaddr;
704 if (map->pagesneeded == 0) {
705 CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, "
706 "alignment= %d", dmat->common.lowaddr,
707 ptoa((vm_paddr_t)Maxmem),
708 dmat->common.boundary, dmat->common.alignment);
709 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", map,
712 * Count the number of bounce pages
713 * needed in order to complete this transfer
715 vaddr = (vm_offset_t)buf;
716 vendaddr = (vm_offset_t)buf + buflen;
718 while (vaddr < vendaddr) {
719 sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK);
720 if (pmap == kernel_pmap)
721 paddr = pmap_kextract(vaddr);
723 paddr = pmap_extract(pmap, vaddr);
724 if (must_bounce(dmat, map, paddr,
725 min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr &
726 PAGE_MASK)))) != 0) {
727 sg_len = roundup2(sg_len,
728 dmat->common.alignment);
733 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
738 * Add a single contiguous physical range to the segment list.
741 _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
742 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
747 * Make sure we don't cross any boundaries.
749 if (!vm_addr_bound_ok(curaddr, sgsize, dmat->common.boundary))
750 sgsize = roundup2(curaddr, dmat->common.boundary) - curaddr;
753 * Insert chunk into a segment, coalescing with
754 * previous segment if possible.
759 segs[seg].ds_addr = curaddr;
760 segs[seg].ds_len = sgsize;
762 if (curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
763 (segs[seg].ds_len + sgsize) <= dmat->common.maxsegsz &&
764 vm_addr_bound_ok(segs[seg].ds_addr,
765 segs[seg].ds_len + sgsize, dmat->common.boundary))
766 segs[seg].ds_len += sgsize;
768 if (++seg >= dmat->common.nsegments)
770 segs[seg].ds_addr = curaddr;
771 segs[seg].ds_len = sgsize;
779 * Utility function to load a physical buffer. segp contains
780 * the starting segment on entrace, and the ending segment on exit.
783 bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
784 vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs,
787 struct sync_list *sl;
789 bus_addr_t curaddr, sl_end;
793 segs = dmat->segments;
795 if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) {
796 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
797 if (map->pagesneeded != 0) {
798 error = _bus_dmamap_reserve_pages(dmat, map, flags);
804 sl = map->slist + map->sync_count - 1;
809 sgsize = MIN(buflen, dmat->common.maxsegsz);
810 if (map->pagesneeded != 0 &&
811 must_bounce(dmat, map, curaddr, sgsize)) {
813 * The attempt to split a physically continuous buffer
814 * seems very controversial, it's unclear whether we
815 * can do this in all cases. Also, memory for bounced
816 * buffers is allocated as pages, so we cannot
817 * guarantee multipage alignment.
819 KASSERT(dmat->common.alignment <= PAGE_SIZE,
820 ("bounced buffer cannot have alignment bigger "
821 "than PAGE_SIZE: %lu", dmat->common.alignment));
822 sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
823 curaddr = add_bounce_page(dmat, map, 0, curaddr,
825 } else if ((map->flags & DMAMAP_COHERENT) == 0) {
826 if (map->sync_count > 0)
827 sl_end = sl->paddr + sl->datacount;
829 if (map->sync_count == 0 || curaddr != sl_end) {
830 if (++map->sync_count > dmat->common.nsegments)
835 sl->pages = PHYS_TO_VM_PAGE(curaddr);
836 KASSERT(sl->pages != NULL,
837 ("%s: page at PA:0x%08lx is not in "
838 "vm_page_array", __func__, curaddr));
839 sl->datacount = sgsize;
841 sl->datacount += sgsize;
843 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
855 bus_dmamap_unload(dmat, map);
856 return (EFBIG); /* XXX better return value here? */
862 * Utility function to load a linear buffer. segp contains
863 * the starting segment on entrace, and the ending segment on exit.
866 bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
867 bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs,
870 struct sync_list *sl;
872 bus_addr_t curaddr, sl_pend;
873 vm_offset_t kvaddr, vaddr, sl_vend;
876 KASSERT((map->flags & DMAMAP_FROM_DMAMEM) != 0 ||
877 dmat->common.alignment <= PAGE_SIZE,
878 ("loading user buffer with alignment bigger than PAGE_SIZE is not "
882 segs = dmat->segments;
884 if (flags & BUS_DMA_LOAD_MBUF)
885 map->flags |= DMAMAP_MBUF;
887 if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) {
888 _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
889 if (map->pagesneeded != 0) {
890 error = _bus_dmamap_reserve_pages(dmat, map, flags);
897 * XXX Optimally we should parse input buffer for physically
898 * continuous segments first and then pass these segment into
901 sl = map->slist + map->sync_count - 1;
902 vaddr = (vm_offset_t)buf;
908 * Get the physical address for this segment.
910 if (__predict_true(pmap == kernel_pmap)) {
911 curaddr = pmap_kextract(vaddr);
914 curaddr = pmap_extract(pmap, vaddr);
919 * Compute the segment size, and adjust counts.
921 sgsize = MIN(buflen, dmat->common.maxsegsz);
922 if ((map->flags & DMAMAP_FROM_DMAMEM) == 0)
923 sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK));
925 if (map->pagesneeded != 0 &&
926 must_bounce(dmat, map, curaddr, sgsize)) {
927 /* See comment in bounce_bus_dmamap_load_phys */
928 KASSERT(dmat->common.alignment <= PAGE_SIZE,
929 ("bounced buffer cannot have alignment bigger "
930 "than PAGE_SIZE: %lu", dmat->common.alignment));
931 curaddr = add_bounce_page(dmat, map, kvaddr, curaddr,
933 } else if ((map->flags & DMAMAP_COHERENT) == 0) {
934 if (map->sync_count > 0) {
935 sl_pend = sl->paddr + sl->datacount;
936 sl_vend = sl->vaddr + sl->datacount;
939 if (map->sync_count == 0 ||
940 (kvaddr != 0 && kvaddr != sl_vend) ||
941 (curaddr != sl_pend)) {
942 if (++map->sync_count > dmat->common.nsegments)
950 sl->pages = PHYS_TO_VM_PAGE(curaddr);
951 KASSERT(sl->pages != NULL,
952 ("%s: page at PA:0x%08lx is not "
953 "in vm_page_array", __func__,
956 sl->datacount = sgsize;
958 sl->datacount += sgsize;
960 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
972 bus_dmamap_unload(dmat, map);
973 return (EFBIG); /* XXX better return value here? */
979 bounce_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
980 struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
985 map->callback = callback;
986 map->callback_arg = callback_arg;
989 static bus_dma_segment_t *
990 bounce_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
991 bus_dma_segment_t *segs, int nsegs, int error)
995 segs = dmat->segments;
1000 * Release the mapping held by map.
1003 bounce_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1005 free_bounce_pages(dmat, map);
1006 map->sync_count = 0;
1007 map->flags &= ~DMAMAP_MBUF;
1011 dma_preread_safe(vm_offset_t va, vm_size_t size)
1014 * Write back any partial cachelines immediately before and
1015 * after the DMA region.
1017 if (va & (dcache_line_size - 1))
1018 cpu_dcache_wb_range(va, 1);
1019 if ((va + size) & (dcache_line_size - 1))
1020 cpu_dcache_wb_range(va + size, 1);
1022 cpu_dcache_inv_range(va, size);
1026 dma_dcache_sync(struct sync_list *sl, bus_dmasync_op_t op)
1028 uint32_t len, offset;
1031 vm_offset_t va, tempva;
1034 offset = sl->paddr & PAGE_MASK;
1036 size = sl->datacount;
1039 for ( ; size != 0; size -= len, pa += len, offset = 0, ++m) {
1041 if (sl->vaddr == 0) {
1042 len = min(PAGE_SIZE - offset, size);
1043 tempva = pmap_quick_enter_page(m);
1044 va = tempva | offset;
1045 KASSERT(pa == (VM_PAGE_TO_PHYS(m) | offset),
1046 ("unexpected vm_page_t phys: 0x%16lx != 0x%16lx",
1047 VM_PAGE_TO_PHYS(m) | offset, pa));
1049 len = sl->datacount;
1054 case BUS_DMASYNC_PREWRITE:
1055 case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD:
1056 cpu_dcache_wb_range(va, len);
1058 case BUS_DMASYNC_PREREAD:
1060 * An mbuf may start in the middle of a cacheline. There
1061 * will be no cpu writes to the beginning of that line
1062 * (which contains the mbuf header) while dma is in
1063 * progress. Handle that case by doing a writeback of
1064 * just the first cacheline before invalidating the
1065 * overall buffer. Any mbuf in a chain may have this
1066 * misalignment. Buffers which are not mbufs bounce if
1067 * they are not aligned to a cacheline.
1069 dma_preread_safe(va, len);
1071 case BUS_DMASYNC_POSTREAD:
1072 case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE:
1073 cpu_dcache_inv_range(va, len);
1076 panic("unsupported combination of sync operations: "
1081 pmap_quick_remove_page(tempva);
1086 bounce_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map,
1087 bus_dmasync_op_t op)
1089 struct bounce_page *bpage;
1090 struct sync_list *sl, *end;
1091 vm_offset_t datavaddr, tempvaddr;
1093 if (op == BUS_DMASYNC_POSTWRITE)
1096 if ((op & BUS_DMASYNC_POSTREAD) != 0) {
1098 * Wait for any DMA operations to complete before the bcopy.
1103 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1104 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x "
1105 "performing bounce", __func__, dmat, dmat->common.flags,
1108 if ((op & BUS_DMASYNC_PREWRITE) != 0) {
1109 while (bpage != NULL) {
1111 datavaddr = bpage->datavaddr;
1112 if (datavaddr == 0) {
1113 tempvaddr = pmap_quick_enter_page(
1115 datavaddr = tempvaddr | bpage->dataoffs;
1118 bcopy((void *)datavaddr,
1119 (void *)bpage->vaddr, bpage->datacount);
1121 pmap_quick_remove_page(tempvaddr);
1122 if ((map->flags & DMAMAP_COHERENT) == 0)
1123 cpu_dcache_wb_range(bpage->vaddr,
1125 bpage = STAILQ_NEXT(bpage, links);
1127 dmat->bounce_zone->total_bounced++;
1128 } else if ((op & BUS_DMASYNC_PREREAD) != 0) {
1129 while (bpage != NULL) {
1130 if ((map->flags & DMAMAP_COHERENT) == 0)
1131 cpu_dcache_wbinv_range(bpage->vaddr,
1133 bpage = STAILQ_NEXT(bpage, links);
1137 if ((op & BUS_DMASYNC_POSTREAD) != 0) {
1138 while (bpage != NULL) {
1139 if ((map->flags & DMAMAP_COHERENT) == 0)
1140 cpu_dcache_inv_range(bpage->vaddr,
1143 datavaddr = bpage->datavaddr;
1144 if (datavaddr == 0) {
1145 tempvaddr = pmap_quick_enter_page(
1147 datavaddr = tempvaddr | bpage->dataoffs;
1150 bcopy((void *)bpage->vaddr,
1151 (void *)datavaddr, bpage->datacount);
1154 pmap_quick_remove_page(tempvaddr);
1155 bpage = STAILQ_NEXT(bpage, links);
1157 dmat->bounce_zone->total_bounced++;
1162 * Cache maintenance for normal (non-COHERENT non-bounce) buffers.
1164 if (map->sync_count != 0) {
1165 sl = &map->slist[0];
1166 end = &map->slist[map->sync_count];
1167 CTR3(KTR_BUSDMA, "%s: tag %p op 0x%x "
1168 "performing sync", __func__, dmat, op);
1170 for ( ; sl != end; ++sl)
1171 dma_dcache_sync(sl, op);
1174 if ((op & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)) != 0) {
1176 * Wait for the bcopy to complete before any DMA operations.
1182 struct bus_dma_impl bus_dma_bounce_impl = {
1183 .tag_create = bounce_bus_dma_tag_create,
1184 .tag_destroy = bounce_bus_dma_tag_destroy,
1185 .tag_set_domain = bounce_bus_dma_tag_set_domain,
1186 .id_mapped = bounce_bus_dma_id_mapped,
1187 .map_create = bounce_bus_dmamap_create,
1188 .map_destroy = bounce_bus_dmamap_destroy,
1189 .mem_alloc = bounce_bus_dmamem_alloc,
1190 .mem_free = bounce_bus_dmamem_free,
1191 .load_phys = bounce_bus_dmamap_load_phys,
1192 .load_buffer = bounce_bus_dmamap_load_buffer,
1193 .load_ma = bus_dmamap_load_ma_triv,
1194 .map_waitok = bounce_bus_dmamap_waitok,
1195 .map_complete = bounce_bus_dmamap_complete,
1196 .map_unload = bounce_bus_dmamap_unload,
1197 .map_sync = bounce_bus_dmamap_sync