2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2018 Andrew Turner
7 * This software was developed by SRI International and the University of
8 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
9 * ("CTSRD"), as part of the DARPA CRASH research programme.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include "opt_platform.h"
35 #include <sys/cdefs.h>
36 #include <sys/param.h>
37 #include <sys/kernel.h>
39 #include <sys/systm.h>
41 #include <machine/cpu.h>
43 #include <dev/psci/smccc.h>
45 typedef void (cpu_quirk_install)(void);
47 cpu_quirk_install *quirk_install;
50 #define CPU_QUIRK_POST_DEVICE (1 << 0) /* After device attach */
51 /* e.g. needs SMCCC */
59 } ssbd_method = SSBD_KERNEL;
61 static cpu_quirk_install install_psci_bp_hardening;
62 static cpu_quirk_install install_ssbd_workaround;
63 static cpu_quirk_install install_thunderx_bcast_tlbi_workaround;
65 static struct cpu_quirks cpu_quirks[] = {
67 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
68 .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A57,0,0),
69 .quirk_install = install_psci_bp_hardening,
70 .flags = CPU_QUIRK_POST_DEVICE,
73 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
74 .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A72,0,0),
75 .quirk_install = install_psci_bp_hardening,
76 .flags = CPU_QUIRK_POST_DEVICE,
79 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
80 .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A73,0,0),
81 .quirk_install = install_psci_bp_hardening,
82 .flags = CPU_QUIRK_POST_DEVICE,
85 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
86 .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A75,0,0),
87 .quirk_install = install_psci_bp_hardening,
88 .flags = CPU_QUIRK_POST_DEVICE,
91 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
93 CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX2, 0,0),
94 .quirk_install = install_psci_bp_hardening,
95 .flags = CPU_QUIRK_POST_DEVICE,
100 .quirk_install = install_ssbd_workaround,
101 .flags = CPU_QUIRK_POST_DEVICE,
104 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
106 CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0),
107 .quirk_install = install_thunderx_bcast_tlbi_workaround,
110 .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK,
112 CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX_81XX, 0, 0),
113 .quirk_install = install_thunderx_bcast_tlbi_workaround,
118 install_psci_bp_hardening(void)
121 if (smccc_arch_features(SMCCC_ARCH_WORKAROUND_1) != SMCCC_RET_SUCCESS)
124 PCPU_SET(bp_harden, smccc_arch_workaround_1);
128 install_ssbd_workaround(void)
132 if (PCPU_GET(cpuid) == 0) {
133 env = kern_getenv("kern.cfg.ssbd");
135 if (strcmp(env, "force-on") == 0) {
136 ssbd_method = SSBD_FORCE_ON;
137 } else if (strcmp(env, "force-off") == 0) {
138 ssbd_method = SSBD_FORCE_OFF;
143 /* Enable the workaround on this CPU if it's enabled in the firmware */
144 if (smccc_arch_features(SMCCC_ARCH_WORKAROUND_2) != SMCCC_RET_SUCCESS)
147 switch(ssbd_method) {
149 smccc_arch_workaround_2(1);
152 smccc_arch_workaround_2(0);
156 PCPU_SET(ssbd, smccc_arch_workaround_2);
162 * Workaround Cavium erratum 27456.
164 * Invalidate the local icache when changing address spaces.
167 install_thunderx_bcast_tlbi_workaround(void)
172 if (CPU_PART(midr) == CPU_PART_THUNDERX_81XX)
173 PCPU_SET(bcast_tlbi_workaround, 1);
174 else if (CPU_PART(midr) == CPU_PART_THUNDERX) {
175 if (CPU_VAR(midr) == 0) {
177 PCPU_SET(bcast_tlbi_workaround, 1);
178 } else if (CPU_VAR(midr) == 1 && CPU_REV(midr) <= 1) {
179 /* ThunderX 2.0 - 2.1 */
180 PCPU_SET(bcast_tlbi_workaround, 1);
186 install_cpu_errata_flags(u_int mask, u_int flags)
193 for (i = 0; i < nitems(cpu_quirks); i++) {
194 if ((midr & cpu_quirks[i].midr_mask) ==
195 cpu_quirks[i].midr_value &&
196 (cpu_quirks[i].flags & mask) == flags) {
197 cpu_quirks[i].quirk_install();
203 * Install any CPU errata we need. On CPU 0 we only install the errata that
204 * don't depend on device drivers as this is called early in the boot process.
205 * On other CPUs the device drivers have already attached so install all
209 install_cpu_errata(void)
212 * Only install early CPU errata on CPU 0, device drivers may not
213 * have attached and some workarounds depend on them, e.g. to query
216 if (PCPU_GET(cpuid) == 0) {
217 install_cpu_errata_flags(CPU_QUIRK_POST_DEVICE, 0);
219 install_cpu_errata_flags(0, 0);
224 * Install any errata workarounds that depend on device drivers, e.g. use
225 * SMCCC to install a workaround.
228 install_cpu_errata_late(void *dummy __unused)
230 MPASS(PCPU_GET(cpuid) == 0);
231 install_cpu_errata_flags(CPU_QUIRK_POST_DEVICE, CPU_QUIRK_POST_DEVICE);
233 SYSINIT(install_cpu_errata_late, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE,
234 install_cpu_errata_late, NULL);