2 * Copyright (c) 2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <machine/asm.h>
29 __FBSDID("$FreeBSD$");
35 .macro save_registers el
40 stp x28, x29, [sp, #-16]!
41 stp x26, x27, [sp, #-16]!
42 stp x24, x25, [sp, #-16]!
43 stp x22, x23, [sp, #-16]!
44 stp x20, x21, [sp, #-16]!
45 stp x18, x19, [sp, #-16]!
46 stp x16, x17, [sp, #-16]!
47 stp x14, x15, [sp, #-16]!
48 stp x12, x13, [sp, #-16]!
49 stp x10, x11, [sp, #-16]!
50 stp x8, x9, [sp, #-16]!
51 stp x6, x7, [sp, #-16]!
52 stp x4, x5, [sp, #-16]!
53 stp x2, x3, [sp, #-16]!
54 stp x0, x1, [sp, #-16]!
60 stp x10, x11, [sp, #-16]!
61 stp x18, lr, [sp, #-16]!
65 .macro restore_registers el
69 * Disable interrupts, x18 may change in the interrupt exception
70 * handler. For EL0 exceptions, do_ast already did this.
73 ldp x18, lr, [sp], #16
74 ldp x10, x11, [sp], #16
85 ldp x10, x11, [sp], #16
86 ldp x12, x13, [sp], #16
87 ldp x14, x15, [sp], #16
88 ldp x16, x17, [sp], #16
90 ldp x18, x19, [sp], #16
92 ldp xzr, x19, [sp], #16
94 ldp x20, x21, [sp], #16
95 ldp x22, x23, [sp], #16
96 ldp x24, x25, [sp], #16
97 ldp x26, x27, [sp], #16
98 ldp x28, x29, [sp], #16
106 /* Disable interrupts */
111 /* Read the current thread flags */
112 ldr x1, [x18, #PC_CURTHREAD] /* Load curthread */
113 ldr x2, [x1, #TD_FLAGS]
115 /* Check if we have either bits set */
116 mov x3, #((TDF_ASTPENDING|TDF_NEEDRESCHED) >> 8)
121 /* Restore interrupts */
128 /* Re-check for new ast scheduled */
133 ENTRY(handle_el1h_sync)
139 END(handle_el1h_sync)
141 ENTRY(handle_el1h_irq)
149 ENTRY(handle_el1h_error)
151 END(handle_el1h_error)
153 ENTRY(handle_el0_sync)
162 ENTRY(handle_el0_irq)
171 ENTRY(handle_el0_error)
177 END(handle_el0_error)
191 .globl exception_vectors
193 vempty /* Synchronous EL1t */
194 vempty /* IRQ EL1t */
195 vempty /* FIQ EL1t */
196 vempty /* Error EL1t */
198 vector el1h_sync /* Synchronous EL1h */
199 vector el1h_irq /* IRQ EL1h */
200 vempty /* FIQ EL1h */
201 vector el1h_error /* Error EL1h */
203 vector el0_sync /* Synchronous 64-bit EL0 */
204 vector el0_irq /* IRQ 64-bit EL0 */
205 vempty /* FIQ 64-bit EL0 */
206 vector el0_error /* Error 64-bit EL0 */
208 vempty /* Synchronous 32-bit EL0 */
209 vempty /* IRQ 32-bit EL0 */
210 vempty /* FIQ 32-bit EL0 */
211 vempty /* Error 32-bit EL0 */