sys/arm64/arm64/exec_machdep.c

   1 /*-
   2  * Copyright (c) 2014 Andrew Turner
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  */
  27
  28 #include <sys/cdefs.h>
  29 __FBSDID("$FreeBSD$");
  30
  31 #include <sys/param.h>
  32 #include <sys/systm.h>
  33 #include <sys/exec.h>
  34 #include <sys/imgact.h>
  35 #include <sys/kdb.h>
  36 #include <sys/kernel.h>
  37 #include <sys/ktr.h>
  38 #include <sys/limits.h>
  39 #include <sys/lock.h>
  40 #include <sys/mutex.h>
  41 #include <sys/proc.h>
  42 #include <sys/ptrace.h>
  43 #include <sys/reg.h>
  44 #include <sys/rwlock.h>
  45 #include <sys/signalvar.h>
  46 #include <sys/syscallsubr.h>
  47 #include <sys/sysent.h>
  48 #include <sys/sysproto.h>
  49 #include <sys/ucontext.h>
  50
  51 #include <vm/vm.h>
  52 #include <vm/vm_param.h>
  53
  54 #include <machine/armreg.h>
  55 #include <machine/kdb.h>
  56 #include <machine/md_var.h>
  57 #include <machine/pcb.h>
  58
  59 #ifdef VFP
  60 #include <machine/vfp.h>
  61 #endif
  62
  63 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
  64 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
  65
  66 int
  67 fill_regs(struct thread *td, struct reg *regs)
  68 {
  69         struct trapframe *frame;
  70
  71         frame = td->td_frame;
  72         regs->sp = frame->tf_sp;
  73         regs->lr = frame->tf_lr;
  74         regs->elr = frame->tf_elr;
  75         regs->spsr = frame->tf_spsr;
  76
  77         memcpy(regs->x, frame->tf_x, sizeof(regs->x));
  78
  79 #ifdef COMPAT_FREEBSD32
  80         /*
  81          * We may be called here for a 32bits process, if we're using a
  82          * 64bits debugger. If so, put PC and SPSR where it expects it.
  83          */
  84         if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
  85                 regs->x[15] = frame->tf_elr;
  86                 regs->x[16] = frame->tf_spsr;
  87         }
  88 #endif
  89         return (0);
  90 }
  91
  92 int
  93 set_regs(struct thread *td, struct reg *regs)
  94 {
  95         struct trapframe *frame;
  96
  97         frame = td->td_frame;
  98         frame->tf_sp = regs->sp;
  99         frame->tf_lr = regs->lr;
 100
 101         memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
 102
 103 #ifdef COMPAT_FREEBSD32
 104         if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
 105                 /*
 106                  * We may be called for a 32bits process if we're using
 107                  * a 64bits debugger. If so, get PC and SPSR from where
 108                  * it put it.
 109                  */
 110                 frame->tf_elr = regs->x[15];
 111                 frame->tf_spsr &= ~PSR_SETTABLE_32;
 112                 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
 113                 /* Don't allow userspace to ask to continue single stepping.
 114                  * The SPSR.SS field doesn't exist when the EL1 is AArch32.
 115                  * As the SPSR.DIT field has moved in its place don't
 116                  * allow userspace to set the SPSR.SS field.
 117                  */
 118         } else
 119 #endif
 120         {
 121                 frame->tf_elr = regs->elr;
 122                 frame->tf_spsr &= ~PSR_SETTABLE_64;
 123                 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
 124                 /* Enable single stepping if userspace asked fot it */
 125                 if ((frame->tf_spsr & PSR_SS) != 0) {
 126                         td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
 127
 128                         WRITE_SPECIALREG(mdscr_el1,
 129                             READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
 130                         isb();
 131                 }
 132         }
 133         return (0);
 134 }
 135
 136 int
 137 fill_fpregs(struct thread *td, struct fpreg *regs)
 138 {
 139 #ifdef VFP
 140         struct pcb *pcb;
 141
 142         pcb = td->td_pcb;
 143         if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
 144                 /*
 145                  * If we have just been running VFP instructions we will
 146                  * need to save the state to memcpy it below.
 147                  */
 148                 if (td == curthread)
 149                         vfp_save_state(td, pcb);
 150         }
 151
 152         KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
 153             ("Called fill_fpregs while the kernel is using the VFP"));
 154         memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
 155             sizeof(regs->fp_q));
 156         regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
 157         regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
 158 #else
 159         memset(regs, 0, sizeof(*regs));
 160 #endif
 161         return (0);
 162 }
 163
 164 int
 165 set_fpregs(struct thread *td, struct fpreg *regs)
 166 {
 167 #ifdef VFP
 168         struct pcb *pcb;
 169
 170         pcb = td->td_pcb;
 171         KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
 172             ("Called set_fpregs while the kernel is using the VFP"));
 173         memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
 174         pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
 175         pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
 176 #endif
 177         return (0);
 178 }
 179
 180 int
 181 fill_dbregs(struct thread *td, struct dbreg *regs)
 182 {
 183         struct debug_monitor_state *monitor;
 184         int i;
 185         uint8_t debug_ver, nbkpts, nwtpts;
 186
 187         memset(regs, 0, sizeof(*regs));
 188
 189         extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
 190             &debug_ver);
 191         extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
 192             &nbkpts);
 193         extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
 194             &nwtpts);
 195
 196         /*
 197          * The BRPs field contains the number of breakpoints - 1. Armv8-A
 198          * allows the hardware to provide 2-16 breakpoints so this won't
 199          * overflow an 8 bit value. The same applies to the WRPs field.
 200          */
 201         nbkpts++;
 202         nwtpts++;
 203
 204         regs->db_debug_ver = debug_ver;
 205         regs->db_nbkpts = nbkpts;
 206         regs->db_nwtpts = nwtpts;
 207
 208         monitor = &td->td_pcb->pcb_dbg_regs;
 209         if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
 210                 for (i = 0; i < nbkpts; i++) {
 211                         regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
 212                         regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
 213                 }
 214                 for (i = 0; i < nwtpts; i++) {
 215                         regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
 216                         regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
 217                 }
 218         }
 219
 220         return (0);
 221 }
 222
 223 int
 224 set_dbregs(struct thread *td, struct dbreg *regs)
 225 {
 226         struct debug_monitor_state *monitor;
 227         uint64_t addr;
 228         uint32_t ctrl;
 229         int count;
 230         int i;
 231
 232         monitor = &td->td_pcb->pcb_dbg_regs;
 233         count = 0;
 234         monitor->dbg_enable_count = 0;
 235
 236         for (i = 0; i < DBG_BRP_MAX; i++) {
 237                 addr = regs->db_breakregs[i].dbr_addr;
 238                 ctrl = regs->db_breakregs[i].dbr_ctrl;
 239
 240                 /*
 241                  * Don't let the user set a breakpoint on a kernel or
 242                  * non-canonical user address.
 243                  */
 244                 if (addr >= VM_MAXUSER_ADDRESS)
 245                         return (EINVAL);
 246
 247                 /*
 248                  * The lowest 2 bits are ignored, so record the effective
 249                  * address.
 250                  */
 251                 addr = rounddown2(addr, 4);
 252
 253                 /*
 254                  * Some control fields are ignored, and other bits reserved.
 255                  * Only unlinked, address-matching breakpoints are supported.
 256                  *
 257                  * XXX: fields that appear unvalidated, such as BAS, have
 258                  * constrained undefined behaviour. If the user mis-programs
 259                  * these, there is no risk to the system.
 260                  */
 261                 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
 262                 if ((ctrl & DBGBCR_EN) != 0) {
 263                         /* Only target EL0. */
 264                         if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
 265                                 return (EINVAL);
 266
 267                         monitor->dbg_enable_count++;
 268                 }
 269
 270                 monitor->dbg_bvr[i] = addr;
 271                 monitor->dbg_bcr[i] = ctrl;
 272         }
 273
 274         for (i = 0; i < DBG_WRP_MAX; i++) {
 275                 addr = regs->db_watchregs[i].dbw_addr;
 276                 ctrl = regs->db_watchregs[i].dbw_ctrl;
 277
 278                 /*
 279                  * Don't let the user set a watchpoint on a kernel or
 280                  * non-canonical user address.
 281                  */
 282                 if (addr >= VM_MAXUSER_ADDRESS)
 283                         return (EINVAL);
 284
 285                 /*
 286                  * Some control fields are ignored, and other bits reserved.
 287                  * Only unlinked watchpoints are supported.
 288                  */
 289                 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
 290                     DBGWCR_MASK;
 291
 292                 if ((ctrl & DBGWCR_EN) != 0) {
 293                         /* Only target EL0. */
 294                         if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
 295                                 return (EINVAL);
 296
 297                         /* Must set at least one of the load/store bits. */
 298                         if ((ctrl & DBGWCR_LSC) == 0)
 299                                 return (EINVAL);
 300
 301                         /*
 302                          * When specifying the address range with BAS, the MASK
 303                          * field must be zero.
 304                          */
 305                         if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
 306                             (ctrl & DBGWCR_MASK) != 0)
 307                                 return (EINVAL);
 308
 309                         monitor->dbg_enable_count++;
 310                 }
 311                 monitor->dbg_wvr[i] = addr;
 312                 monitor->dbg_wcr[i] = ctrl;
 313         }
 314
 315         if (monitor->dbg_enable_count > 0)
 316                 monitor->dbg_flags |= DBGMON_ENABLED;
 317
 318         return (0);
 319 }
 320
 321 #ifdef COMPAT_FREEBSD32
 322 int
 323 fill_regs32(struct thread *td, struct reg32 *regs)
 324 {
 325         int i;
 326         struct trapframe *tf;
 327
 328         tf = td->td_frame;
 329         for (i = 0; i < 13; i++)
 330                 regs->r[i] = tf->tf_x[i];
 331         /* For arm32, SP is r13 and LR is r14 */
 332         regs->r_sp = tf->tf_x[13];
 333         regs->r_lr = tf->tf_x[14];
 334         regs->r_pc = tf->tf_elr;
 335         regs->r_cpsr = tf->tf_spsr;
 336
 337         return (0);
 338 }
 339
 340 int
 341 set_regs32(struct thread *td, struct reg32 *regs)
 342 {
 343         int i;
 344         struct trapframe *tf;
 345
 346         tf = td->td_frame;
 347         for (i = 0; i < 13; i++)
 348                 tf->tf_x[i] = regs->r[i];
 349         /* For arm 32, SP is r13 an LR is r14 */
 350         tf->tf_x[13] = regs->r_sp;
 351         tf->tf_x[14] = regs->r_lr;
 352         tf->tf_elr = regs->r_pc;
 353         tf->tf_spsr &= ~PSR_SETTABLE_32;
 354         tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
 355
 356         return (0);
 357 }
 358
 359 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
 360 int
 361 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
 362 {
 363
 364         memset(regs, 0, sizeof(*regs));
 365         return (0);
 366 }
 367
 368 int
 369 set_fpregs32(struct thread *td, struct fpreg32 *regs)
 370 {
 371
 372         return (0);
 373 }
 374
 375 int
 376 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
 377 {
 378
 379         memset(regs, 0, sizeof(*regs));
 380         return (0);
 381 }
 382
 383 int
 384 set_dbregs32(struct thread *td, struct dbreg32 *regs)
 385 {
 386
 387         return (0);
 388 }
 389 #endif
 390
 391 void
 392 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
 393 {
 394         struct trapframe *tf = td->td_frame;
 395         struct pcb *pcb = td->td_pcb;
 396
 397         memset(tf, 0, sizeof(struct trapframe));
 398
 399         tf->tf_x[0] = stack;
 400         tf->tf_sp = STACKALIGN(stack);
 401         tf->tf_lr = imgp->entry_addr;
 402         tf->tf_elr = imgp->entry_addr;
 403
 404         td->td_pcb->pcb_tpidr_el0 = 0;
 405         td->td_pcb->pcb_tpidrro_el0 = 0;
 406         WRITE_SPECIALREG(tpidrro_el0, 0);
 407         WRITE_SPECIALREG(tpidr_el0, 0);
 408
 409 #ifdef VFP
 410         vfp_reset_state(td, pcb);
 411 #endif
 412
 413         /*
 414          * Clear debug register state. It is not applicable to the new process.
 415          */
 416         bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
 417 }
 418
 419 /* Sanity check these are the same size, they will be memcpy'd to and from */
 420 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
 421     sizeof((struct gpregs *)0)->gp_x);
 422 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
 423     sizeof((struct reg *)0)->x);
 424
 425 int
 426 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
 427 {
 428         struct trapframe *tf = td->td_frame;
 429
 430         if (clear_ret & GET_MC_CLEAR_RET) {
 431                 mcp->mc_gpregs.gp_x[0] = 0;
 432                 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
 433         } else {
 434                 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
 435                 mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
 436         }
 437
 438         memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
 439             sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
 440
 441         mcp->mc_gpregs.gp_sp = tf->tf_sp;
 442         mcp->mc_gpregs.gp_lr = tf->tf_lr;
 443         mcp->mc_gpregs.gp_elr = tf->tf_elr;
 444         get_fpcontext(td, mcp);
 445
 446         return (0);
 447 }
 448
 449 int
 450 set_mcontext(struct thread *td, mcontext_t *mcp)
 451 {
 452         struct trapframe *tf = td->td_frame;
 453         uint32_t spsr;
 454
 455         spsr = mcp->mc_gpregs.gp_spsr;
 456         if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
 457             (spsr & PSR_AARCH32) != 0 ||
 458             (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
 459                 return (EINVAL);
 460
 461         memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
 462
 463         tf->tf_sp = mcp->mc_gpregs.gp_sp;
 464         tf->tf_lr = mcp->mc_gpregs.gp_lr;
 465         tf->tf_elr = mcp->mc_gpregs.gp_elr;
 466         tf->tf_spsr = mcp->mc_gpregs.gp_spsr;
 467         if ((tf->tf_spsr & PSR_SS) != 0) {
 468                 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
 469
 470                 WRITE_SPECIALREG(mdscr_el1,
 471                     READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
 472                 isb();
 473         }
 474         set_fpcontext(td, mcp);
 475
 476         return (0);
 477 }
 478
 479 static void
 480 get_fpcontext(struct thread *td, mcontext_t *mcp)
 481 {
 482 #ifdef VFP
 483         struct pcb *curpcb;
 484
 485         MPASS(td == curthread);
 486
 487         curpcb = curthread->td_pcb;
 488         if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
 489                 /*
 490                  * If we have just been running VFP instructions we will
 491                  * need to save the state to memcpy it below.
 492                  */
 493                 vfp_save_state(td, curpcb);
 494         }
 495
 496         KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
 497             ("Called get_fpcontext while the kernel is using the VFP"));
 498         KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
 499             ("Non-userspace FPU flags set in get_fpcontext"));
 500         memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
 501             sizeof(mcp->mc_fpregs.fp_q));
 502         mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
 503         mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
 504         mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
 505         mcp->mc_flags |= _MC_FP_VALID;
 506 #endif
 507 }
 508
 509 static void
 510 set_fpcontext(struct thread *td, mcontext_t *mcp)
 511 {
 512 #ifdef VFP
 513         struct pcb *curpcb;
 514
 515         MPASS(td == curthread);
 516         if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
 517                 curpcb = curthread->td_pcb;
 518
 519                 /*
 520                  * Discard any vfp state for the current thread, we
 521                  * are about to override it.
 522                  */
 523                 critical_enter();
 524                 vfp_discard(td);
 525                 critical_exit();
 526
 527                 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
 528                     ("Called set_fpcontext while the kernel is using the VFP"));
 529                 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
 530                     sizeof(mcp->mc_fpregs.fp_q));
 531                 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
 532                 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
 533                 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK;
 534         }
 535 #endif
 536 }
 537
 538 int
 539 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
 540 {
 541         ucontext_t uc;
 542         int error;
 543
 544         if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
 545                 return (EFAULT);
 546
 547         error = set_mcontext(td, &uc.uc_mcontext);
 548         if (error != 0)
 549                 return (error);
 550
 551         /* Restore signal mask. */
 552         kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
 553
 554         return (EJUSTRETURN);
 555 }
 556
 557 void
 558 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
 559 {
 560         struct thread *td;
 561         struct proc *p;
 562         struct trapframe *tf;
 563         struct sigframe *fp, frame;
 564         struct sigacts *psp;
 565         int onstack, sig;
 566
 567         td = curthread;
 568         p = td->td_proc;
 569         PROC_LOCK_ASSERT(p, MA_OWNED);
 570
 571         sig = ksi->ksi_signo;
 572         psp = p->p_sigacts;
 573         mtx_assert(&psp->ps_mtx, MA_OWNED);
 574
 575         tf = td->td_frame;
 576         onstack = sigonstack(tf->tf_sp);
 577
 578         CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
 579             catcher, sig);
 580
 581         /* Allocate and validate space for the signal handler context. */
 582         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
 583             SIGISMEMBER(psp->ps_sigonstack, sig)) {
 584                 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
 585                     td->td_sigstk.ss_size);
 586 #if defined(COMPAT_43)
 587                 td->td_sigstk.ss_flags |= SS_ONSTACK;
 588 #endif
 589         } else {
 590                 fp = (struct sigframe *)td->td_frame->tf_sp;
 591         }
 592
 593         /* Make room, keeping the stack aligned */
 594         fp--;
 595         fp = (struct sigframe *)STACKALIGN(fp);
 596
 597         /* Fill in the frame to copy out */
 598         bzero(&frame, sizeof(frame));
 599         get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
 600         frame.sf_si = ksi->ksi_info;
 601         frame.sf_uc.uc_sigmask = *mask;
 602         frame.sf_uc.uc_stack = td->td_sigstk;
 603         frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
 604             (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
 605         mtx_unlock(&psp->ps_mtx);
 606         PROC_UNLOCK(td->td_proc);
 607
 608         /* Copy the sigframe out to the user's stack. */
 609         if (copyout(&frame, fp, sizeof(*fp)) != 0) {
 610                 /* Process has trashed its stack. Kill it. */
 611                 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
 612                 PROC_LOCK(p);
 613                 sigexit(td, SIGILL);
 614         }
 615
 616         tf->tf_x[0] = sig;
 617         tf->tf_x[1] = (register_t)&fp->sf_si;
 618         tf->tf_x[2] = (register_t)&fp->sf_uc;
 619
 620         tf->tf_elr = (register_t)catcher;
 621         tf->tf_sp = (register_t)fp;
 622         tf->tf_lr = (register_t)p->p_sysent->sv_sigcode_base;
 623
 624         /* Clear the single step flag while in the signal handler */
 625         if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
 626                 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
 627                 WRITE_SPECIALREG(mdscr_el1,
 628                     READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
 629                 isb();
 630         }
 631
 632         CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
 633             tf->tf_sp);
 634
 635         PROC_LOCK(p);
 636         mtx_lock(&psp->ps_mtx);
 637 }