sys/arm64/arm64/exec_machdep.c

   1 /*-
   2  * Copyright (c) 2014 Andrew Turner
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  */
  27
  28 #include <sys/cdefs.h>
  29 #include <sys/param.h>
  30 #include <sys/systm.h>
  31 #include <sys/exec.h>
  32 #include <sys/imgact.h>
  33 #include <sys/kdb.h>
  34 #include <sys/kernel.h>
  35 #include <sys/ktr.h>
  36 #include <sys/limits.h>
  37 #include <sys/lock.h>
  38 #include <sys/mutex.h>
  39 #include <sys/proc.h>
  40 #include <sys/ptrace.h>
  41 #include <sys/reg.h>
  42 #include <sys/rwlock.h>
  43 #include <sys/signalvar.h>
  44 #include <sys/syscallsubr.h>
  45 #include <sys/sysent.h>
  46 #include <sys/sysproto.h>
  47 #include <sys/ucontext.h>
  48
  49 #include <vm/vm.h>
  50 #include <vm/vm_param.h>
  51 #include <vm/pmap.h>
  52 #include <vm/vm_map.h>
  53
  54 #include <machine/armreg.h>
  55 #include <machine/kdb.h>
  56 #include <machine/md_var.h>
  57 #include <machine/pcb.h>
  58
  59 #ifdef VFP
  60 #include <machine/vfp.h>
  61 #endif
  62
  63 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
  64 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
  65 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
  66
  67 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
  68 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
  69
  70 int
  71 fill_regs(struct thread *td, struct reg *regs)
  72 {
  73         struct trapframe *frame;
  74
  75         frame = td->td_frame;
  76         regs->sp = frame->tf_sp;
  77         regs->lr = frame->tf_lr;
  78         regs->elr = frame->tf_elr;
  79         regs->spsr = frame->tf_spsr;
  80
  81         memcpy(regs->x, frame->tf_x, sizeof(regs->x));
  82
  83 #ifdef COMPAT_FREEBSD32
  84         /*
  85          * We may be called here for a 32bits process, if we're using a
  86          * 64bits debugger. If so, put PC and SPSR where it expects it.
  87          */
  88         if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
  89                 regs->x[15] = frame->tf_elr;
  90                 regs->x[16] = frame->tf_spsr;
  91         }
  92 #endif
  93         return (0);
  94 }
  95
  96 int
  97 set_regs(struct thread *td, struct reg *regs)
  98 {
  99         struct trapframe *frame;
 100
 101         frame = td->td_frame;
 102         frame->tf_sp = regs->sp;
 103         frame->tf_lr = regs->lr;
 104
 105         memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
 106
 107 #ifdef COMPAT_FREEBSD32
 108         if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
 109                 /*
 110                  * We may be called for a 32bits process if we're using
 111                  * a 64bits debugger. If so, get PC and SPSR from where
 112                  * it put it.
 113                  */
 114                 frame->tf_elr = regs->x[15];
 115                 frame->tf_spsr &= ~PSR_SETTABLE_32;
 116                 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
 117                 /* Don't allow userspace to ask to continue single stepping.
 118                  * The SPSR.SS field doesn't exist when the EL1 is AArch32.
 119                  * As the SPSR.DIT field has moved in its place don't
 120                  * allow userspace to set the SPSR.SS field.
 121                  */
 122         } else
 123 #endif
 124         {
 125                 frame->tf_elr = regs->elr;
 126                 /*
 127                  * frame->tf_spsr and regs->spsr on FreeBSD 13 was 32-bit
 128                  * where from 14 they are 64 bit. As PSR_SETTABLE_64 clears
 129                  * the upper 32 bits no compatibility handling is needed,
 130                  * however if this is ever not the case we will need to add
 131                  * these, similar to how it is done in set_mcontext.
 132                  */
 133                 frame->tf_spsr &= ~PSR_SETTABLE_64;
 134                 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
 135                 /* Enable single stepping if userspace asked fot it */
 136                 if ((frame->tf_spsr & PSR_SS) != 0) {
 137                         td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
 138
 139                         WRITE_SPECIALREG(mdscr_el1,
 140                             READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
 141                         isb();
 142                 }
 143         }
 144         return (0);
 145 }
 146
 147 int
 148 fill_fpregs(struct thread *td, struct fpreg *regs)
 149 {
 150 #ifdef VFP
 151         struct pcb *pcb;
 152
 153         pcb = td->td_pcb;
 154         if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
 155                 /*
 156                  * If we have just been running VFP instructions we will
 157                  * need to save the state to memcpy it below.
 158                  */
 159                 if (td == curthread)
 160                         vfp_save_state(td, pcb);
 161         }
 162
 163         KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
 164             ("Called fill_fpregs while the kernel is using the VFP"));
 165         memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
 166             sizeof(regs->fp_q));
 167         regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
 168         regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
 169 #else
 170         memset(regs, 0, sizeof(*regs));
 171 #endif
 172         return (0);
 173 }
 174
 175 int
 176 set_fpregs(struct thread *td, struct fpreg *regs)
 177 {
 178 #ifdef VFP
 179         struct pcb *pcb;
 180
 181         pcb = td->td_pcb;
 182         KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
 183             ("Called set_fpregs while the kernel is using the VFP"));
 184         memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
 185         pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
 186         pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
 187 #endif
 188         return (0);
 189 }
 190
 191 int
 192 fill_dbregs(struct thread *td, struct dbreg *regs)
 193 {
 194         struct debug_monitor_state *monitor;
 195         int i;
 196         uint8_t debug_ver, nbkpts, nwtpts;
 197
 198         memset(regs, 0, sizeof(*regs));
 199
 200         extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
 201             &debug_ver);
 202         extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
 203             &nbkpts);
 204         extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
 205             &nwtpts);
 206
 207         /*
 208          * The BRPs field contains the number of breakpoints - 1. Armv8-A
 209          * allows the hardware to provide 2-16 breakpoints so this won't
 210          * overflow an 8 bit value. The same applies to the WRPs field.
 211          */
 212         nbkpts++;
 213         nwtpts++;
 214
 215         regs->db_debug_ver = debug_ver;
 216         regs->db_nbkpts = nbkpts;
 217         regs->db_nwtpts = nwtpts;
 218
 219         monitor = &td->td_pcb->pcb_dbg_regs;
 220         if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
 221                 for (i = 0; i < nbkpts; i++) {
 222                         regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
 223                         regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
 224                 }
 225                 for (i = 0; i < nwtpts; i++) {
 226                         regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
 227                         regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
 228                 }
 229         }
 230
 231         return (0);
 232 }
 233
 234 int
 235 set_dbregs(struct thread *td, struct dbreg *regs)
 236 {
 237         struct debug_monitor_state *monitor;
 238         uint64_t addr;
 239         uint32_t ctrl;
 240         int i;
 241
 242         monitor = &td->td_pcb->pcb_dbg_regs;
 243         monitor->dbg_enable_count = 0;
 244
 245         for (i = 0; i < DBG_BRP_MAX; i++) {
 246                 addr = regs->db_breakregs[i].dbr_addr;
 247                 ctrl = regs->db_breakregs[i].dbr_ctrl;
 248
 249                 /*
 250                  * Don't let the user set a breakpoint on a kernel or
 251                  * non-canonical user address.
 252                  */
 253                 if (addr >= VM_MAXUSER_ADDRESS)
 254                         return (EINVAL);
 255
 256                 /*
 257                  * The lowest 2 bits are ignored, so record the effective
 258                  * address.
 259                  */
 260                 addr = rounddown2(addr, 4);
 261
 262                 /*
 263                  * Some control fields are ignored, and other bits reserved.
 264                  * Only unlinked, address-matching breakpoints are supported.
 265                  *
 266                  * XXX: fields that appear unvalidated, such as BAS, have
 267                  * constrained undefined behaviour. If the user mis-programs
 268                  * these, there is no risk to the system.
 269                  */
 270                 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
 271                 if ((ctrl & DBGBCR_EN) != 0) {
 272                         /* Only target EL0. */
 273                         if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
 274                                 return (EINVAL);
 275
 276                         monitor->dbg_enable_count++;
 277                 }
 278
 279                 monitor->dbg_bvr[i] = addr;
 280                 monitor->dbg_bcr[i] = ctrl;
 281         }
 282
 283         for (i = 0; i < DBG_WRP_MAX; i++) {
 284                 addr = regs->db_watchregs[i].dbw_addr;
 285                 ctrl = regs->db_watchregs[i].dbw_ctrl;
 286
 287                 /*
 288                  * Don't let the user set a watchpoint on a kernel or
 289                  * non-canonical user address.
 290                  */
 291                 if (addr >= VM_MAXUSER_ADDRESS)
 292                         return (EINVAL);
 293
 294                 /*
 295                  * Some control fields are ignored, and other bits reserved.
 296                  * Only unlinked watchpoints are supported.
 297                  */
 298                 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
 299                     DBGWCR_MASK;
 300
 301                 if ((ctrl & DBGWCR_EN) != 0) {
 302                         /* Only target EL0. */
 303                         if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
 304                                 return (EINVAL);
 305
 306                         /* Must set at least one of the load/store bits. */
 307                         if ((ctrl & DBGWCR_LSC) == 0)
 308                                 return (EINVAL);
 309
 310                         /*
 311                          * When specifying the address range with BAS, the MASK
 312                          * field must be zero.
 313                          */
 314                         if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
 315                             (ctrl & DBGWCR_MASK) != 0)
 316                                 return (EINVAL);
 317
 318                         monitor->dbg_enable_count++;
 319                 }
 320                 monitor->dbg_wvr[i] = addr;
 321                 monitor->dbg_wcr[i] = ctrl;
 322         }
 323
 324         if (monitor->dbg_enable_count > 0)
 325                 monitor->dbg_flags |= DBGMON_ENABLED;
 326
 327         return (0);
 328 }
 329
 330 #ifdef COMPAT_FREEBSD32
 331 int
 332 fill_regs32(struct thread *td, struct reg32 *regs)
 333 {
 334         int i;
 335         struct trapframe *tf;
 336
 337         tf = td->td_frame;
 338         for (i = 0; i < 13; i++)
 339                 regs->r[i] = tf->tf_x[i];
 340         /* For arm32, SP is r13 and LR is r14 */
 341         regs->r_sp = tf->tf_x[13];
 342         regs->r_lr = tf->tf_x[14];
 343         regs->r_pc = tf->tf_elr;
 344         regs->r_cpsr = tf->tf_spsr;
 345
 346         return (0);
 347 }
 348
 349 int
 350 set_regs32(struct thread *td, struct reg32 *regs)
 351 {
 352         int i;
 353         struct trapframe *tf;
 354
 355         tf = td->td_frame;
 356         for (i = 0; i < 13; i++)
 357                 tf->tf_x[i] = regs->r[i];
 358         /* For arm 32, SP is r13 an LR is r14 */
 359         tf->tf_x[13] = regs->r_sp;
 360         tf->tf_x[14] = regs->r_lr;
 361         tf->tf_elr = regs->r_pc;
 362         tf->tf_spsr &= ~PSR_SETTABLE_32;
 363         tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
 364
 365         return (0);
 366 }
 367
 368 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
 369 int
 370 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
 371 {
 372
 373         memset(regs, 0, sizeof(*regs));
 374         return (0);
 375 }
 376
 377 int
 378 set_fpregs32(struct thread *td, struct fpreg32 *regs)
 379 {
 380
 381         return (0);
 382 }
 383
 384 int
 385 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
 386 {
 387
 388         memset(regs, 0, sizeof(*regs));
 389         return (0);
 390 }
 391
 392 int
 393 set_dbregs32(struct thread *td, struct dbreg32 *regs)
 394 {
 395
 396         return (0);
 397 }
 398 #endif
 399
 400 void
 401 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
 402 {
 403         struct trapframe *tf = td->td_frame;
 404         struct pcb *pcb = td->td_pcb;
 405
 406         memset(tf, 0, sizeof(struct trapframe));
 407
 408         tf->tf_x[0] = stack;
 409         tf->tf_sp = STACKALIGN(stack);
 410         tf->tf_lr = imgp->entry_addr;
 411         tf->tf_elr = imgp->entry_addr;
 412
 413         td->td_pcb->pcb_tpidr_el0 = 0;
 414         td->td_pcb->pcb_tpidrro_el0 = 0;
 415         WRITE_SPECIALREG(tpidrro_el0, 0);
 416         WRITE_SPECIALREG(tpidr_el0, 0);
 417
 418 #ifdef VFP
 419         vfp_reset_state(td, pcb);
 420 #endif
 421
 422         /*
 423          * Clear debug register state. It is not applicable to the new process.
 424          */
 425         bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
 426
 427         /* Generate new pointer authentication keys */
 428         ptrauth_exec(td);
 429 }
 430
 431 /* Sanity check these are the same size, they will be memcpy'd to and from */
 432 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
 433     sizeof((struct gpregs *)0)->gp_x);
 434 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
 435     sizeof((struct reg *)0)->x);
 436
 437 int
 438 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
 439 {
 440         struct trapframe *tf = td->td_frame;
 441
 442         if (clear_ret & GET_MC_CLEAR_RET) {
 443                 mcp->mc_gpregs.gp_x[0] = 0;
 444                 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
 445         } else {
 446                 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
 447                 mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
 448         }
 449
 450         memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
 451             sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
 452
 453         mcp->mc_gpregs.gp_sp = tf->tf_sp;
 454         mcp->mc_gpregs.gp_lr = tf->tf_lr;
 455         mcp->mc_gpregs.gp_elr = tf->tf_elr;
 456         get_fpcontext(td, mcp);
 457
 458         return (0);
 459 }
 460
 461 int
 462 set_mcontext(struct thread *td, mcontext_t *mcp)
 463 {
 464 #define PSR_13_MASK     0xfffffffful
 465         struct trapframe *tf = td->td_frame;
 466         uint64_t spsr;
 467
 468         spsr = mcp->mc_gpregs.gp_spsr;
 469 #ifdef COMPAT_FREEBSD13
 470         if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
 471                 /*
 472                  * Before FreeBSD 14 gp_spsr was 32 bit. The size of mc_gpregs
 473                  * was identical because of padding so mask of the upper bits
 474                  * that may be invalid on earlier releases.
 475                  */
 476                 spsr &= PSR_13_MASK;
 477         }
 478 #endif
 479
 480         if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
 481             (spsr & PSR_AARCH32) != 0 ||
 482             (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
 483                 return (EINVAL);
 484
 485         memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
 486
 487         tf->tf_sp = mcp->mc_gpregs.gp_sp;
 488         tf->tf_lr = mcp->mc_gpregs.gp_lr;
 489         tf->tf_elr = mcp->mc_gpregs.gp_elr;
 490 #ifdef COMPAT_FREEBSD13
 491         if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
 492                 /* Keep the upper 32 bits of spsr on older releases */
 493                 tf->tf_spsr &= ~PSR_13_MASK;
 494                 tf->tf_spsr |= spsr;
 495         } else
 496 #endif
 497                 tf->tf_spsr = spsr;
 498         if ((tf->tf_spsr & PSR_SS) != 0) {
 499                 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
 500
 501                 WRITE_SPECIALREG(mdscr_el1,
 502                     READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
 503                 isb();
 504         }
 505         set_fpcontext(td, mcp);
 506
 507         return (0);
 508 #undef PSR_13_MASK
 509 }
 510
 511 static void
 512 get_fpcontext(struct thread *td, mcontext_t *mcp)
 513 {
 514 #ifdef VFP
 515         struct pcb *curpcb;
 516
 517         MPASS(td == curthread);
 518
 519         curpcb = curthread->td_pcb;
 520         if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
 521                 /*
 522                  * If we have just been running VFP instructions we will
 523                  * need to save the state to memcpy it below.
 524                  */
 525                 vfp_save_state(td, curpcb);
 526         }
 527
 528         KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
 529             ("Called get_fpcontext while the kernel is using the VFP"));
 530         KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
 531             ("Non-userspace FPU flags set in get_fpcontext"));
 532         memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
 533             sizeof(mcp->mc_fpregs.fp_q));
 534         mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
 535         mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
 536         mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
 537         mcp->mc_flags |= _MC_FP_VALID;
 538 #endif
 539 }
 540
 541 static void
 542 set_fpcontext(struct thread *td, mcontext_t *mcp)
 543 {
 544 #ifdef VFP
 545         struct pcb *curpcb;
 546
 547         MPASS(td == curthread);
 548         if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
 549                 curpcb = curthread->td_pcb;
 550
 551                 /*
 552                  * Discard any vfp state for the current thread, we
 553                  * are about to override it.
 554                  */
 555                 critical_enter();
 556                 vfp_discard(td);
 557                 critical_exit();
 558
 559                 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
 560                     ("Called set_fpcontext while the kernel is using the VFP"));
 561                 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
 562                     sizeof(mcp->mc_fpregs.fp_q));
 563                 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
 564                 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
 565                 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK;
 566         }
 567 #endif
 568 }
 569
 570 int
 571 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
 572 {
 573         ucontext_t uc;
 574         int error;
 575
 576         if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
 577                 return (EFAULT);
 578
 579         error = set_mcontext(td, &uc.uc_mcontext);
 580         if (error != 0)
 581                 return (error);
 582
 583         /* Restore signal mask. */
 584         kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
 585
 586         return (EJUSTRETURN);
 587 }
 588
 589 void
 590 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
 591 {
 592         struct thread *td;
 593         struct proc *p;
 594         struct trapframe *tf;
 595         struct sigframe *fp, frame;
 596         struct sigacts *psp;
 597         int onstack, sig;
 598
 599         td = curthread;
 600         p = td->td_proc;
 601         PROC_LOCK_ASSERT(p, MA_OWNED);
 602
 603         sig = ksi->ksi_signo;
 604         psp = p->p_sigacts;
 605         mtx_assert(&psp->ps_mtx, MA_OWNED);
 606
 607         tf = td->td_frame;
 608         onstack = sigonstack(tf->tf_sp);
 609
 610         CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
 611             catcher, sig);
 612
 613         /* Allocate and validate space for the signal handler context. */
 614         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
 615             SIGISMEMBER(psp->ps_sigonstack, sig)) {
 616                 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
 617                     td->td_sigstk.ss_size);
 618 #if defined(COMPAT_43)
 619                 td->td_sigstk.ss_flags |= SS_ONSTACK;
 620 #endif
 621         } else {
 622                 fp = (struct sigframe *)td->td_frame->tf_sp;
 623         }
 624
 625         /* Make room, keeping the stack aligned */
 626         fp--;
 627         fp = (struct sigframe *)STACKALIGN(fp);
 628
 629         /* Fill in the frame to copy out */
 630         bzero(&frame, sizeof(frame));
 631         get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
 632         frame.sf_si = ksi->ksi_info;
 633         frame.sf_uc.uc_sigmask = *mask;
 634         frame.sf_uc.uc_stack = td->td_sigstk;
 635         frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
 636             (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
 637         mtx_unlock(&psp->ps_mtx);
 638         PROC_UNLOCK(td->td_proc);
 639
 640         /* Copy the sigframe out to the user's stack. */
 641         if (copyout(&frame, fp, sizeof(*fp)) != 0) {
 642                 /* Process has trashed its stack. Kill it. */
 643                 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
 644                 PROC_LOCK(p);
 645                 sigexit(td, SIGILL);
 646         }
 647
 648         tf->tf_x[0] = sig;
 649         tf->tf_x[1] = (register_t)&fp->sf_si;
 650         tf->tf_x[2] = (register_t)&fp->sf_uc;
 651         tf->tf_x[8] = (register_t)catcher;
 652         tf->tf_sp = (register_t)fp;
 653         tf->tf_elr = (register_t)PROC_SIGCODE(p);
 654
 655         /* Clear the single step flag while in the signal handler */
 656         if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
 657                 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
 658                 WRITE_SPECIALREG(mdscr_el1,
 659                     READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
 660                 isb();
 661         }
 662
 663         CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
 664             tf->tf_sp);
 665
 666         PROC_LOCK(p);
 667         mtx_lock(&psp->ps_mtx);
 668 }