2 * Copyright (c) 2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/imgact.h>
36 #include <sys/kernel.h>
38 #include <sys/limits.h>
40 #include <sys/mutex.h>
42 #include <sys/ptrace.h>
44 #include <sys/rwlock.h>
45 #include <sys/signalvar.h>
46 #include <sys/syscallsubr.h>
47 #include <sys/sysent.h>
48 #include <sys/sysproto.h>
49 #include <sys/ucontext.h>
52 #include <vm/vm_param.h>
54 #include <vm/vm_map.h>
56 #include <machine/armreg.h>
57 #include <machine/kdb.h>
58 #include <machine/md_var.h>
59 #include <machine/pcb.h>
62 #include <machine/vfp.h>
65 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
66 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
67 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
69 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
70 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
73 fill_regs(struct thread *td, struct reg *regs)
75 struct trapframe *frame;
78 regs->sp = frame->tf_sp;
79 regs->lr = frame->tf_lr;
80 regs->elr = frame->tf_elr;
81 regs->spsr = frame->tf_spsr;
83 memcpy(regs->x, frame->tf_x, sizeof(regs->x));
85 #ifdef COMPAT_FREEBSD32
87 * We may be called here for a 32bits process, if we're using a
88 * 64bits debugger. If so, put PC and SPSR where it expects it.
90 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
91 regs->x[15] = frame->tf_elr;
92 regs->x[16] = frame->tf_spsr;
99 set_regs(struct thread *td, struct reg *regs)
101 struct trapframe *frame;
103 frame = td->td_frame;
104 frame->tf_sp = regs->sp;
105 frame->tf_lr = regs->lr;
107 memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
109 #ifdef COMPAT_FREEBSD32
110 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
112 * We may be called for a 32bits process if we're using
113 * a 64bits debugger. If so, get PC and SPSR from where
116 frame->tf_elr = regs->x[15];
117 frame->tf_spsr &= ~PSR_SETTABLE_32;
118 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
119 /* Don't allow userspace to ask to continue single stepping.
120 * The SPSR.SS field doesn't exist when the EL1 is AArch32.
121 * As the SPSR.DIT field has moved in its place don't
122 * allow userspace to set the SPSR.SS field.
127 frame->tf_elr = regs->elr;
128 frame->tf_spsr &= ~PSR_SETTABLE_64;
129 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
130 /* Enable single stepping if userspace asked fot it */
131 if ((frame->tf_spsr & PSR_SS) != 0) {
132 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
134 WRITE_SPECIALREG(mdscr_el1,
135 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
143 fill_fpregs(struct thread *td, struct fpreg *regs)
149 if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
151 * If we have just been running VFP instructions we will
152 * need to save the state to memcpy it below.
155 vfp_save_state(td, pcb);
157 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
158 ("Called fill_fpregs while the kernel is using the VFP"));
159 memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
161 regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
162 regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
165 memset(regs, 0, sizeof(*regs));
170 set_fpregs(struct thread *td, struct fpreg *regs)
176 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
177 ("Called set_fpregs while the kernel is using the VFP"));
178 memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
179 pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
180 pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
186 fill_dbregs(struct thread *td, struct dbreg *regs)
188 struct debug_monitor_state *monitor;
190 uint8_t debug_ver, nbkpts, nwtpts;
192 memset(regs, 0, sizeof(*regs));
194 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
196 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
198 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
202 * The BRPs field contains the number of breakpoints - 1. Armv8-A
203 * allows the hardware to provide 2-16 breakpoints so this won't
204 * overflow an 8 bit value. The same applies to the WRPs field.
209 regs->db_debug_ver = debug_ver;
210 regs->db_nbkpts = nbkpts;
211 regs->db_nwtpts = nwtpts;
213 monitor = &td->td_pcb->pcb_dbg_regs;
214 if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
215 for (i = 0; i < nbkpts; i++) {
216 regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
217 regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
219 for (i = 0; i < nwtpts; i++) {
220 regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
221 regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
229 set_dbregs(struct thread *td, struct dbreg *regs)
231 struct debug_monitor_state *monitor;
236 monitor = &td->td_pcb->pcb_dbg_regs;
237 monitor->dbg_enable_count = 0;
239 for (i = 0; i < DBG_BRP_MAX; i++) {
240 addr = regs->db_breakregs[i].dbr_addr;
241 ctrl = regs->db_breakregs[i].dbr_ctrl;
244 * Don't let the user set a breakpoint on a kernel or
245 * non-canonical user address.
247 if (addr >= VM_MAXUSER_ADDRESS)
251 * The lowest 2 bits are ignored, so record the effective
254 addr = rounddown2(addr, 4);
257 * Some control fields are ignored, and other bits reserved.
258 * Only unlinked, address-matching breakpoints are supported.
260 * XXX: fields that appear unvalidated, such as BAS, have
261 * constrained undefined behaviour. If the user mis-programs
262 * these, there is no risk to the system.
264 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
265 if ((ctrl & DBGBCR_EN) != 0) {
266 /* Only target EL0. */
267 if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
270 monitor->dbg_enable_count++;
273 monitor->dbg_bvr[i] = addr;
274 monitor->dbg_bcr[i] = ctrl;
277 for (i = 0; i < DBG_WRP_MAX; i++) {
278 addr = regs->db_watchregs[i].dbw_addr;
279 ctrl = regs->db_watchregs[i].dbw_ctrl;
282 * Don't let the user set a watchpoint on a kernel or
283 * non-canonical user address.
285 if (addr >= VM_MAXUSER_ADDRESS)
289 * Some control fields are ignored, and other bits reserved.
290 * Only unlinked watchpoints are supported.
292 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
295 if ((ctrl & DBGWCR_EN) != 0) {
296 /* Only target EL0. */
297 if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
300 /* Must set at least one of the load/store bits. */
301 if ((ctrl & DBGWCR_LSC) == 0)
305 * When specifying the address range with BAS, the MASK
306 * field must be zero.
308 if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
309 (ctrl & DBGWCR_MASK) != 0)
312 monitor->dbg_enable_count++;
314 monitor->dbg_wvr[i] = addr;
315 monitor->dbg_wcr[i] = ctrl;
318 if (monitor->dbg_enable_count > 0)
319 monitor->dbg_flags |= DBGMON_ENABLED;
324 #ifdef COMPAT_FREEBSD32
326 fill_regs32(struct thread *td, struct reg32 *regs)
329 struct trapframe *tf;
332 for (i = 0; i < 13; i++)
333 regs->r[i] = tf->tf_x[i];
334 /* For arm32, SP is r13 and LR is r14 */
335 regs->r_sp = tf->tf_x[13];
336 regs->r_lr = tf->tf_x[14];
337 regs->r_pc = tf->tf_elr;
338 regs->r_cpsr = tf->tf_spsr;
344 set_regs32(struct thread *td, struct reg32 *regs)
347 struct trapframe *tf;
350 for (i = 0; i < 13; i++)
351 tf->tf_x[i] = regs->r[i];
352 /* For arm 32, SP is r13 an LR is r14 */
353 tf->tf_x[13] = regs->r_sp;
354 tf->tf_x[14] = regs->r_lr;
355 tf->tf_elr = regs->r_pc;
356 tf->tf_spsr &= ~PSR_SETTABLE_32;
357 tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
362 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
364 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
367 memset(regs, 0, sizeof(*regs));
372 set_fpregs32(struct thread *td, struct fpreg32 *regs)
379 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
382 memset(regs, 0, sizeof(*regs));
387 set_dbregs32(struct thread *td, struct dbreg32 *regs)
395 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
397 struct trapframe *tf = td->td_frame;
398 struct pcb *pcb = td->td_pcb;
400 memset(tf, 0, sizeof(struct trapframe));
403 tf->tf_sp = STACKALIGN(stack);
404 tf->tf_lr = imgp->entry_addr;
405 tf->tf_elr = imgp->entry_addr;
407 td->td_pcb->pcb_tpidr_el0 = 0;
408 td->td_pcb->pcb_tpidrro_el0 = 0;
409 WRITE_SPECIALREG(tpidrro_el0, 0);
410 WRITE_SPECIALREG(tpidr_el0, 0);
413 vfp_reset_state(td, pcb);
417 * Clear debug register state. It is not applicable to the new process.
419 bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
421 /* Generate new pointer authentication keys */
425 /* Sanity check these are the same size, they will be memcpy'd to and from */
426 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
427 sizeof((struct gpregs *)0)->gp_x);
428 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
429 sizeof((struct reg *)0)->x);
432 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
434 struct trapframe *tf = td->td_frame;
436 if (clear_ret & GET_MC_CLEAR_RET) {
437 mcp->mc_gpregs.gp_x[0] = 0;
438 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
440 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
441 mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
444 memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
445 sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
447 mcp->mc_gpregs.gp_sp = tf->tf_sp;
448 mcp->mc_gpregs.gp_lr = tf->tf_lr;
449 mcp->mc_gpregs.gp_elr = tf->tf_elr;
450 get_fpcontext(td, mcp);
456 set_mcontext(struct thread *td, mcontext_t *mcp)
458 struct trapframe *tf = td->td_frame;
461 spsr = mcp->mc_gpregs.gp_spsr;
462 if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
463 (spsr & PSR_AARCH32) != 0 ||
464 (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
467 memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
469 tf->tf_sp = mcp->mc_gpregs.gp_sp;
470 tf->tf_lr = mcp->mc_gpregs.gp_lr;
471 tf->tf_elr = mcp->mc_gpregs.gp_elr;
472 tf->tf_spsr = mcp->mc_gpregs.gp_spsr;
473 if ((tf->tf_spsr & PSR_SS) != 0) {
474 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
476 WRITE_SPECIALREG(mdscr_el1,
477 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
480 set_fpcontext(td, mcp);
486 get_fpcontext(struct thread *td, mcontext_t *mcp)
493 curpcb = curthread->td_pcb;
495 if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
497 * If we have just been running VFP instructions we will
498 * need to save the state to memcpy it below.
500 vfp_save_state(td, curpcb);
502 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
503 ("Called get_fpcontext while the kernel is using the VFP"));
504 KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
505 ("Non-userspace FPU flags set in get_fpcontext"));
506 memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
507 sizeof(mcp->mc_fpregs.fp_q));
508 mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
509 mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
510 mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
511 mcp->mc_flags |= _MC_FP_VALID;
519 set_fpcontext(struct thread *td, mcontext_t *mcp)
526 if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
527 curpcb = curthread->td_pcb;
530 * Discard any vfp state for the current thread, we
531 * are about to override it.
535 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
536 ("Called set_fpcontext while the kernel is using the VFP"));
537 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
538 sizeof(mcp->mc_fpregs.fp_q));
539 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
540 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
541 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK;
549 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
554 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
557 error = set_mcontext(td, &uc.uc_mcontext);
561 /* Restore signal mask. */
562 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
564 return (EJUSTRETURN);
568 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
572 struct trapframe *tf;
573 struct sigframe *fp, frame;
579 PROC_LOCK_ASSERT(p, MA_OWNED);
581 sig = ksi->ksi_signo;
583 mtx_assert(&psp->ps_mtx, MA_OWNED);
586 onstack = sigonstack(tf->tf_sp);
588 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
591 /* Allocate and validate space for the signal handler context. */
592 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
593 SIGISMEMBER(psp->ps_sigonstack, sig)) {
594 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
595 td->td_sigstk.ss_size);
596 #if defined(COMPAT_43)
597 td->td_sigstk.ss_flags |= SS_ONSTACK;
600 fp = (struct sigframe *)td->td_frame->tf_sp;
603 /* Make room, keeping the stack aligned */
605 fp = (struct sigframe *)STACKALIGN(fp);
607 /* Fill in the frame to copy out */
608 bzero(&frame, sizeof(frame));
609 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
610 frame.sf_si = ksi->ksi_info;
611 frame.sf_uc.uc_sigmask = *mask;
612 frame.sf_uc.uc_stack = td->td_sigstk;
613 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
614 (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
615 mtx_unlock(&psp->ps_mtx);
616 PROC_UNLOCK(td->td_proc);
618 /* Copy the sigframe out to the user's stack. */
619 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
620 /* Process has trashed its stack. Kill it. */
621 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
627 tf->tf_x[1] = (register_t)&fp->sf_si;
628 tf->tf_x[2] = (register_t)&fp->sf_uc;
629 tf->tf_x[8] = (register_t)catcher;
630 tf->tf_sp = (register_t)fp;
631 tf->tf_elr = (register_t)PROC_SIGCODE(p);
633 /* Clear the single step flag while in the signal handler */
634 if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
635 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
636 WRITE_SPECIALREG(mdscr_el1,
637 READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
641 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
645 mtx_lock(&psp->ps_mtx);