2 * Copyright (c) 2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/imgact.h>
36 #include <sys/kernel.h>
38 #include <sys/limits.h>
40 #include <sys/mutex.h>
42 #include <sys/ptrace.h>
44 #include <sys/rwlock.h>
45 #include <sys/signalvar.h>
46 #include <sys/syscallsubr.h>
47 #include <sys/sysent.h>
48 #include <sys/sysproto.h>
49 #include <sys/ucontext.h>
52 #include <vm/vm_param.h>
54 #include <machine/armreg.h>
55 #include <machine/kdb.h>
56 #include <machine/md_var.h>
57 #include <machine/pcb.h>
60 #include <machine/vfp.h>
63 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
64 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
65 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
67 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
68 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
71 fill_regs(struct thread *td, struct reg *regs)
73 struct trapframe *frame;
76 regs->sp = frame->tf_sp;
77 regs->lr = frame->tf_lr;
78 regs->elr = frame->tf_elr;
79 regs->spsr = frame->tf_spsr;
81 memcpy(regs->x, frame->tf_x, sizeof(regs->x));
83 #ifdef COMPAT_FREEBSD32
85 * We may be called here for a 32bits process, if we're using a
86 * 64bits debugger. If so, put PC and SPSR where it expects it.
88 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
89 regs->x[15] = frame->tf_elr;
90 regs->x[16] = frame->tf_spsr;
97 set_regs(struct thread *td, struct reg *regs)
99 struct trapframe *frame;
101 frame = td->td_frame;
102 frame->tf_sp = regs->sp;
103 frame->tf_lr = regs->lr;
105 memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
107 #ifdef COMPAT_FREEBSD32
108 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
110 * We may be called for a 32bits process if we're using
111 * a 64bits debugger. If so, get PC and SPSR from where
114 frame->tf_elr = regs->x[15];
115 frame->tf_spsr &= ~PSR_SETTABLE_32;
116 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
117 /* Don't allow userspace to ask to continue single stepping.
118 * The SPSR.SS field doesn't exist when the EL1 is AArch32.
119 * As the SPSR.DIT field has moved in its place don't
120 * allow userspace to set the SPSR.SS field.
125 frame->tf_elr = regs->elr;
126 frame->tf_spsr &= ~PSR_SETTABLE_64;
127 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
128 /* Enable single stepping if userspace asked fot it */
129 if ((frame->tf_spsr & PSR_SS) != 0) {
130 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
132 WRITE_SPECIALREG(mdscr_el1,
133 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
141 fill_fpregs(struct thread *td, struct fpreg *regs)
147 if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
149 * If we have just been running VFP instructions we will
150 * need to save the state to memcpy it below.
153 vfp_save_state(td, pcb);
155 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
156 ("Called fill_fpregs while the kernel is using the VFP"));
157 memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
159 regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
160 regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
163 memset(regs, 0, sizeof(*regs));
168 set_fpregs(struct thread *td, struct fpreg *regs)
174 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
175 ("Called set_fpregs while the kernel is using the VFP"));
176 memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
177 pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
178 pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
184 fill_dbregs(struct thread *td, struct dbreg *regs)
186 struct debug_monitor_state *monitor;
188 uint8_t debug_ver, nbkpts, nwtpts;
190 memset(regs, 0, sizeof(*regs));
192 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
194 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
196 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
200 * The BRPs field contains the number of breakpoints - 1. Armv8-A
201 * allows the hardware to provide 2-16 breakpoints so this won't
202 * overflow an 8 bit value. The same applies to the WRPs field.
207 regs->db_debug_ver = debug_ver;
208 regs->db_nbkpts = nbkpts;
209 regs->db_nwtpts = nwtpts;
211 monitor = &td->td_pcb->pcb_dbg_regs;
212 if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
213 for (i = 0; i < nbkpts; i++) {
214 regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
215 regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
217 for (i = 0; i < nwtpts; i++) {
218 regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
219 regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
227 set_dbregs(struct thread *td, struct dbreg *regs)
229 struct debug_monitor_state *monitor;
234 monitor = &td->td_pcb->pcb_dbg_regs;
235 monitor->dbg_enable_count = 0;
237 for (i = 0; i < DBG_BRP_MAX; i++) {
238 addr = regs->db_breakregs[i].dbr_addr;
239 ctrl = regs->db_breakregs[i].dbr_ctrl;
242 * Don't let the user set a breakpoint on a kernel or
243 * non-canonical user address.
245 if (addr >= VM_MAXUSER_ADDRESS)
249 * The lowest 2 bits are ignored, so record the effective
252 addr = rounddown2(addr, 4);
255 * Some control fields are ignored, and other bits reserved.
256 * Only unlinked, address-matching breakpoints are supported.
258 * XXX: fields that appear unvalidated, such as BAS, have
259 * constrained undefined behaviour. If the user mis-programs
260 * these, there is no risk to the system.
262 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
263 if ((ctrl & DBGBCR_EN) != 0) {
264 /* Only target EL0. */
265 if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
268 monitor->dbg_enable_count++;
271 monitor->dbg_bvr[i] = addr;
272 monitor->dbg_bcr[i] = ctrl;
275 for (i = 0; i < DBG_WRP_MAX; i++) {
276 addr = regs->db_watchregs[i].dbw_addr;
277 ctrl = regs->db_watchregs[i].dbw_ctrl;
280 * Don't let the user set a watchpoint on a kernel or
281 * non-canonical user address.
283 if (addr >= VM_MAXUSER_ADDRESS)
287 * Some control fields are ignored, and other bits reserved.
288 * Only unlinked watchpoints are supported.
290 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
293 if ((ctrl & DBGWCR_EN) != 0) {
294 /* Only target EL0. */
295 if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
298 /* Must set at least one of the load/store bits. */
299 if ((ctrl & DBGWCR_LSC) == 0)
303 * When specifying the address range with BAS, the MASK
304 * field must be zero.
306 if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
307 (ctrl & DBGWCR_MASK) != 0)
310 monitor->dbg_enable_count++;
312 monitor->dbg_wvr[i] = addr;
313 monitor->dbg_wcr[i] = ctrl;
316 if (monitor->dbg_enable_count > 0)
317 monitor->dbg_flags |= DBGMON_ENABLED;
322 #ifdef COMPAT_FREEBSD32
324 fill_regs32(struct thread *td, struct reg32 *regs)
327 struct trapframe *tf;
330 for (i = 0; i < 13; i++)
331 regs->r[i] = tf->tf_x[i];
332 /* For arm32, SP is r13 and LR is r14 */
333 regs->r_sp = tf->tf_x[13];
334 regs->r_lr = tf->tf_x[14];
335 regs->r_pc = tf->tf_elr;
336 regs->r_cpsr = tf->tf_spsr;
342 set_regs32(struct thread *td, struct reg32 *regs)
345 struct trapframe *tf;
348 for (i = 0; i < 13; i++)
349 tf->tf_x[i] = regs->r[i];
350 /* For arm 32, SP is r13 an LR is r14 */
351 tf->tf_x[13] = regs->r_sp;
352 tf->tf_x[14] = regs->r_lr;
353 tf->tf_elr = regs->r_pc;
354 tf->tf_spsr &= ~PSR_SETTABLE_32;
355 tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
360 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
362 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
365 memset(regs, 0, sizeof(*regs));
370 set_fpregs32(struct thread *td, struct fpreg32 *regs)
377 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
380 memset(regs, 0, sizeof(*regs));
385 set_dbregs32(struct thread *td, struct dbreg32 *regs)
393 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
395 struct trapframe *tf = td->td_frame;
396 struct pcb *pcb = td->td_pcb;
398 memset(tf, 0, sizeof(struct trapframe));
401 tf->tf_sp = STACKALIGN(stack);
402 tf->tf_lr = imgp->entry_addr;
403 tf->tf_elr = imgp->entry_addr;
405 td->td_pcb->pcb_tpidr_el0 = 0;
406 td->td_pcb->pcb_tpidrro_el0 = 0;
407 WRITE_SPECIALREG(tpidrro_el0, 0);
408 WRITE_SPECIALREG(tpidr_el0, 0);
411 vfp_reset_state(td, pcb);
415 * Clear debug register state. It is not applicable to the new process.
417 bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
419 /* Generate new pointer authentication keys */
423 /* Sanity check these are the same size, they will be memcpy'd to and from */
424 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
425 sizeof((struct gpregs *)0)->gp_x);
426 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
427 sizeof((struct reg *)0)->x);
430 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
432 struct trapframe *tf = td->td_frame;
434 if (clear_ret & GET_MC_CLEAR_RET) {
435 mcp->mc_gpregs.gp_x[0] = 0;
436 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
438 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
439 mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
442 memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
443 sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
445 mcp->mc_gpregs.gp_sp = tf->tf_sp;
446 mcp->mc_gpregs.gp_lr = tf->tf_lr;
447 mcp->mc_gpregs.gp_elr = tf->tf_elr;
448 get_fpcontext(td, mcp);
454 set_mcontext(struct thread *td, mcontext_t *mcp)
456 struct trapframe *tf = td->td_frame;
459 spsr = mcp->mc_gpregs.gp_spsr;
460 if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
461 (spsr & PSR_AARCH32) != 0 ||
462 (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
465 memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
467 tf->tf_sp = mcp->mc_gpregs.gp_sp;
468 tf->tf_lr = mcp->mc_gpregs.gp_lr;
469 tf->tf_elr = mcp->mc_gpregs.gp_elr;
470 tf->tf_spsr = mcp->mc_gpregs.gp_spsr;
471 if ((tf->tf_spsr & PSR_SS) != 0) {
472 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
474 WRITE_SPECIALREG(mdscr_el1,
475 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
478 set_fpcontext(td, mcp);
484 get_fpcontext(struct thread *td, mcontext_t *mcp)
491 curpcb = curthread->td_pcb;
493 if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
495 * If we have just been running VFP instructions we will
496 * need to save the state to memcpy it below.
498 vfp_save_state(td, curpcb);
500 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
501 ("Called get_fpcontext while the kernel is using the VFP"));
502 KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
503 ("Non-userspace FPU flags set in get_fpcontext"));
504 memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
505 sizeof(mcp->mc_fpregs.fp_q));
506 mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
507 mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
508 mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
509 mcp->mc_flags |= _MC_FP_VALID;
517 set_fpcontext(struct thread *td, mcontext_t *mcp)
524 if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
525 curpcb = curthread->td_pcb;
528 * Discard any vfp state for the current thread, we
529 * are about to override it.
533 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
534 ("Called set_fpcontext while the kernel is using the VFP"));
535 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
536 sizeof(mcp->mc_fpregs.fp_q));
537 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
538 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
539 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK;
547 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
552 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
555 error = set_mcontext(td, &uc.uc_mcontext);
559 /* Restore signal mask. */
560 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
562 return (EJUSTRETURN);
566 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
570 struct trapframe *tf;
571 struct sigframe *fp, frame;
577 PROC_LOCK_ASSERT(p, MA_OWNED);
579 sig = ksi->ksi_signo;
581 mtx_assert(&psp->ps_mtx, MA_OWNED);
584 onstack = sigonstack(tf->tf_sp);
586 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
589 /* Allocate and validate space for the signal handler context. */
590 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
591 SIGISMEMBER(psp->ps_sigonstack, sig)) {
592 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
593 td->td_sigstk.ss_size);
594 #if defined(COMPAT_43)
595 td->td_sigstk.ss_flags |= SS_ONSTACK;
598 fp = (struct sigframe *)td->td_frame->tf_sp;
601 /* Make room, keeping the stack aligned */
603 fp = (struct sigframe *)STACKALIGN(fp);
605 /* Fill in the frame to copy out */
606 bzero(&frame, sizeof(frame));
607 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
608 frame.sf_si = ksi->ksi_info;
609 frame.sf_uc.uc_sigmask = *mask;
610 frame.sf_uc.uc_stack = td->td_sigstk;
611 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
612 (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
613 mtx_unlock(&psp->ps_mtx);
614 PROC_UNLOCK(td->td_proc);
616 /* Copy the sigframe out to the user's stack. */
617 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
618 /* Process has trashed its stack. Kill it. */
619 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
625 tf->tf_x[1] = (register_t)&fp->sf_si;
626 tf->tf_x[2] = (register_t)&fp->sf_uc;
627 tf->tf_x[8] = (register_t)catcher;
628 tf->tf_sp = (register_t)fp;
629 tf->tf_elr = (register_t)p->p_sysent->sv_sigcode_base;
631 /* Clear the single step flag while in the signal handler */
632 if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
633 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
634 WRITE_SPECIALREG(mdscr_el1,
635 READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
639 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
643 mtx_lock(&psp->ps_mtx);