2 * Copyright (c) 2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/imgact.h>
36 #include <sys/kernel.h>
38 #include <sys/limits.h>
40 #include <sys/mutex.h>
42 #include <sys/ptrace.h>
44 #include <sys/rwlock.h>
45 #include <sys/signalvar.h>
46 #include <sys/syscallsubr.h>
47 #include <sys/sysent.h>
48 #include <sys/sysproto.h>
49 #include <sys/ucontext.h>
52 #include <vm/vm_param.h>
54 #include <vm/vm_map.h>
56 #include <machine/armreg.h>
57 #include <machine/kdb.h>
58 #include <machine/md_var.h>
59 #include <machine/pcb.h>
62 #include <machine/vfp.h>
65 _Static_assert(sizeof(mcontext_t) == 880, "mcontext_t size incorrect");
66 _Static_assert(sizeof(ucontext_t) == 960, "ucontext_t size incorrect");
67 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect");
69 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
70 static void set_fpcontext(struct thread *td, mcontext_t *mcp);
73 fill_regs(struct thread *td, struct reg *regs)
75 struct trapframe *frame;
78 regs->sp = frame->tf_sp;
79 regs->lr = frame->tf_lr;
80 regs->elr = frame->tf_elr;
81 regs->spsr = frame->tf_spsr;
83 memcpy(regs->x, frame->tf_x, sizeof(regs->x));
85 #ifdef COMPAT_FREEBSD32
87 * We may be called here for a 32bits process, if we're using a
88 * 64bits debugger. If so, put PC and SPSR where it expects it.
90 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
91 regs->x[15] = frame->tf_elr;
92 regs->x[16] = frame->tf_spsr;
99 set_regs(struct thread *td, struct reg *regs)
101 struct trapframe *frame;
103 frame = td->td_frame;
104 frame->tf_sp = regs->sp;
105 frame->tf_lr = regs->lr;
107 memcpy(frame->tf_x, regs->x, sizeof(frame->tf_x));
109 #ifdef COMPAT_FREEBSD32
110 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) {
112 * We may be called for a 32bits process if we're using
113 * a 64bits debugger. If so, get PC and SPSR from where
116 frame->tf_elr = regs->x[15];
117 frame->tf_spsr &= ~PSR_SETTABLE_32;
118 frame->tf_spsr |= regs->x[16] & PSR_SETTABLE_32;
119 /* Don't allow userspace to ask to continue single stepping.
120 * The SPSR.SS field doesn't exist when the EL1 is AArch32.
121 * As the SPSR.DIT field has moved in its place don't
122 * allow userspace to set the SPSR.SS field.
127 frame->tf_elr = regs->elr;
129 * frame->tf_spsr and regs->spsr on FreeBSD 13 was 32-bit
130 * where from 14 they are 64 bit. As PSR_SETTABLE_64 clears
131 * the upper 32 bits no compatibility handling is needed,
132 * however if this is ever not the case we will need to add
133 * these, similar to how it is done in set_mcontext.
135 frame->tf_spsr &= ~PSR_SETTABLE_64;
136 frame->tf_spsr |= regs->spsr & PSR_SETTABLE_64;
137 /* Enable single stepping if userspace asked fot it */
138 if ((frame->tf_spsr & PSR_SS) != 0) {
139 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
141 WRITE_SPECIALREG(mdscr_el1,
142 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
150 fill_fpregs(struct thread *td, struct fpreg *regs)
156 if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
158 * If we have just been running VFP instructions we will
159 * need to save the state to memcpy it below.
162 vfp_save_state(td, pcb);
165 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
166 ("Called fill_fpregs while the kernel is using the VFP"));
167 memcpy(regs->fp_q, pcb->pcb_fpustate.vfp_regs,
169 regs->fp_cr = pcb->pcb_fpustate.vfp_fpcr;
170 regs->fp_sr = pcb->pcb_fpustate.vfp_fpsr;
172 memset(regs, 0, sizeof(*regs));
178 set_fpregs(struct thread *td, struct fpreg *regs)
184 KASSERT(pcb->pcb_fpusaved == &pcb->pcb_fpustate,
185 ("Called set_fpregs while the kernel is using the VFP"));
186 memcpy(pcb->pcb_fpustate.vfp_regs, regs->fp_q, sizeof(regs->fp_q));
187 pcb->pcb_fpustate.vfp_fpcr = regs->fp_cr;
188 pcb->pcb_fpustate.vfp_fpsr = regs->fp_sr;
194 fill_dbregs(struct thread *td, struct dbreg *regs)
196 struct debug_monitor_state *monitor;
198 uint8_t debug_ver, nbkpts, nwtpts;
200 memset(regs, 0, sizeof(*regs));
202 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_DebugVer_SHIFT,
204 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_BRPs_SHIFT,
206 extract_user_id_field(ID_AA64DFR0_EL1, ID_AA64DFR0_WRPs_SHIFT,
210 * The BRPs field contains the number of breakpoints - 1. Armv8-A
211 * allows the hardware to provide 2-16 breakpoints so this won't
212 * overflow an 8 bit value. The same applies to the WRPs field.
217 regs->db_debug_ver = debug_ver;
218 regs->db_nbkpts = nbkpts;
219 regs->db_nwtpts = nwtpts;
221 monitor = &td->td_pcb->pcb_dbg_regs;
222 if ((monitor->dbg_flags & DBGMON_ENABLED) != 0) {
223 for (i = 0; i < nbkpts; i++) {
224 regs->db_breakregs[i].dbr_addr = monitor->dbg_bvr[i];
225 regs->db_breakregs[i].dbr_ctrl = monitor->dbg_bcr[i];
227 for (i = 0; i < nwtpts; i++) {
228 regs->db_watchregs[i].dbw_addr = monitor->dbg_wvr[i];
229 regs->db_watchregs[i].dbw_ctrl = monitor->dbg_wcr[i];
237 set_dbregs(struct thread *td, struct dbreg *regs)
239 struct debug_monitor_state *monitor;
244 monitor = &td->td_pcb->pcb_dbg_regs;
245 monitor->dbg_enable_count = 0;
247 for (i = 0; i < DBG_BRP_MAX; i++) {
248 addr = regs->db_breakregs[i].dbr_addr;
249 ctrl = regs->db_breakregs[i].dbr_ctrl;
252 * Don't let the user set a breakpoint on a kernel or
253 * non-canonical user address.
255 if (addr >= VM_MAXUSER_ADDRESS)
259 * The lowest 2 bits are ignored, so record the effective
262 addr = rounddown2(addr, 4);
265 * Some control fields are ignored, and other bits reserved.
266 * Only unlinked, address-matching breakpoints are supported.
268 * XXX: fields that appear unvalidated, such as BAS, have
269 * constrained undefined behaviour. If the user mis-programs
270 * these, there is no risk to the system.
272 ctrl &= DBGBCR_EN | DBGBCR_PMC | DBGBCR_BAS;
273 if ((ctrl & DBGBCR_EN) != 0) {
274 /* Only target EL0. */
275 if ((ctrl & DBGBCR_PMC) != DBGBCR_PMC_EL0)
278 monitor->dbg_enable_count++;
281 monitor->dbg_bvr[i] = addr;
282 monitor->dbg_bcr[i] = ctrl;
285 for (i = 0; i < DBG_WRP_MAX; i++) {
286 addr = regs->db_watchregs[i].dbw_addr;
287 ctrl = regs->db_watchregs[i].dbw_ctrl;
290 * Don't let the user set a watchpoint on a kernel or
291 * non-canonical user address.
293 if (addr >= VM_MAXUSER_ADDRESS)
297 * Some control fields are ignored, and other bits reserved.
298 * Only unlinked watchpoints are supported.
300 ctrl &= DBGWCR_EN | DBGWCR_PAC | DBGWCR_LSC | DBGWCR_BAS |
303 if ((ctrl & DBGWCR_EN) != 0) {
304 /* Only target EL0. */
305 if ((ctrl & DBGWCR_PAC) != DBGWCR_PAC_EL0)
308 /* Must set at least one of the load/store bits. */
309 if ((ctrl & DBGWCR_LSC) == 0)
313 * When specifying the address range with BAS, the MASK
314 * field must be zero.
316 if ((ctrl & DBGWCR_BAS) != DBGWCR_BAS &&
317 (ctrl & DBGWCR_MASK) != 0)
320 monitor->dbg_enable_count++;
322 monitor->dbg_wvr[i] = addr;
323 monitor->dbg_wcr[i] = ctrl;
326 if (monitor->dbg_enable_count > 0)
327 monitor->dbg_flags |= DBGMON_ENABLED;
332 #ifdef COMPAT_FREEBSD32
334 fill_regs32(struct thread *td, struct reg32 *regs)
337 struct trapframe *tf;
340 for (i = 0; i < 13; i++)
341 regs->r[i] = tf->tf_x[i];
342 /* For arm32, SP is r13 and LR is r14 */
343 regs->r_sp = tf->tf_x[13];
344 regs->r_lr = tf->tf_x[14];
345 regs->r_pc = tf->tf_elr;
346 regs->r_cpsr = tf->tf_spsr;
352 set_regs32(struct thread *td, struct reg32 *regs)
355 struct trapframe *tf;
358 for (i = 0; i < 13; i++)
359 tf->tf_x[i] = regs->r[i];
360 /* For arm 32, SP is r13 an LR is r14 */
361 tf->tf_x[13] = regs->r_sp;
362 tf->tf_x[14] = regs->r_lr;
363 tf->tf_elr = regs->r_pc;
364 tf->tf_spsr &= ~PSR_SETTABLE_32;
365 tf->tf_spsr |= regs->r_cpsr & PSR_SETTABLE_32;
370 /* XXX fill/set dbregs/fpregs are stubbed on 32-bit arm. */
372 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
375 memset(regs, 0, sizeof(*regs));
380 set_fpregs32(struct thread *td, struct fpreg32 *regs)
387 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
390 memset(regs, 0, sizeof(*regs));
395 set_dbregs32(struct thread *td, struct dbreg32 *regs)
403 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
405 struct trapframe *tf = td->td_frame;
406 struct pcb *pcb = td->td_pcb;
408 memset(tf, 0, sizeof(struct trapframe));
411 tf->tf_sp = STACKALIGN(stack);
412 tf->tf_lr = imgp->entry_addr;
413 tf->tf_elr = imgp->entry_addr;
415 td->td_pcb->pcb_tpidr_el0 = 0;
416 td->td_pcb->pcb_tpidrro_el0 = 0;
417 WRITE_SPECIALREG(tpidrro_el0, 0);
418 WRITE_SPECIALREG(tpidr_el0, 0);
421 vfp_reset_state(td, pcb);
425 * Clear debug register state. It is not applicable to the new process.
427 bzero(&pcb->pcb_dbg_regs, sizeof(pcb->pcb_dbg_regs));
429 /* Generate new pointer authentication keys */
433 /* Sanity check these are the same size, they will be memcpy'd to and from */
434 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
435 sizeof((struct gpregs *)0)->gp_x);
436 CTASSERT(sizeof(((struct trapframe *)0)->tf_x) ==
437 sizeof((struct reg *)0)->x);
440 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
442 struct trapframe *tf = td->td_frame;
444 if (clear_ret & GET_MC_CLEAR_RET) {
445 mcp->mc_gpregs.gp_x[0] = 0;
446 mcp->mc_gpregs.gp_spsr = tf->tf_spsr & ~PSR_C;
448 mcp->mc_gpregs.gp_x[0] = tf->tf_x[0];
449 mcp->mc_gpregs.gp_spsr = tf->tf_spsr;
452 memcpy(&mcp->mc_gpregs.gp_x[1], &tf->tf_x[1],
453 sizeof(mcp->mc_gpregs.gp_x[1]) * (nitems(mcp->mc_gpregs.gp_x) - 1));
455 mcp->mc_gpregs.gp_sp = tf->tf_sp;
456 mcp->mc_gpregs.gp_lr = tf->tf_lr;
457 mcp->mc_gpregs.gp_elr = tf->tf_elr;
458 get_fpcontext(td, mcp);
464 set_mcontext(struct thread *td, mcontext_t *mcp)
466 #define PSR_13_MASK 0xfffffffful
467 struct trapframe *tf = td->td_frame;
470 spsr = mcp->mc_gpregs.gp_spsr;
471 #ifdef COMPAT_FREEBSD13
472 if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
474 * Before FreeBSD 14 gp_spsr was 32 bit. The size of mc_gpregs
475 * was identical because of padding so mask of the upper bits
476 * that may be invalid on earlier releases.
482 if ((spsr & PSR_M_MASK) != PSR_M_EL0t ||
483 (spsr & PSR_AARCH32) != 0 ||
484 (spsr & PSR_DAIF) != (td->td_frame->tf_spsr & PSR_DAIF))
487 memcpy(tf->tf_x, mcp->mc_gpregs.gp_x, sizeof(tf->tf_x));
489 tf->tf_sp = mcp->mc_gpregs.gp_sp;
490 tf->tf_lr = mcp->mc_gpregs.gp_lr;
491 tf->tf_elr = mcp->mc_gpregs.gp_elr;
492 #ifdef COMPAT_FREEBSD13
493 if (td->td_proc->p_osrel < P_OSREL_ARM64_SPSR) {
494 /* Keep the upper 32 bits of spsr on older releases */
495 tf->tf_spsr &= ~PSR_13_MASK;
500 if ((tf->tf_spsr & PSR_SS) != 0) {
501 td->td_pcb->pcb_flags |= PCB_SINGLE_STEP;
503 WRITE_SPECIALREG(mdscr_el1,
504 READ_SPECIALREG(mdscr_el1) | MDSCR_SS);
507 set_fpcontext(td, mcp);
514 get_fpcontext(struct thread *td, mcontext_t *mcp)
519 MPASS(td == curthread);
521 curpcb = curthread->td_pcb;
522 if ((curpcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
524 * If we have just been running VFP instructions we will
525 * need to save the state to memcpy it below.
527 vfp_save_state(td, curpcb);
530 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
531 ("Called get_fpcontext while the kernel is using the VFP"));
532 KASSERT((curpcb->pcb_fpflags & ~PCB_FP_USERMASK) == 0,
533 ("Non-userspace FPU flags set in get_fpcontext"));
534 memcpy(mcp->mc_fpregs.fp_q, curpcb->pcb_fpustate.vfp_regs,
535 sizeof(mcp->mc_fpregs.fp_q));
536 mcp->mc_fpregs.fp_cr = curpcb->pcb_fpustate.vfp_fpcr;
537 mcp->mc_fpregs.fp_sr = curpcb->pcb_fpustate.vfp_fpsr;
538 mcp->mc_fpregs.fp_flags = curpcb->pcb_fpflags;
539 mcp->mc_flags |= _MC_FP_VALID;
544 set_fpcontext(struct thread *td, mcontext_t *mcp)
549 MPASS(td == curthread);
550 if ((mcp->mc_flags & _MC_FP_VALID) != 0) {
551 curpcb = curthread->td_pcb;
554 * Discard any vfp state for the current thread, we
555 * are about to override it.
561 KASSERT(curpcb->pcb_fpusaved == &curpcb->pcb_fpustate,
562 ("Called set_fpcontext while the kernel is using the VFP"));
563 memcpy(curpcb->pcb_fpustate.vfp_regs, mcp->mc_fpregs.fp_q,
564 sizeof(mcp->mc_fpregs.fp_q));
565 curpcb->pcb_fpustate.vfp_fpcr = mcp->mc_fpregs.fp_cr;
566 curpcb->pcb_fpustate.vfp_fpsr = mcp->mc_fpregs.fp_sr;
567 curpcb->pcb_fpflags = mcp->mc_fpregs.fp_flags & PCB_FP_USERMASK;
573 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
578 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
581 error = set_mcontext(td, &uc.uc_mcontext);
585 /* Restore signal mask. */
586 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
588 return (EJUSTRETURN);
592 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
596 struct trapframe *tf;
597 struct sigframe *fp, frame;
603 PROC_LOCK_ASSERT(p, MA_OWNED);
605 sig = ksi->ksi_signo;
607 mtx_assert(&psp->ps_mtx, MA_OWNED);
610 onstack = sigonstack(tf->tf_sp);
612 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
615 /* Allocate and validate space for the signal handler context. */
616 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !onstack &&
617 SIGISMEMBER(psp->ps_sigonstack, sig)) {
618 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp +
619 td->td_sigstk.ss_size);
620 #if defined(COMPAT_43)
621 td->td_sigstk.ss_flags |= SS_ONSTACK;
624 fp = (struct sigframe *)td->td_frame->tf_sp;
627 /* Make room, keeping the stack aligned */
629 fp = (struct sigframe *)STACKALIGN(fp);
631 /* Fill in the frame to copy out */
632 bzero(&frame, sizeof(frame));
633 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
634 frame.sf_si = ksi->ksi_info;
635 frame.sf_uc.uc_sigmask = *mask;
636 frame.sf_uc.uc_stack = td->td_sigstk;
637 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ?
638 (onstack ? SS_ONSTACK : 0) : SS_DISABLE;
639 mtx_unlock(&psp->ps_mtx);
640 PROC_UNLOCK(td->td_proc);
642 /* Copy the sigframe out to the user's stack. */
643 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
644 /* Process has trashed its stack. Kill it. */
645 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
651 tf->tf_x[1] = (register_t)&fp->sf_si;
652 tf->tf_x[2] = (register_t)&fp->sf_uc;
653 tf->tf_x[8] = (register_t)catcher;
654 tf->tf_sp = (register_t)fp;
655 tf->tf_elr = (register_t)PROC_SIGCODE(p);
657 /* Clear the single step flag while in the signal handler */
658 if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
659 td->td_pcb->pcb_flags &= ~PCB_SINGLE_STEP;
660 WRITE_SPECIALREG(mdscr_el1,
661 READ_SPECIALREG(mdscr_el1) & ~MDSCR_SS);
665 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_elr,
669 mtx_lock(&psp->ps_mtx);