2 * Copyright (c) 2015 The FreeBSD Foundation
5 * This software was developed by Semihalf under
6 * the sponsorship of the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #ifndef _GIC_V3_VAR_H_
33 #define _GIC_V3_VAR_H_
35 #include <arm/arm/gic_common.h>
37 #define GIC_V3_DEVSTR "ARM Generic Interrupt Controller v3.0"
39 DECLARE_CLASS(gic_v3_driver);
44 struct resource res; /* mem resource for redist */
45 vm_offset_t pend_base;
46 bool lpi_enabled; /* redist LPI configured? */
51 * Re-Distributor region description.
52 * We will have few of those depending
53 * on the #redistributor-regions property in FDT.
55 struct resource ** regions;
56 /* Number of Re-Distributor regions */
58 /* Per-CPU Re-Distributor data */
59 struct redist_pcpu *pcpu[MAXCPU];
64 struct resource ** gic_res;
67 struct resource * gic_dist;
69 struct gic_redists gic_redists;
71 /* Message Based Interrupts */
74 struct mtx gic_mbi_mtx;
82 boolean_t gic_registered;
85 device_t *gic_children;
86 struct intr_pic *gic_pic;
87 struct gic_v3_irqsrc *gic_irqs;
90 struct gic_v3_devinfo {
95 #define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc)
97 MALLOC_DECLARE(M_GIC_V3);
100 #define GICV3_IVAR_NIRQS 1000
101 /* 1001 was GICV3_IVAR_REDIST_VADDR */
102 #define GICV3_IVAR_REDIST 1002
104 __BUS_ACCESSOR(gicv3, nirqs, GICV3, NIRQS, u_int);
105 __BUS_ACCESSOR(gicv3, redist, GICV3, REDIST, void *);
108 int gic_v3_attach(device_t dev);
109 int gic_v3_detach(device_t dev);
110 int arm_gic_v3_intr(void *);
112 uint32_t gic_r_read_4(device_t, bus_size_t);
113 uint64_t gic_r_read_8(device_t, bus_size_t);
114 void gic_r_write_4(device_t, bus_size_t, uint32_t var);
115 void gic_r_write_8(device_t, bus_size_t, uint64_t var);
118 * GIC Distributor accessors.
119 * Notice that only GIC sofc can be passed.
121 #define gic_d_read(sc, len, reg) \
123 bus_read_##len(sc->gic_dist, reg); \
126 #define gic_d_write(sc, len, reg, val) \
128 bus_write_##len(sc->gic_dist, reg, val);\
131 /* GIC Re-Distributor accessors (per-CPU) */
132 #define gic_r_read(sc, len, reg) \
134 u_int cpu = PCPU_GET(cpuid); \
137 &sc->gic_redists.pcpu[cpu]->res, \
141 #define gic_r_write(sc, len, reg, val) \
143 u_int cpu = PCPU_GET(cpuid); \
146 &sc->gic_redists.pcpu[cpu]->res, \
150 #endif /* _GIC_V3_VAR_H_ */