sys/arm64/arm64/identcpu.c

   1 /*-
   2  * Copyright (c) 2014 Andrew Turner
   3  * Copyright (c) 2014 The FreeBSD Foundation
   4  * All rights reserved.
   5  *
   6  * Portions of this software were developed by Semihalf
   7  * under sponsorship of the FreeBSD Foundation.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 #include <sys/param.h>
  36 #include <sys/pcpu.h>
  37 #include <sys/sysctl.h>
  38 #include <sys/systm.h>
  39
  40 #include <machine/cpu.h>
  41 #include <machine/cpufunc.h>
  42
  43 char machine[] = "arm64";
  44
  45 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0,
  46     "Machine class");
  47
  48 /*
  49  * Per-CPU affinity as provided in MPIDR_EL1
  50  * Indexed by CPU number in logical order selected by the system.
  51  * Relevant fields can be extracted using CPU_AFFn macros,
  52  * Aff3.Aff2.Aff1.Aff0 construct a unique CPU address in the system.
  53  *
  54  * Fields used by us:
  55  * Aff1 - Cluster number
  56  * Aff0 - CPU number in Aff1 cluster
  57  */
  58 uint64_t __cpu_affinity[MAXCPU];
  59
  60 struct cpu_desc {
  61         u_int           cpu_impl;
  62         u_int           cpu_part_num;
  63         u_int           cpu_variant;
  64         u_int           cpu_revision;
  65         const char      *cpu_impl_name;
  66         const char      *cpu_part_name;
  67 };
  68
  69 struct cpu_desc cpu_desc[MAXCPU];
  70
  71 struct cpu_parts {
  72         u_int           part_id;
  73         const char      *part_name;
  74 };
  75 #define CPU_PART_NONE   { 0, "Unknown Processor" }
  76
  77 struct cpu_implementers {
  78         u_int                   impl_id;
  79         const char              *impl_name;
  80         /*
  81          * Part number is implementation defined
  82          * so each vendor will have its own set of values and names.
  83          */
  84         const struct cpu_parts  *cpu_parts;
  85 };
  86 #define CPU_IMPLEMENTER_NONE    { 0, "Unknown Implementer", cpu_parts_none }
  87
  88 /*
  89  * Per-implementer table of (PartNum, CPU Name) pairs.
  90  */
  91 /* ARM Ltd. */
  92 static const struct cpu_parts cpu_parts_arm[] = {
  93         { CPU_PART_FOUNDATION, "Foundation-Model" },
  94         { CPU_PART_CORTEX_A53, "Cortex-A53" },
  95         { CPU_PART_CORTEX_A57, "Cortex-A57" },
  96         CPU_PART_NONE,
  97 };
  98 /* Cavium */
  99 static const struct cpu_parts cpu_parts_cavium[] = {
 100         { CPU_PART_THUNDER, "Thunder" },
 101         CPU_PART_NONE,
 102 };
 103
 104 /* Unknown */
 105 static const struct cpu_parts cpu_parts_none[] = {
 106         CPU_PART_NONE,
 107 };
 108
 109 /*
 110  * Implementers table.
 111  */
 112 const struct cpu_implementers cpu_implementers[] = {
 113         { CPU_IMPL_ARM,         "ARM",          cpu_parts_arm },
 114         { CPU_IMPL_BROADCOM,    "Broadcom",     cpu_parts_none },
 115         { CPU_IMPL_CAVIUM,      "Cavium",       cpu_parts_cavium },
 116         { CPU_IMPL_DEC,         "DEC",          cpu_parts_none },
 117         { CPU_IMPL_INFINEON,    "IFX",          cpu_parts_none },
 118         { CPU_IMPL_FREESCALE,   "Freescale",    cpu_parts_none },
 119         { CPU_IMPL_NVIDIA,      "NVIDIA",       cpu_parts_none },
 120         { CPU_IMPL_APM,         "APM",          cpu_parts_none },
 121         { CPU_IMPL_QUALCOMM,    "Qualcomm",     cpu_parts_none },
 122         { CPU_IMPL_MARVELL,     "Marvell",      cpu_parts_none },
 123         { CPU_IMPL_INTEL,       "Intel",        cpu_parts_none },
 124         CPU_IMPLEMENTER_NONE,
 125 };
 126
 127 void identify_cpu(void);
 128
 129 void
 130 identify_cpu(void)
 131 {
 132         u_int midr;
 133         u_int impl_id;
 134         u_int part_id;
 135         u_int cpu;
 136         uint64_t mpidr;
 137         size_t i;
 138         const struct cpu_parts *cpu_partsp = NULL;
 139
 140         cpu = PCPU_GET(cpuid);
 141         midr = get_midr();
 142
 143         /*
 144          * Store midr to pcpu to allow fast reading
 145          * from EL0, EL1 and assembly code.
 146          */
 147         PCPU_SET(midr, midr);
 148
 149         impl_id = CPU_IMPL(midr);
 150         for (i = 0; i < nitems(cpu_implementers); i++) {
 151                 if (impl_id == cpu_implementers[i].impl_id ||
 152                     cpu_implementers[i].impl_id == 0) {
 153                         cpu_desc[cpu].cpu_impl = impl_id;
 154                         cpu_desc[cpu].cpu_impl_name = cpu_implementers[i].impl_name;
 155                         cpu_partsp = cpu_implementers[i].cpu_parts;
 156                         break;
 157                 }
 158         }
 159
 160         part_id = CPU_PART(midr);
 161         for (i = 0; &cpu_partsp[i] != NULL; i++) {
 162                 if (part_id == cpu_partsp[i].part_id ||
 163                     cpu_partsp[i].part_id == 0) {
 164                         cpu_desc[cpu].cpu_part_num = part_id;
 165                         cpu_desc[cpu].cpu_part_name = cpu_partsp[i].part_name;
 166                         break;
 167                 }
 168         }
 169
 170         cpu_desc[cpu].cpu_revision = CPU_REV(midr);
 171         cpu_desc[cpu].cpu_variant = CPU_VAR(midr);
 172
 173         /* Save affinity for current CPU */
 174         mpidr = get_mpidr();
 175         CPU_AFFINITY(cpu) = mpidr & CPU_AFF_MASK;
 176
 177         /* Print details for boot CPU or if we want verbose output */
 178         if (cpu == 0 || bootverbose) {
 179                 printf("CPU(%d): %s %s r%dp%d\n", cpu,
 180                     cpu_desc[cpu].cpu_impl_name,
 181                     cpu_desc[cpu].cpu_part_name,
 182                     cpu_desc[cpu].cpu_variant,
 183                     cpu_desc[cpu].cpu_revision);
 184         }
 185
 186         if (bootverbose)
 187                 printf("CPU%u affinity: %u.%u.%u.%u\n", 0, CPU_AFF0(mpidr),
 188                     CPU_AFF1(mpidr), CPU_AFF2(mpidr), CPU_AFF3(mpidr));
 189 }