2 * Copyright (c) 2012-2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include "opt_kstack_pages.h"
31 #include <sys/syscall.h>
32 #include <machine/asm.h>
33 #include <machine/armreg.h>
34 #include <machine/hypervisor.h>
35 #include <machine/param.h>
36 #include <machine/pte.h>
37 #include <machine/vm.h>
38 #include <machine/vmparam.h>
41 #define DMAP_TABLES ((DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS) >> L0_SHIFT)
44 .set kernbase, KERNBASE
47 /* U-Boot booti related constants. */
48 #if defined(LINUX_BOOT_ABI)
49 #ifndef UBOOT_IMAGE_OFFSET
50 #define UBOOT_IMAGE_OFFSET 0 /* Image offset from start of */
51 #endif /* 2 MiB page */
53 #ifndef UBOOT_IMAGE_SIZE /* Total size of image */
54 #define UBOOT_IMAGE_SIZE _end - _start
57 #ifndef UBOOT_IMAGE_FLAGS
58 #define UBOOT_IMAGE_FLAGS 0 /* LE kernel, unspecified */
59 #endif /* page size */
60 #endif /* defined(LINUX_BOOT_ABI) */
64 * MMU on with an identity map, or off
67 * We are loaded at a 2MiB aligned address
73 #if defined(LINUX_BOOT_ABI)
74 /* U-boot image header */
77 .quad UBOOT_IMAGE_OFFSET /* Image offset in 2 MiB page, LE */
78 .quad UBOOT_IMAGE_SIZE /* Image size, LE */
79 .quad UBOOT_IMAGE_FLAGS /* Flags for kernel. LE */
80 .quad 0 /* Reserved */
81 .quad 0 /* Reserved */
82 .quad 0 /* Reserved */
83 .long 0x644d5241 /* Magic "ARM\x64", LE */
84 .long 0 /* Reserved for PE COFF offset*/
86 #endif /* defined(LINUX_BOOT_ABI) */
92 * Disable the MMU. We may have entered the kernel with it on and
93 * will need to update the tables later. If this has been set up
94 * with anything other than a VA == PA map then this will fail,
95 * but in this case the code to find where we are running from
96 * would have also failed.
104 /* Set the context id */
105 msr contextidr_el1, xzr
107 /* Get the virt -> phys offset */
113 * x28 = Our physical load address
116 /* Create the page tables */
122 * x26 = Kernel L1 table
129 /* Load the new ttbr0 pagetable */
130 adr x27, pagetable_l0_ttbr0
132 /* Jump to the virtual address space */
137 /* Set up the stack */
138 adr x25, initstack_end
140 sub sp, sp, #PCB_SIZE
150 /* Backup the module pointer */
153 /* Make the page table base a virtual address */
157 sub sp, sp, #BOOTPARAMS_SIZE
160 /* Degate the delda so it is VA -> PA */
163 str x1, [x0, #BP_MODULEP]
164 str x26, [x0, #BP_KERN_L1PT]
165 str x29, [x0, #BP_KERN_DELTA]
167 str x25, [x0, #BP_KERN_STACK]
168 str x24, [x0, #BP_KERN_L0PT]
169 str x23, [x0, #BP_BOOT_EL]
170 str x27, [x0, 40] /* kern_ttbr0 */
172 /* trace back starts here */
174 /* Branch to C code */
178 /* We should not get here */
191 * mpentry(unsigned long)
193 * Called by a core when it is being brought online.
194 * The data in x0 is passed straight to init_secondary.
197 /* Disable interrupts */
203 /* Set the context id */
204 msr contextidr_el1, xzr
206 /* Load the kernel page table */
207 adr x24, pagetable_l0_ttbr1
208 /* Load the identity page table */
209 adr x27, pagetable_l0_ttbr0_boostrap
214 /* Load the new ttbr0 pagetable */
215 adr x27, pagetable_l0_ttbr0
217 /* Jump to the virtual address space */
218 ldr x15, =mp_virtdone
222 /* Start using the AP boot stack */
227 /* Load the kernel ttbr0 pagetable */
231 /* Invalidate the TLB */
241 * If we are started in EL2, configure the required hypervisor
242 * registers and drop to EL1.
251 /* Configure the Hypervisor */
255 /* Load the Virtualization Process ID Register */
259 /* Load the Virtualization Multiprocess ID Register */
263 /* Set the bits that need to be 1 in sctlr_el1 */
267 /* Don't trap to EL2 for exceptions */
271 /* Don't trap to EL2 for CP15 traps */
274 /* Enable access to the physical timers at EL1 */
276 orr x2, x2, #(CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN)
279 /* Set the counter offset to a known value */
282 /* Hypervisor trap functions */
286 mov x2, #(PSR_F | PSR_I | PSR_A | PSR_D | PSR_M_EL1h)
289 /* Configure GICv3 CPU interface */
290 mrs x2, id_aa64pfr0_el1
291 /* Extract GIC bits from the register */
292 ubfx x2, x2, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_BITS
293 /* GIC[3:0] == 0001 - GIC CPU interface via special regs. supported */
294 cmp x2, #(ID_AA64PFR0_GIC_CPUIF_EN >> ID_AA64PFR0_GIC_SHIFT)
298 orr x2, x2, #ICC_SRE_EL2_EN /* Enable access from insecure EL1 */
299 orr x2, x2, #ICC_SRE_EL2_SRE /* Enable system registers */
303 /* Set the address to return to our return address */
319 VECT_EMPTY /* Synchronous EL2t */
320 VECT_EMPTY /* IRQ EL2t */
321 VECT_EMPTY /* FIQ EL2t */
322 VECT_EMPTY /* Error EL2t */
324 VECT_EMPTY /* Synchronous EL2h */
325 VECT_EMPTY /* IRQ EL2h */
326 VECT_EMPTY /* FIQ EL2h */
327 VECT_EMPTY /* Error EL2h */
329 VECT_EMPTY /* Synchronous 64-bit EL1 */
330 VECT_EMPTY /* IRQ 64-bit EL1 */
331 VECT_EMPTY /* FIQ 64-bit EL1 */
332 VECT_EMPTY /* Error 64-bit EL1 */
334 VECT_EMPTY /* Synchronous 32-bit EL1 */
335 VECT_EMPTY /* IRQ 32-bit EL1 */
336 VECT_EMPTY /* FIQ 32-bit EL1 */
337 VECT_EMPTY /* Error 32-bit EL1 */
340 * Get the delta between the physical address we were loaded to and the
341 * virtual address we expect to run from. This is used when building the
342 * initial page table.
345 /* Load the physical address of virt_map */
347 /* Load the virtual address of virt_map stored in virt_map */
349 /* Find PA - VA as PA' = VA' - VA + PA = VA' + (PA - VA) = VA' + x29 */
351 /* Find the load address for the kernel */
361 * This builds the page tables containing the identity map, and the kernel
365 * We were loaded to an address that is on a 2MiB boundary
366 * All the memory must not cross a 1GiB boundaty
367 * x28 contains the physical address we were loaded from
369 * TODO: This is out of date.
370 * There are at least 5 pages before that address for the page tables
371 * The pages used are:
372 * - The Kernel L2 table
373 * - The Kernel L1 table
374 * - The Kernel L0 table (TTBR1)
375 * - The identity (PA = VA) L1 table
376 * - The identity (PA = VA) L0 table (TTBR0)
377 * - The DMAP L1 tables
380 /* Save the Link register */
383 /* Clean the page table */
386 adr x27, pagetable_end
388 stp xzr, xzr, [x6], #16
389 stp xzr, xzr, [x6], #16
390 stp xzr, xzr, [x6], #16
391 stp xzr, xzr, [x6], #16
396 * Build the TTBR1 maps.
399 /* Find the size of the kernel */
402 #if defined(LINUX_BOOT_ABI)
403 /* X19 is used as 'map FDT data' flag */
406 /* No modules or FDT pointer ? */
410 * Test if x0 points to modules descriptor(virtual address) or
411 * to FDT (physical address)
413 cmp x0, x6 /* x6 is #(KERNBASE) */
417 /* Booted with modules pointer */
418 /* Find modulep - begin */
420 /* Add two 2MiB pages for the module data and round up */
421 ldr x7, =(3 * L2_SIZE - 1)
425 #if defined(LINUX_BOOT_ABI)
427 /* Booted by U-Boot booti with FDT data */
428 /* Set 'map FDT data' flag */
432 /* Booted by U-Boot booti without FTD data */
433 /* Find the end - begin */
438 * Add one 2MiB page for copy of FDT data (maximum FDT size),
439 * one for metadata and round up
441 ldr x7, =(3 * L2_SIZE - 1)
446 /* Get the number of l2 pages to allocate, rounded down */
447 lsr x10, x8, #(L2_SHIFT)
449 /* Create the kernel space L2 table */
451 mov x7, #VM_MEMATTR_WRITE_BACK
452 mov x8, #(KERNBASE & L2_BLOCK_MASK)
454 bl build_l2_block_pagetable
456 /* Move to the l1 table */
457 add x26, x26, #PAGE_SIZE
459 /* Link the l1 -> l2 table */
464 /* Move to the l0 table */
465 add x24, x26, #PAGE_SIZE
467 /* Link the l0 -> l1 table */
473 /* Link the DMAP tables */
474 ldr x8, =DMAP_MIN_ADDRESS
475 adr x9, pagetable_dmap;
476 mov x10, #DMAP_TABLES
480 * Build the TTBR0 maps. As TTBR0 maps, they must specify ATTR_S1_nG.
481 * They are only needed early on, so the VA = PA map is uncached.
483 add x27, x24, #PAGE_SIZE
485 mov x6, x27 /* The initial page table */
486 #if defined(SOCDEV_PA) && defined(SOCDEV_VA)
487 /* Create a table for the UART */
488 mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_DEVICE))
489 mov x8, #(SOCDEV_VA) /* VA start */
490 mov x9, #(SOCDEV_PA) /* PA start */
492 bl build_l1_block_pagetable
495 #if defined(LINUX_BOOT_ABI)
499 /* Create the identity mapping for FDT data (2 MiB max) */
500 mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
502 mov x8, x0 /* VA start (== PA start) */
504 bl build_l1_block_pagetable
509 /* Create the VA = PA map */
510 mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
512 mov x8, x9 /* VA start (== PA start) */
514 bl build_l1_block_pagetable
516 /* Move to the l0 table */
517 add x27, x27, #PAGE_SIZE
519 /* Link the l0 -> l1 table */
525 /* Restore the Link register */
530 * Builds an L0 -> L1 table descriptor
532 * This is a link for a 512GiB block of memory with up to 1GiB regions mapped
533 * within it by build_l1_block_pagetable.
536 * x8 = Virtual Address
537 * x9 = L1 PA (trashed)
539 * x11, x12 and x13 are trashed
543 * Link an L0 -> L1 table entry.
545 /* Find the table index */
546 lsr x11, x8, #L0_SHIFT
547 and x11, x11, #L0_ADDR_MASK
549 /* Build the L0 block entry */
552 /* Only use the output address bits */
553 lsr x9, x9, #PAGE_SHIFT
554 1: orr x13, x12, x9, lsl #PAGE_SHIFT
556 /* Store the entry */
557 str x13, [x6, x11, lsl #3]
567 * Builds an L1 -> L2 table descriptor
569 * This is a link for a 1GiB block of memory with up to 2MiB regions mapped
570 * within it by build_l2_block_pagetable.
573 * x8 = Virtual Address
574 * x9 = L2 PA (trashed)
575 * x11, x12 and x13 are trashed
579 * Link an L1 -> L2 table entry.
581 /* Find the table index */
582 lsr x11, x8, #L1_SHIFT
583 and x11, x11, #Ln_ADDR_MASK
585 /* Build the L1 block entry */
588 /* Only use the output address bits */
589 lsr x9, x9, #PAGE_SHIFT
590 orr x13, x12, x9, lsl #PAGE_SHIFT
592 /* Store the entry */
593 str x13, [x6, x11, lsl #3]
598 * Builds count 1 GiB page table entry
600 * x7 = Variable lower block attributes
602 * x9 = PA start (trashed)
604 * x11, x12 and x13 are trashed
606 build_l1_block_pagetable:
608 * Build the L1 table entry.
610 /* Find the table index */
611 lsr x11, x8, #L1_SHIFT
612 and x11, x11, #Ln_ADDR_MASK
614 /* Build the L1 block entry */
615 orr x12, x7, #L1_BLOCK
616 orr x12, x12, #(ATTR_DEFAULT)
618 /* Only use the output address bits */
619 lsr x9, x9, #L1_SHIFT
621 /* Set the physical address for this virtual address */
622 1: orr x13, x12, x9, lsl #L1_SHIFT
624 /* Store the entry */
625 str x13, [x6, x11, lsl #3]
635 * Builds count 2 MiB page table entry
637 * x7 = Type (0 = Device, 1 = Normal)
639 * x9 = PA start (trashed)
641 * x11, x12 and x13 are trashed
643 build_l2_block_pagetable:
645 * Build the L2 table entry.
647 /* Find the table index */
648 lsr x11, x8, #L2_SHIFT
649 and x11, x11, #Ln_ADDR_MASK
651 /* Build the L2 block entry */
653 orr x12, x12, #L2_BLOCK
654 orr x12, x12, #(ATTR_DEFAULT)
655 orr x12, x12, #(ATTR_S1_UXN)
657 /* Only use the output address bits */
658 lsr x9, x9, #L2_SHIFT
660 /* Set the physical address for this virtual address */
661 1: orr x13, x12, x9, lsl #L2_SHIFT
663 /* Store the entry */
664 str x13, [x6, x11, lsl #3]
676 /* Load the exception vectors */
677 ldr x2, =exception_vectors
680 /* Load ttbr0 and ttbr1 */
685 /* Clear the Monitor Debug System control register */
688 /* Invalidate the TLB */
697 * Setup TCR according to the PARange and ASIDBits fields
698 * from ID_AA64MMFR0_EL1 and the HAFDBS field from the
699 * ID_AA64MMFR1_EL1. More precisely, set TCR_EL1.AS
700 * to 1 only if the ASIDBits field equals 0b0010.
703 mrs x3, id_aa64mmfr0_el1
705 /* Copy the bottom 3 bits from id_aa64mmfr0_el1 into TCR.IPS */
706 bfi x2, x3, #(TCR_IPS_SHIFT), #(TCR_IPS_WIDTH)
707 and x3, x3, #(ID_AA64MMFR0_ASIDBits_MASK)
709 /* Check if the HW supports 16 bit ASIDS */
710 cmp x3, #(ID_AA64MMFR0_ASIDBits_16)
711 /* If so x3 == 1, else x3 == 0 */
713 /* Set TCR.AS with x3 */
714 bfi x2, x3, #(TCR_ASID_SHIFT), #(TCR_ASID_WIDTH)
717 * Check if the HW supports access flag and dirty state updates,
718 * and set TCR_EL1.HA and TCR_EL1.HD accordingly.
720 mrs x3, id_aa64mmfr1_el1
721 and x3, x3, #(ID_AA64MMFR1_HAFDBS_MASK)
724 orr x2, x2, #(TCR_HA)
729 orr x2, x2, #(TCR_HA | TCR_HD)
739 bic x1, x1, x3 /* Clear the required bits */
740 orr x1, x1, x2 /* Set the required bits */
748 .quad MAIR_ATTR(MAIR_DEVICE_nGnRnE, VM_MEMATTR_DEVICE) | \
749 MAIR_ATTR(MAIR_NORMAL_NC, VM_MEMATTR_UNCACHEABLE) | \
750 MAIR_ATTR(MAIR_NORMAL_WB, VM_MEMATTR_WRITE_BACK) | \
751 MAIR_ATTR(MAIR_NORMAL_WT, VM_MEMATTR_WRITE_THROUGH)
753 .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_TG1_4K | \
754 TCR_CACHE_ATTRS | TCR_SMP_ATTRS)
757 .quad (SCTLR_LSMAOE | SCTLR_nTLSMD | SCTLR_UCI | SCTLR_SPAN | \
758 SCTLR_nTWE | SCTLR_nTWI | SCTLR_UCT | SCTLR_DZE | \
759 SCTLR_I | SCTLR_SED | SCTLR_SA0 | SCTLR_SA | SCTLR_C | \
760 SCTLR_M | SCTLR_CP15BEN)
763 .quad (SCTLR_EE | SCTLR_EOE | SCTLR_IESB | SCTLR_WXN | SCTLR_UMA | \
770 //.section .init_pagetable
771 .align 12 /* 4KiB aligned */
773 * 6 initial tables (in the following order):
774 * L2 for kernel (High addresses)
777 * L1 bootstrap for user (Low addresses)
778 * L0 bootstrap for user
787 pagetable_l1_ttbr0_bootstrap:
789 pagetable_l0_ttbr0_boostrap:
794 .globl pagetable_dmap
796 .space PAGE_SIZE * DMAP_TABLES
804 .quad pagetable /* XXX: Keep page tables VA */
808 .space (PAGE_SIZE * KSTACK_PAGES)
817 mov x8, #SYS_sigreturn
820 /* sigreturn failed, exit */
826 /* This may be copied to the stack, keep it 16-byte aligned */
834 .quad esigcode - sigcode
836 ENTRY(aarch32_sigcode)
837 .word 0xe1a0000d // mov r0, sp
838 .word 0xe2800040 // add r0, r0, #SIGF_UC
839 .word 0xe59f700c // ldr r7, [pc, #12]
840 .word 0xef000000 // swi #0
841 .word 0xe59f7008 // ldr r7, [pc, #8]
842 .word 0xef000000 // swi #0
843 .word 0xeafffffa // b . - 16
850 .global sz_aarch32_sigcode
852 .quad aarch32_esigcode - aarch32_sigcode