2 * Copyright (c) 2012-2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include "opt_kstack_pages.h"
31 #include <sys/syscall.h>
32 #include <machine/asm.h>
33 #include <machine/armreg.h>
34 #include <machine/hypervisor.h>
35 #include <machine/param.h>
36 #include <machine/pte.h>
37 #include <machine/vm.h>
38 #include <machine/vmparam.h>
41 #define DMAP_TABLES ((DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS) >> L0_SHIFT)
44 .set kernbase, KERNBASE
47 /* U-Boot booti related constants. */
48 #if defined(LINUX_BOOT_ABI)
49 #ifndef UBOOT_IMAGE_OFFSET
50 #define UBOOT_IMAGE_OFFSET 0 /* Image offset from start of */
51 #endif /* 2 MiB page */
53 #ifndef UBOOT_IMAGE_SIZE /* Total size of image */
54 #define UBOOT_IMAGE_SIZE _end - _start
57 #ifndef UBOOT_IMAGE_FLAGS
58 #define UBOOT_IMAGE_FLAGS 0 /* LE kernel, unspecified */
59 #endif /* page size */
60 #endif /* defined(LINUX_BOOT_ABI) */
64 * MMU on with an identity map, or off
67 * We are loaded at a 2MiB aligned address
73 #if defined(LINUX_BOOT_ABI)
74 /* U-boot image header */
77 .quad UBOOT_IMAGE_OFFSET /* Image offset in 2 MiB page, LE */
78 .quad UBOOT_IMAGE_SIZE /* Image size, LE */
79 .quad UBOOT_IMAGE_FLAGS /* Flags for kernel. LE */
80 .quad 0 /* Reserved */
81 .quad 0 /* Reserved */
82 .quad 0 /* Reserved */
83 .long 0x644d5241 /* Magic "ARM\x64", LE */
84 .long 0 /* Reserved for PE COFF offset*/
86 #endif /* defined(LINUX_BOOT_ABI) */
92 * Disable the MMU. We may have entered the kernel with it on and
93 * will need to update the tables later. If this has been set up
94 * with anything other than a VA == PA map then this will fail,
95 * but in this case the code to find where we are running from
96 * would have also failed.
104 /* Set the context id */
105 msr contextidr_el1, xzr
107 /* Get the virt -> phys offset */
113 * x28 = Our physical load address
116 /* Create the page tables */
122 * x26 = Kernel L1 table
129 /* Load the new ttbr0 pagetable */
130 adr x27, pagetable_l0_ttbr0
132 /* Jump to the virtual address space */
137 /* Set up the stack */
138 adr x25, initstack_end
140 sub sp, sp, #PCB_SIZE
150 /* Backup the module pointer */
153 /* Make the page table base a virtual address */
157 sub sp, sp, #BOOTPARAMS_SIZE
160 /* Degate the delda so it is VA -> PA */
163 str x1, [x0, #BP_MODULEP]
164 str x26, [x0, #BP_KERN_L1PT]
165 str x29, [x0, #BP_KERN_DELTA]
167 str x25, [x0, #BP_KERN_STACK]
168 str x24, [x0, #BP_KERN_L0PT]
169 str x23, [x0, #BP_BOOT_EL]
170 str x27, [x0, 40] /* kern_ttbr0 */
172 /* trace back starts here */
174 /* Branch to C code */
176 /* We are done with the boot params */
177 add sp, sp, #BOOTPARAMS_SIZE
180 /* We should not get here */
193 * mpentry(unsigned long)
195 * Called by a core when it is being brought online.
196 * The data in x0 is passed straight to init_secondary.
199 /* Disable interrupts */
205 /* Set the context id */
206 msr contextidr_el1, xzr
208 /* Load the kernel page table */
209 adr x24, pagetable_l0_ttbr1
210 /* Load the identity page table */
211 adr x27, pagetable_l0_ttbr0_boostrap
216 /* Load the new ttbr0 pagetable */
217 adr x27, pagetable_l0_ttbr0
219 /* Jump to the virtual address space */
220 ldr x15, =mp_virtdone
224 /* Start using the AP boot stack */
229 /* Load the kernel ttbr0 pagetable */
233 /* Invalidate the TLB */
243 * If we are started in EL2, configure the required hypervisor
244 * registers and drop to EL1.
253 /* Configure the Hypervisor */
257 /* Load the Virtualization Process ID Register */
261 /* Load the Virtualization Multiprocess ID Register */
265 /* Set the bits that need to be 1 in sctlr_el1 */
269 /* Don't trap to EL2 for exceptions */
273 /* Don't trap to EL2 for CP15 traps */
276 /* Enable access to the physical timers at EL1 */
278 orr x2, x2, #(CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN)
281 /* Set the counter offset to a known value */
284 /* Hypervisor trap functions */
288 mov x2, #(PSR_F | PSR_I | PSR_A | PSR_D | PSR_M_EL1h)
291 /* Configure GICv3 CPU interface */
292 mrs x2, id_aa64pfr0_el1
293 /* Extract GIC bits from the register */
294 ubfx x2, x2, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_BITS
295 /* GIC[3:0] == 0001 - GIC CPU interface via special regs. supported */
296 cmp x2, #(ID_AA64PFR0_GIC_CPUIF_EN >> ID_AA64PFR0_GIC_SHIFT)
300 orr x2, x2, #ICC_SRE_EL2_EN /* Enable access from insecure EL1 */
301 orr x2, x2, #ICC_SRE_EL2_SRE /* Enable system registers */
305 /* Set the address to return to our return address */
321 VECT_EMPTY /* Synchronous EL2t */
322 VECT_EMPTY /* IRQ EL2t */
323 VECT_EMPTY /* FIQ EL2t */
324 VECT_EMPTY /* Error EL2t */
326 VECT_EMPTY /* Synchronous EL2h */
327 VECT_EMPTY /* IRQ EL2h */
328 VECT_EMPTY /* FIQ EL2h */
329 VECT_EMPTY /* Error EL2h */
331 VECT_EMPTY /* Synchronous 64-bit EL1 */
332 VECT_EMPTY /* IRQ 64-bit EL1 */
333 VECT_EMPTY /* FIQ 64-bit EL1 */
334 VECT_EMPTY /* Error 64-bit EL1 */
336 VECT_EMPTY /* Synchronous 32-bit EL1 */
337 VECT_EMPTY /* IRQ 32-bit EL1 */
338 VECT_EMPTY /* FIQ 32-bit EL1 */
339 VECT_EMPTY /* Error 32-bit EL1 */
342 * Get the delta between the physical address we were loaded to and the
343 * virtual address we expect to run from. This is used when building the
344 * initial page table.
347 /* Load the physical address of virt_map */
349 /* Load the virtual address of virt_map stored in virt_map */
351 /* Find PA - VA as PA' = VA' - VA + PA = VA' + (PA - VA) = VA' + x29 */
353 /* Find the load address for the kernel */
363 * This builds the page tables containing the identity map, and the kernel
367 * We were loaded to an address that is on a 2MiB boundary
368 * All the memory must not cross a 1GiB boundaty
369 * x28 contains the physical address we were loaded from
371 * TODO: This is out of date.
372 * There are at least 5 pages before that address for the page tables
373 * The pages used are:
374 * - The Kernel L2 table
375 * - The Kernel L1 table
376 * - The Kernel L0 table (TTBR1)
377 * - The identity (PA = VA) L1 table
378 * - The identity (PA = VA) L0 table (TTBR0)
379 * - The DMAP L1 tables
382 /* Save the Link register */
385 /* Clean the page table */
388 adr x27, pagetable_end
390 stp xzr, xzr, [x6], #16
391 stp xzr, xzr, [x6], #16
392 stp xzr, xzr, [x6], #16
393 stp xzr, xzr, [x6], #16
398 * Build the TTBR1 maps.
401 /* Find the size of the kernel */
404 #if defined(LINUX_BOOT_ABI)
405 /* X19 is used as 'map FDT data' flag */
408 /* No modules or FDT pointer ? */
412 * Test if x0 points to modules descriptor(virtual address) or
413 * to FDT (physical address)
415 cmp x0, x6 /* x6 is #(KERNBASE) */
419 /* Booted with modules pointer */
420 /* Find modulep - begin */
422 /* Add two 2MiB pages for the module data and round up */
423 ldr x7, =(3 * L2_SIZE - 1)
427 #if defined(LINUX_BOOT_ABI)
429 /* Booted by U-Boot booti with FDT data */
430 /* Set 'map FDT data' flag */
434 /* Booted by U-Boot booti without FTD data */
435 /* Find the end - begin */
440 * Add one 2MiB page for copy of FDT data (maximum FDT size),
441 * one for metadata and round up
443 ldr x7, =(3 * L2_SIZE - 1)
448 /* Get the number of l2 pages to allocate, rounded down */
449 lsr x10, x8, #(L2_SHIFT)
451 /* Create the kernel space L2 table */
453 mov x7, #VM_MEMATTR_WRITE_BACK
454 mov x8, #(KERNBASE & L2_BLOCK_MASK)
456 bl build_l2_block_pagetable
458 /* Move to the l1 table */
459 add x26, x26, #PAGE_SIZE
461 /* Link the l1 -> l2 table */
466 /* Move to the l0 table */
467 add x24, x26, #PAGE_SIZE
469 /* Link the l0 -> l1 table */
475 /* Link the DMAP tables */
476 ldr x8, =DMAP_MIN_ADDRESS
477 adr x9, pagetable_dmap;
478 mov x10, #DMAP_TABLES
482 * Build the TTBR0 maps. As TTBR0 maps, they must specify ATTR_S1_nG.
483 * They are only needed early on, so the VA = PA map is uncached.
485 add x27, x24, #PAGE_SIZE
487 mov x6, x27 /* The initial page table */
488 #if defined(SOCDEV_PA) && defined(SOCDEV_VA)
489 /* Create a table for the UART */
490 mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_DEVICE))
491 mov x8, #(SOCDEV_VA) /* VA start */
492 mov x9, #(SOCDEV_PA) /* PA start */
494 bl build_l1_block_pagetable
497 #if defined(LINUX_BOOT_ABI)
501 /* Create the identity mapping for FDT data (2 MiB max) */
502 mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
504 mov x8, x0 /* VA start (== PA start) */
506 bl build_l1_block_pagetable
511 /* Create the VA = PA map */
512 mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
514 mov x8, x9 /* VA start (== PA start) */
516 bl build_l1_block_pagetable
518 /* Move to the l0 table */
519 add x27, x27, #PAGE_SIZE
521 /* Link the l0 -> l1 table */
527 /* Restore the Link register */
532 * Builds an L0 -> L1 table descriptor
534 * This is a link for a 512GiB block of memory with up to 1GiB regions mapped
535 * within it by build_l1_block_pagetable.
538 * x8 = Virtual Address
539 * x9 = L1 PA (trashed)
541 * x11, x12 and x13 are trashed
545 * Link an L0 -> L1 table entry.
547 /* Find the table index */
548 lsr x11, x8, #L0_SHIFT
549 and x11, x11, #L0_ADDR_MASK
551 /* Build the L0 block entry */
554 /* Only use the output address bits */
555 lsr x9, x9, #PAGE_SHIFT
556 1: orr x13, x12, x9, lsl #PAGE_SHIFT
558 /* Store the entry */
559 str x13, [x6, x11, lsl #3]
569 * Builds an L1 -> L2 table descriptor
571 * This is a link for a 1GiB block of memory with up to 2MiB regions mapped
572 * within it by build_l2_block_pagetable.
575 * x8 = Virtual Address
576 * x9 = L2 PA (trashed)
577 * x11, x12 and x13 are trashed
581 * Link an L1 -> L2 table entry.
583 /* Find the table index */
584 lsr x11, x8, #L1_SHIFT
585 and x11, x11, #Ln_ADDR_MASK
587 /* Build the L1 block entry */
590 /* Only use the output address bits */
591 lsr x9, x9, #PAGE_SHIFT
592 orr x13, x12, x9, lsl #PAGE_SHIFT
594 /* Store the entry */
595 str x13, [x6, x11, lsl #3]
600 * Builds count 1 GiB page table entry
602 * x7 = Variable lower block attributes
604 * x9 = PA start (trashed)
606 * x11, x12 and x13 are trashed
608 build_l1_block_pagetable:
610 * Build the L1 table entry.
612 /* Find the table index */
613 lsr x11, x8, #L1_SHIFT
614 and x11, x11, #Ln_ADDR_MASK
616 /* Build the L1 block entry */
617 orr x12, x7, #L1_BLOCK
618 orr x12, x12, #(ATTR_DEFAULT)
620 /* Only use the output address bits */
621 lsr x9, x9, #L1_SHIFT
623 /* Set the physical address for this virtual address */
624 1: orr x13, x12, x9, lsl #L1_SHIFT
626 /* Store the entry */
627 str x13, [x6, x11, lsl #3]
637 * Builds count 2 MiB page table entry
639 * x7 = Type (0 = Device, 1 = Normal)
641 * x9 = PA start (trashed)
643 * x11, x12 and x13 are trashed
645 build_l2_block_pagetable:
647 * Build the L2 table entry.
649 /* Find the table index */
650 lsr x11, x8, #L2_SHIFT
651 and x11, x11, #Ln_ADDR_MASK
653 /* Build the L2 block entry */
655 orr x12, x12, #L2_BLOCK
656 orr x12, x12, #(ATTR_DEFAULT)
657 orr x12, x12, #(ATTR_S1_UXN)
659 /* Only use the output address bits */
660 lsr x9, x9, #L2_SHIFT
662 /* Set the physical address for this virtual address */
663 1: orr x13, x12, x9, lsl #L2_SHIFT
665 /* Store the entry */
666 str x13, [x6, x11, lsl #3]
678 /* Load the exception vectors */
679 ldr x2, =exception_vectors
682 /* Load ttbr0 and ttbr1 */
687 /* Clear the Monitor Debug System control register */
690 /* Invalidate the TLB */
699 * Setup TCR according to the PARange and ASIDBits fields
700 * from ID_AA64MMFR0_EL1 and the HAFDBS field from the
701 * ID_AA64MMFR1_EL1. More precisely, set TCR_EL1.AS
702 * to 1 only if the ASIDBits field equals 0b0010.
705 mrs x3, id_aa64mmfr0_el1
707 /* Copy the bottom 3 bits from id_aa64mmfr0_el1 into TCR.IPS */
708 bfi x2, x3, #(TCR_IPS_SHIFT), #(TCR_IPS_WIDTH)
709 and x3, x3, #(ID_AA64MMFR0_ASIDBits_MASK)
711 /* Check if the HW supports 16 bit ASIDS */
712 cmp x3, #(ID_AA64MMFR0_ASIDBits_16)
713 /* If so x3 == 1, else x3 == 0 */
715 /* Set TCR.AS with x3 */
716 bfi x2, x3, #(TCR_ASID_SHIFT), #(TCR_ASID_WIDTH)
719 * Check if the HW supports access flag and dirty state updates,
720 * and set TCR_EL1.HA and TCR_EL1.HD accordingly.
722 mrs x3, id_aa64mmfr1_el1
723 and x3, x3, #(ID_AA64MMFR1_HAFDBS_MASK)
726 orr x2, x2, #(TCR_HA)
731 orr x2, x2, #(TCR_HA | TCR_HD)
741 bic x1, x1, x3 /* Clear the required bits */
742 orr x1, x1, x2 /* Set the required bits */
750 .quad MAIR_ATTR(MAIR_DEVICE_nGnRnE, VM_MEMATTR_DEVICE) | \
751 MAIR_ATTR(MAIR_NORMAL_NC, VM_MEMATTR_UNCACHEABLE) | \
752 MAIR_ATTR(MAIR_NORMAL_WB, VM_MEMATTR_WRITE_BACK) | \
753 MAIR_ATTR(MAIR_NORMAL_WT, VM_MEMATTR_WRITE_THROUGH)
755 .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_TG1_4K | \
756 TCR_CACHE_ATTRS | TCR_SMP_ATTRS)
759 .quad (SCTLR_LSMAOE | SCTLR_nTLSMD | SCTLR_UCI | SCTLR_SPAN | \
760 SCTLR_nTWE | SCTLR_nTWI | SCTLR_UCT | SCTLR_DZE | \
761 SCTLR_I | SCTLR_SED | SCTLR_SA0 | SCTLR_SA | SCTLR_C | \
762 SCTLR_M | SCTLR_CP15BEN)
765 .quad (SCTLR_EE | SCTLR_EOE | SCTLR_IESB | SCTLR_WXN | SCTLR_UMA | \
772 //.section .init_pagetable
773 .align 12 /* 4KiB aligned */
775 * 6 initial tables (in the following order):
776 * L2 for kernel (High addresses)
779 * L1 bootstrap for user (Low addresses)
780 * L0 bootstrap for user
789 pagetable_l1_ttbr0_bootstrap:
791 pagetable_l0_ttbr0_boostrap:
796 .globl pagetable_dmap
798 .space PAGE_SIZE * DMAP_TABLES
806 .quad pagetable /* XXX: Keep page tables VA */
810 .space (PAGE_SIZE * KSTACK_PAGES)
819 mov x8, #SYS_sigreturn
822 /* sigreturn failed, exit */
828 /* This may be copied to the stack, keep it 16-byte aligned */
836 .quad esigcode - sigcode
838 ENTRY(aarch32_sigcode)
839 .word 0xe1a0000d // mov r0, sp
840 .word 0xe2800040 // add r0, r0, #SIGF_UC
841 .word 0xe59f700c // ldr r7, [pc, #12]
842 .word 0xef000000 // swi #0
843 .word 0xe59f7008 // ldr r7, [pc, #8]
844 .word 0xef000000 // swi #0
845 .word 0xeafffffa // b . - 16
852 .global sz_aarch32_sigcode
854 .quad aarch32_esigcode - aarch32_sigcode