2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include "opt_kstack_pages.h"
33 #include "opt_platform.h"
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
48 #include <sys/sched.h>
53 #include <vm/vm_extern.h>
54 #include <vm/vm_kern.h>
56 #include <machine/machdep.h>
57 #include <machine/intr.h>
58 #include <machine/smp.h>
60 #include <machine/vfp.h>
64 #include <contrib/dev/acpica/include/acpi.h>
65 #include <dev/acpica/acpivar.h>
69 #include <dev/ofw/openfirm.h>
70 #include <dev/ofw/ofw_bus.h>
71 #include <dev/ofw/ofw_bus_subr.h>
72 #include <dev/ofw/ofw_cpu.h>
75 #include <dev/psci/psci.h>
79 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
80 /* don't panic if one fails to start */
81 static uint32_t mp_quirks;
88 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
89 { "arm,fvp-base", MP_QUIRK_CPULIST },
90 /* This is incorrect in some DTS files */
91 { "arm,vfp-base", MP_QUIRK_CPULIST },
96 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
97 typedef void intr_ipi_handler_t(void *);
99 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
101 intr_ipi_handler_t * ii_handler;
102 void * ii_handler_arg;
103 intr_ipi_send_t * ii_send;
105 char ii_name[INTR_IPI_NAMELEN];
109 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
111 static struct intr_ipi *intr_ipi_lookup(u_int);
112 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
115 static device_identify_t arm64_cpu_identify;
116 static device_probe_t arm64_cpu_probe;
117 static device_attach_t arm64_cpu_attach;
119 static void ipi_ast(void *);
120 static void ipi_hardclock(void *);
121 static void ipi_preempt(void *);
122 static void ipi_rendezvous(void *);
123 static void ipi_stop(void *);
125 struct pcb stoppcbs[MAXCPU];
127 static device_t cpu_list[MAXCPU];
130 * Not all systems boot from the first CPU in the device tree. To work around
131 * this we need to find which CPU we have booted from so when we later
132 * enable the secondary CPUs we skip this one.
134 static int cpu0 = -1;
136 void mpentry(unsigned long cpuid);
137 void init_secondary(uint64_t);
139 /* Synchronize AP startup. */
140 static struct mtx ap_boot_mtx;
142 /* Stacks for AP initialization, discarded once idle threads are started. */
144 static void *bootstacks[MAXCPU];
146 /* Count of started APs, used to synchronize access to bootstack. */
147 static volatile int aps_started;
149 /* Set to 1 once we're ready to let the APs out of the pen. */
150 static volatile int aps_ready;
152 /* Temporary variables for init_secondary() */
153 void *dpcpu[MAXCPU - 1];
155 static device_method_t arm64_cpu_methods[] = {
156 /* Device interface */
157 DEVMETHOD(device_identify, arm64_cpu_identify),
158 DEVMETHOD(device_probe, arm64_cpu_probe),
159 DEVMETHOD(device_attach, arm64_cpu_attach),
164 static devclass_t arm64_cpu_devclass;
165 static driver_t arm64_cpu_driver = {
171 DRIVER_MODULE(arm64_cpu, cpu, arm64_cpu_driver, arm64_cpu_devclass, 0, 0);
174 arm64_cpu_identify(driver_t *driver, device_t parent)
177 if (device_find_child(parent, "arm64_cpu", -1) != NULL)
179 if (BUS_ADD_CHILD(parent, 0, "arm64_cpu", -1) == NULL)
180 device_printf(parent, "add child failed\n");
184 arm64_cpu_probe(device_t dev)
188 cpuid = device_get_unit(dev);
189 if (cpuid >= MAXCPU || cpuid > mp_maxid)
197 arm64_cpu_attach(device_t dev)
204 cpuid = device_get_unit(dev);
206 if (cpuid >= MAXCPU || cpuid > mp_maxid)
208 KASSERT(cpu_list[cpuid] == NULL, ("Already have cpu %u", cpuid));
210 reg = cpu_get_cpuid(dev, ®_size);
215 device_printf(dev, "register <");
216 for (i = 0; i < reg_size; i++)
217 printf("%s%x", (i == 0) ? "" : " ", reg[i]);
221 /* Set the device to start it later */
222 cpu_list[cpuid] = dev;
228 release_aps(void *dummy __unused)
232 /* Only release CPUs if they exist */
236 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
237 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
238 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
239 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
240 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
241 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
243 atomic_store_rel_int(&aps_ready, 1);
244 /* Wake up the other CPUs */
250 printf("Release APs...");
253 for (i = 0; i < 2000; i++) {
259 * Don't time out while we are making progress. Some large
260 * systems can take a while to start all CPUs.
262 if (smp_cpus > started) {
269 printf("APs not started\n");
271 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
274 init_secondary(uint64_t cpu)
278 pcpup = &__pcpu[cpu];
280 * Set the pcpu pointer with a backup in tpidr_el1 to be
281 * loaded when entering the kernel from userland.
285 "msr tpidr_el1, %0" :: "r"(pcpup));
287 /* Signal the BSP and spin until it has released all APs. */
288 atomic_add_int(&aps_started, 1);
289 while (!atomic_load_int(&aps_ready))
290 __asm __volatile("wfe");
292 /* Initialize curthread */
293 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
294 pcpup->pc_curthread = pcpup->pc_idlethread;
297 * Identify current CPU. This is necessary to setup
298 * affinity registers and to provide support for
299 * runtime chip identification.
302 install_cpu_errata();
304 intr_pic_init_secondary();
306 /* Start per-CPU event timers. */
316 mtx_lock_spin(&ap_boot_mtx);
317 atomic_add_rel_32(&smp_cpus, 1);
318 if (smp_cpus == mp_ncpus) {
319 /* enable IPI's, tlb shootdown, freezes etc */
320 atomic_store_rel_int(&smp_started, 1);
322 mtx_unlock_spin(&ap_boot_mtx);
325 * Assert that smp_after_idle_runnable condition is reasonable.
327 MPASS(PCPU_GET(curpcb) == NULL);
329 /* Enter the scheduler */
332 panic("scheduler returned us to init_secondary");
337 smp_after_idle_runnable(void *arg __unused)
342 for (cpu = 1; cpu < mp_ncpus; cpu++) {
343 if (bootstacks[cpu] != NULL) {
345 while ((void *)atomic_load_ptr(&pc->pc_curpcb) == NULL)
347 kmem_free((vm_offset_t)bootstacks[cpu], PAGE_SIZE);
351 SYSINIT(smp_after_idle_runnable, SI_SUB_SMP, SI_ORDER_ANY,
352 smp_after_idle_runnable, NULL);
355 * Send IPI thru interrupt controller.
358 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
361 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
362 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
366 * Setup IPI handler on interrupt controller.
371 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
374 struct intr_irqsrc *isrc;
378 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
379 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
381 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
385 isrc->isrc_handlers++;
387 ii = intr_ipi_lookup(ipi);
388 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
390 ii->ii_handler = hand;
391 ii->ii_handler_arg = arg;
392 ii->ii_send = pic_ipi_send;
393 ii->ii_send_arg = isrc;
394 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
395 ii->ii_count = intr_ipi_setup_counters(name);
399 intr_ipi_send(cpuset_t cpus, u_int ipi)
403 ii = intr_ipi_lookup(ipi);
404 if (ii->ii_count == NULL)
405 panic("%s: not setup IPI %u", __func__, ipi);
407 ii->ii_send(ii->ii_send_arg, cpus, ipi);
411 ipi_ast(void *dummy __unused)
414 CTR0(KTR_SMP, "IPI_AST");
418 ipi_hardclock(void *dummy __unused)
421 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
426 ipi_preempt(void *dummy __unused)
428 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
429 sched_preempt(curthread);
433 ipi_rendezvous(void *dummy __unused)
436 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
437 smp_rendezvous_action();
441 ipi_stop(void *dummy __unused)
445 CTR0(KTR_SMP, "IPI_STOP");
447 cpu = PCPU_GET(cpuid);
448 savectx(&stoppcbs[cpu]);
450 /* Indicate we are stopped */
451 CPU_SET_ATOMIC(cpu, &stopped_cpus);
453 /* Wait for restart */
454 while (!CPU_ISSET(cpu, &started_cpus))
457 CPU_CLR_ATOMIC(cpu, &started_cpus);
458 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
459 CTR0(KTR_SMP, "IPI_STOP (restart)");
466 return (smp_topo_none());
469 /* Determine if we running MP machine */
474 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
479 start_cpu(u_int id, uint64_t target_cpu)
486 /* Check we are able to start this cpu */
490 KASSERT(id < MAXCPU, ("Too many CPUs"));
492 /* We are already running on cpu 0 */
497 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
498 * CPUs ordered as they are likely grouped into clusters so it can be
499 * useful to keep that property, e.g. for the GICv3 driver to send
500 * an IPI to all CPUs in the cluster.
504 cpuid += mp_maxid + 1;
507 pcpup = &__pcpu[cpuid];
508 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
510 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
511 dpcpu_init(dpcpu[cpuid - 1], cpuid);
513 bootstacks[cpuid] = (void *)kmem_malloc(PAGE_SIZE, M_WAITOK | M_ZERO);
515 naps = atomic_load_int(&aps_started);
516 bootstack = (char *)bootstacks[cpuid] + PAGE_SIZE;
518 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
519 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
520 err = psci_cpu_on(target_cpu, pa, cpuid);
521 if (err != PSCI_RETVAL_SUCCESS) {
523 * Panic here if INVARIANTS are enabled and PSCI failed to
524 * start the requested CPU. psci_cpu_on() returns PSCI_MISSING
525 * to indicate we are unable to use it to start the given CPU.
527 KASSERT(err == PSCI_MISSING ||
528 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
529 ("Failed to start CPU %u (%lx), error %d\n",
530 id, target_cpu, err));
533 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
534 dpcpu[cpuid - 1] = NULL;
535 kmem_free((vm_offset_t)bootstacks[cpuid], PAGE_SIZE);
536 bootstacks[cpuid] = NULL;
539 /* Notify the user that the CPU failed to start */
540 printf("Failed to start CPU %u (%lx), error %d\n",
541 id, target_cpu, err);
543 /* Wait for the AP to switch to its boot stack. */
544 while (atomic_load_int(&aps_started) < naps + 1)
546 CPU_SET(cpuid, &all_cpus);
554 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
556 ACPI_MADT_GENERIC_INTERRUPT *intr;
560 switch(entry->Type) {
561 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
562 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
565 start_cpu(id, intr->ArmMpidr);
566 __pcpu[id].pc_acpi_id = intr->Uid;
577 ACPI_TABLE_MADT *madt;
581 physaddr = acpi_find_table(ACPI_SIG_MADT);
585 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
587 printf("Unable to map the MADT, not starting APs\n");
592 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
593 madt_handler, &cpuid);
595 acpi_unmap_table(madt);
598 acpi_pxm_set_cpu_locality();
605 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
611 if (addr_size == 2) {
613 target_cpu |= reg[1];
616 if (!start_cpu(id, target_cpu))
619 /* Try to read the numa node of this cpu */
620 if (vm_ndomains == 1 ||
621 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
623 __pcpu[id].pc_domain = domain;
624 if (domain < MAXMEMDOM)
625 CPU_SET(id, &cpuset_domain[domain]);
631 /* Initialize and fire up non-boot processors */
640 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
642 CPU_SET(0, &all_cpus);
644 switch(arm64_bus_method) {
647 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
654 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
655 if (ofw_bus_node_is_compatible(node,
656 fdt_quirks[i].compat) != 0) {
657 mp_quirks = fdt_quirks[i].quirks;
660 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
661 ofw_cpu_early_foreach(cpu_init_fdt, true);
669 /* Introduce rest of cores to the world */
671 cpu_mp_announce(void)
677 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
679 ACPI_MADT_GENERIC_INTERRUPT *intr;
683 switch(entry->Type) {
684 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
685 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
687 mpidr_reg = READ_SPECIALREG(mpidr_el1);
688 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
701 ACPI_TABLE_MADT *madt;
705 physaddr = acpi_find_table(ACPI_SIG_MADT);
709 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
711 printf("Unable to map the MADT, not starting APs\n");
716 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
717 cpu_count_acpi_handler, &cores);
719 acpi_unmap_table(madt);
727 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
729 uint64_t mpidr_fdt, mpidr_reg;
733 if (addr_size == 2) {
738 mpidr_reg = READ_SPECIALREG(mpidr_el1);
740 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
749 cpu_mp_setmaxid(void)
751 #if defined(DEV_ACPI) || defined(FDT)
755 switch(arm64_bus_method) {
758 cores = cpu_count_acpi();
760 cores = MIN(cores, MAXCPU);
762 printf("Found %d CPUs in the ACPI tables\n",
765 mp_maxid = cores - 1;
772 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
774 cores = MIN(cores, MAXCPU);
776 printf("Found %d CPUs in the device tree\n",
779 mp_maxid = cores - 1;
789 printf("No CPU data, limiting to 1 core\n");
797 static struct intr_ipi *
798 intr_ipi_lookup(u_int ipi)
801 if (ipi >= INTR_IPI_COUNT)
802 panic("%s: no such IPI %u", __func__, ipi);
804 return (&ipi_sources[ipi]);
808 * interrupt controller dispatch function for IPIs. It should
809 * be called straight from the interrupt controller, when associated
810 * interrupt source is learned. Or from anybody who has an interrupt
814 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
819 ii = intr_ipi_lookup(ipi);
820 if (ii->ii_count == NULL)
821 panic("%s: not setup IPI %u", __func__, ipi);
823 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
826 * Supply ipi filter with trapframe argument
827 * if none is registered.
829 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
835 * Map IPI into interrupt controller.
840 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
845 if (ipi >= INTR_IPI_COUNT)
846 panic("%s: no such IPI %u", __func__, ipi);
848 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
850 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
851 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
852 isrc->isrc_nspc_num = ipi_next_num;
854 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
856 isrc->isrc_dev = intr_irq_root_dev;
863 * Setup IPI handler to interrupt source.
865 * Note that there could be more ways how to send and receive IPIs
866 * on a platform like fast interrupts for example. In that case,
867 * one can call this function with ASIF_NOALLOC flag set and then
868 * call intr_ipi_dispatch() when appropriate.
873 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
874 void *arg, u_int flags)
876 struct intr_irqsrc *isrc;
882 isrc = intr_ipi_lookup(ipi);
883 if (isrc->isrc_ipifilter != NULL)
886 if ((flags & AISHF_NOALLOC) == 0) {
887 error = ipi_map(isrc, ipi);
892 isrc->isrc_ipifilter = filter;
893 isrc->isrc_arg = arg;
894 isrc->isrc_handlers = 1;
895 isrc->isrc_count = intr_ipi_setup_counters(name);
896 isrc->isrc_index = 0; /* it should not be used in IPI case */
898 if (isrc->isrc_dev != NULL) {
899 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
900 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
908 ipi_all_but_self(u_int ipi)
913 CPU_CLR(PCPU_GET(cpuid), &cpus);
914 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
915 intr_ipi_send(cpus, ipi);
919 ipi_cpu(int cpu, u_int ipi)
926 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
927 intr_ipi_send(cpus, ipi);
931 ipi_selected(cpuset_t cpus, u_int ipi)
934 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
935 intr_ipi_send(cpus, ipi);