2 * Copyright (c) 2015 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include "opt_kstack_pages.h"
32 #include "opt_platform.h"
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/module.h>
44 #include <sys/mutex.h>
46 #include <sys/sched.h>
51 #include <vm/vm_extern.h>
52 #include <vm/vm_kern.h>
54 #include <machine/debug_monitor.h>
55 #include <machine/intr.h>
56 #include <machine/smp.h>
58 #include <machine/vfp.h>
62 #include <dev/ofw/openfirm.h>
63 #include <dev/ofw/ofw_cpu.h>
66 #include <dev/psci/psci.h>
68 boolean_t ofw_cpu_reg(phandle_t node, u_int, cell_t *);
70 extern struct pcpu __pcpu[];
79 static device_identify_t arm64_cpu_identify;
80 static device_probe_t arm64_cpu_probe;
81 static device_attach_t arm64_cpu_attach;
83 static int ipi_handler(void *arg);
85 struct mtx ap_boot_mtx;
86 struct pcb stoppcbs[MAXCPU];
89 static uint32_t cpu_reg[MAXCPU][2];
91 static device_t cpu_list[MAXCPU];
93 void mpentry(unsigned long cpuid);
94 void init_secondary(uint64_t);
96 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
98 /* Set to 1 once we're ready to let the APs out of the pen. */
99 volatile int aps_ready = 0;
101 /* Temporary variables for init_secondary() */
102 void *dpcpu[MAXCPU - 1];
104 static device_method_t arm64_cpu_methods[] = {
105 /* Device interface */
106 DEVMETHOD(device_identify, arm64_cpu_identify),
107 DEVMETHOD(device_probe, arm64_cpu_probe),
108 DEVMETHOD(device_attach, arm64_cpu_attach),
113 static devclass_t arm64_cpu_devclass;
114 static driver_t arm64_cpu_driver = {
120 DRIVER_MODULE(arm64_cpu, cpu, arm64_cpu_driver, arm64_cpu_devclass, 0, 0);
123 arm64_cpu_identify(driver_t *driver, device_t parent)
126 if (device_find_child(parent, "arm64_cpu", -1) != NULL)
128 if (BUS_ADD_CHILD(parent, 0, "arm64_cpu", -1) == NULL)
129 device_printf(parent, "add child failed\n");
133 arm64_cpu_probe(device_t dev)
137 cpuid = device_get_unit(dev);
138 if (cpuid >= MAXCPU || cpuid > mp_maxid)
146 arm64_cpu_attach(device_t dev)
153 cpuid = device_get_unit(dev);
155 if (cpuid >= MAXCPU || cpuid > mp_maxid)
157 KASSERT(cpu_list[cpuid] == NULL, ("Already have cpu %u", cpuid));
159 reg = cpu_get_cpuid(dev, ®_size);
164 device_printf(dev, "register <");
165 for (i = 0; i < reg_size; i++)
166 printf("%s%x", (i == 0) ? "" : " ", reg[i]);
170 /* Set the device to start it later */
171 cpu_list[cpuid] = dev;
177 release_aps(void *dummy __unused)
181 /* Setup the IPI handler */
182 for (i = 0; i < COUNT_IPI; i++)
183 arm_setup_ipihandler(ipi_handler, i);
185 atomic_store_rel_int(&aps_ready, 1);
186 /* Wake up the other CPUs */
187 __asm __volatile("sev");
189 printf("Release APs\n");
191 for (i = 0; i < 2000; i++) {
193 for (cpu = 0; cpu <= mp_maxid; cpu++) {
196 print_cpu_features(cpu);
203 printf("APs not started\n");
205 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
208 init_secondary(uint64_t cpu)
213 pcpup = &__pcpu[cpu];
215 * Set the pcpu pointer with a backup in tpidr_el1 to be
216 * loaded when entering the kernel from userland.
220 "msr tpidr_el1, %0" :: "r"(pcpup));
222 /* Spin until the BSP releases the APs */
224 __asm __volatile("wfe");
226 /* Initialize curthread */
227 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
228 pcpup->pc_curthread = pcpup->pc_idlethread;
229 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
232 * Identify current CPU. This is necessary to setup
233 * affinity registers and to provide support for
234 * runtime chip identification.
238 /* Configure the interrupt controller */
239 arm_init_secondary();
241 for (i = 0; i < COUNT_IPI; i++)
244 /* Start per-CPU event timers. */
253 /* Enable interrupts */
256 mtx_lock_spin(&ap_boot_mtx);
258 atomic_add_rel_32(&smp_cpus, 1);
260 if (smp_cpus == mp_ncpus) {
261 /* enable IPI's, tlb shootdown, freezes etc */
262 atomic_store_rel_int(&smp_started, 1);
265 mtx_unlock_spin(&ap_boot_mtx);
267 /* Enter the scheduler */
270 panic("scheduler returned us to init_secondary");
275 ipi_handler(void *arg)
279 arg = (void *)((uintptr_t)arg & ~(1 << 16));
280 KASSERT((uintptr_t)arg < COUNT_IPI,
281 ("Invalid IPI %ju", (uintptr_t)arg));
283 cpu = PCPU_GET(cpuid);
284 ipi = (uintptr_t)arg;
288 CTR0(KTR_SMP, "IPI_AST");
291 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
292 sched_preempt(curthread);
295 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
296 smp_rendezvous_action();
300 CTR0(KTR_SMP, (ipi == IPI_STOP) ? "IPI_STOP" : "IPI_STOP_HARD");
301 savectx(&stoppcbs[cpu]);
303 /* Indicate we are stopped */
304 CPU_SET_ATOMIC(cpu, &stopped_cpus);
306 /* Wait for restart */
307 while (!CPU_ISSET(cpu, &started_cpus))
310 CPU_CLR_ATOMIC(cpu, &started_cpus);
311 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
312 CTR0(KTR_SMP, "IPI_STOP (restart)");
315 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
319 panic("Unknown IPI %#0x on cpu %d", ipi, curcpu);
322 return (FILTER_HANDLED);
329 return (smp_topo_none());
332 /* Determine if we running MP machine */
337 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
343 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
350 /* Check we are able to start this cpu */
354 KASSERT(id < MAXCPU, ("Too mant CPUs"));
356 KASSERT(addr_size == 1 || addr_size == 2, ("Invalid register size"));
358 cpu_reg[id][0] = reg[0];
360 cpu_reg[id][1] = reg[1];
363 /* We are already running on cpu 0 */
369 pcpu_init(pcpup, id, sizeof(struct pcpu));
371 dpcpu[id - 1] = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
373 dpcpu_init(dpcpu[id - 1], id);
376 if (addr_size == 2) {
378 target_cpu |= reg[1];
381 printf("Starting CPU %u (%lx)\n", id, target_cpu);
382 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
384 err = psci_cpu_on(target_cpu, pa, id);
385 if (err != PSCI_RETVAL_SUCCESS) {
386 /* Panic here if INVARIANTS are enabled */
387 KASSERT(0, ("Failed to start CPU %u (%lx)\n", id, target_cpu));
390 kmem_free(kernel_arena, (vm_offset_t)dpcpu[id - 1], DPCPU_SIZE);
391 dpcpu[id - 1] = NULL;
392 /* Notify the user that the CPU failed to start */
393 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
395 CPU_SET(id, &all_cpus);
401 /* Initialize and fire up non-boot processors */
406 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
408 CPU_SET(0, &all_cpus);
410 switch(cpu_enum_method) {
413 ofw_cpu_early_foreach(cpu_init_fdt, true);
421 /* Introduce rest of cores to the world */
423 cpu_mp_announce(void)
428 cpu_mp_setmaxid(void)
433 cores = ofw_cpu_early_foreach(NULL, false);
435 cores = MIN(cores, MAXCPU);
437 printf("Found %d CPUs in the device tree\n", cores);
439 mp_maxid = cores - 1;
440 cpu_enum_method = CPUS_FDT;
446 printf("No CPU data, limiting to 1 core\n");