2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include "opt_kstack_pages.h"
33 #include "opt_platform.h"
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/module.h>
46 #include <sys/mutex.h>
49 #include <sys/sched.h>
54 #include <vm/vm_extern.h>
55 #include <vm/vm_kern.h>
57 #include <machine/machdep.h>
58 #include <machine/intr.h>
59 #include <machine/smp.h>
61 #include <machine/vfp.h>
65 #include <contrib/dev/acpica/include/acpi.h>
66 #include <dev/acpica/acpivar.h>
70 #include <dev/ofw/openfirm.h>
71 #include <dev/ofw/ofw_bus.h>
72 #include <dev/ofw/ofw_bus_subr.h>
73 #include <dev/ofw/ofw_cpu.h>
76 #include <dev/psci/psci.h>
80 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
81 /* don't panic if one fails to start */
82 static uint32_t mp_quirks;
89 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
90 { "arm,fvp-base", MP_QUIRK_CPULIST },
91 /* This is incorrect in some DTS files */
92 { "arm,vfp-base", MP_QUIRK_CPULIST },
97 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
98 typedef void intr_ipi_handler_t(void *);
100 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
102 intr_ipi_handler_t * ii_handler;
103 void * ii_handler_arg;
104 intr_ipi_send_t * ii_send;
106 char ii_name[INTR_IPI_NAMELEN];
110 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
112 static struct intr_ipi *intr_ipi_lookup(u_int);
113 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
116 static void ipi_ast(void *);
117 static void ipi_hardclock(void *);
118 static void ipi_preempt(void *);
119 static void ipi_rendezvous(void *);
120 static void ipi_stop(void *);
122 struct mtx ap_boot_mtx;
123 struct pcb stoppcbs[MAXCPU];
126 * Not all systems boot from the first CPU in the device tree. To work around
127 * this we need to find which CPU we have booted from so when we later
128 * enable the secondary CPUs we skip this one.
130 static int cpu0 = -1;
132 void mpentry(unsigned long cpuid);
133 void init_secondary(uint64_t);
135 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
137 /* Set to 1 once we're ready to let the APs out of the pen. */
138 volatile int aps_ready = 0;
140 /* Temporary variables for init_secondary() */
141 void *dpcpu[MAXCPU - 1];
144 release_aps(void *dummy __unused)
148 /* Only release CPUs if they exist */
152 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
153 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
154 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
155 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
156 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
157 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
159 atomic_store_rel_int(&aps_ready, 1);
160 /* Wake up the other CPUs */
166 printf("Release APs...");
169 for (i = 0; i < 2000; i++) {
175 * Don't time out while we are making progress. Some large
176 * systems can take a while to start all CPUs.
178 if (smp_cpus > started) {
185 printf("APs not started\n");
187 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
190 init_secondary(uint64_t cpu)
194 pcpup = &__pcpu[cpu];
196 * Set the pcpu pointer with a backup in tpidr_el1 to be
197 * loaded when entering the kernel from userland.
201 "msr tpidr_el1, %0" :: "r"(pcpup));
203 /* Spin until the BSP releases the APs */
205 __asm __volatile("wfe");
207 /* Initialize curthread */
208 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
209 pcpup->pc_curthread = pcpup->pc_idlethread;
210 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
213 * Identify current CPU. This is necessary to setup
214 * affinity registers and to provide support for
215 * runtime chip identification.
218 install_cpu_errata();
220 intr_pic_init_secondary();
222 /* Start per-CPU event timers. */
232 /* Enable interrupts */
235 mtx_lock_spin(&ap_boot_mtx);
237 atomic_add_rel_32(&smp_cpus, 1);
239 if (smp_cpus == mp_ncpus) {
240 /* enable IPI's, tlb shootdown, freezes etc */
241 atomic_store_rel_int(&smp_started, 1);
244 mtx_unlock_spin(&ap_boot_mtx);
246 /* Enter the scheduler */
249 panic("scheduler returned us to init_secondary");
254 * Send IPI thru interrupt controller.
257 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
260 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
261 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
265 * Setup IPI handler on interrupt controller.
270 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
273 struct intr_irqsrc *isrc;
277 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
278 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
280 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
284 isrc->isrc_handlers++;
286 ii = intr_ipi_lookup(ipi);
287 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
289 ii->ii_handler = hand;
290 ii->ii_handler_arg = arg;
291 ii->ii_send = pic_ipi_send;
292 ii->ii_send_arg = isrc;
293 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
294 ii->ii_count = intr_ipi_setup_counters(name);
298 intr_ipi_send(cpuset_t cpus, u_int ipi)
302 ii = intr_ipi_lookup(ipi);
303 if (ii->ii_count == NULL)
304 panic("%s: not setup IPI %u", __func__, ipi);
306 ii->ii_send(ii->ii_send_arg, cpus, ipi);
310 ipi_ast(void *dummy __unused)
313 CTR0(KTR_SMP, "IPI_AST");
317 ipi_hardclock(void *dummy __unused)
320 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
325 ipi_preempt(void *dummy __unused)
327 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
328 sched_preempt(curthread);
332 ipi_rendezvous(void *dummy __unused)
335 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
336 smp_rendezvous_action();
340 ipi_stop(void *dummy __unused)
344 CTR0(KTR_SMP, "IPI_STOP");
346 cpu = PCPU_GET(cpuid);
347 savectx(&stoppcbs[cpu]);
349 /* Indicate we are stopped */
350 CPU_SET_ATOMIC(cpu, &stopped_cpus);
352 /* Wait for restart */
353 while (!CPU_ISSET(cpu, &started_cpus))
356 CPU_CLR_ATOMIC(cpu, &started_cpus);
357 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
358 CTR0(KTR_SMP, "IPI_STOP (restart)");
365 return (smp_topo_none());
368 /* Determine if we running MP machine */
373 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
378 start_cpu(u_int id, uint64_t target_cpu)
385 /* Check we are able to start this cpu */
389 KASSERT(id < MAXCPU, ("Too many CPUs"));
391 /* We are already running on cpu 0 */
396 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
397 * CPUs ordered as the are likely grouped into clusters so it can be
398 * useful to keep that property, e.g. for the GICv3 driver to send
399 * an IPI to all CPUs in the cluster.
403 cpuid += mp_maxid + 1;
406 pcpup = &__pcpu[cpuid];
407 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
409 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
410 dpcpu_init(dpcpu[cpuid - 1], cpuid);
412 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
413 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
415 err = psci_cpu_on(target_cpu, pa, cpuid);
416 if (err != PSCI_RETVAL_SUCCESS) {
418 * Panic here if INVARIANTS are enabled and PSCI failed to
419 * start the requested CPU. If psci_cpu_on returns PSCI_MISSING
420 * to indicate we are unable to use it to start the given CPU.
422 KASSERT(err == PSCI_MISSING ||
423 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
424 ("Failed to start CPU %u (%lx)\n", id, target_cpu));
427 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
428 dpcpu[cpuid - 1] = NULL;
431 /* Notify the user that the CPU failed to start */
432 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
434 CPU_SET(cpuid, &all_cpus);
441 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
443 ACPI_MADT_GENERIC_INTERRUPT *intr;
447 switch(entry->Type) {
448 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
449 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
452 start_cpu(id, intr->ArmMpidr);
453 __pcpu[id].pc_acpi_id = intr->Uid;
464 ACPI_TABLE_MADT *madt;
468 physaddr = acpi_find_table(ACPI_SIG_MADT);
472 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
474 printf("Unable to map the MADT, not starting APs\n");
479 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
480 madt_handler, &cpuid);
482 acpi_unmap_table(madt);
485 /* set proximity info */
486 acpi_pxm_set_cpu_locality();
494 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
500 if (addr_size == 2) {
502 target_cpu |= reg[1];
505 if (!start_cpu(id, target_cpu))
508 /* Try to read the numa node of this cpu */
509 if (vm_ndomains == 1 ||
510 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
512 __pcpu[id].pc_domain = domain;
513 if (domain < MAXMEMDOM)
514 CPU_SET(id, &cpuset_domain[domain]);
520 /* Initialize and fire up non-boot processors */
529 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
531 CPU_SET(0, &all_cpus);
533 switch(arm64_bus_method) {
536 mp_quirks = MP_QUIRK_CPULIST;
537 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
544 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
545 if (ofw_bus_node_is_compatible(node,
546 fdt_quirks[i].compat) != 0) {
547 mp_quirks = fdt_quirks[i].quirks;
550 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
551 ofw_cpu_early_foreach(cpu_init_fdt, true);
559 /* Introduce rest of cores to the world */
561 cpu_mp_announce(void)
567 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
569 ACPI_MADT_GENERIC_INTERRUPT *intr;
573 switch(entry->Type) {
574 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
575 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
577 mpidr_reg = READ_SPECIALREG(mpidr_el1);
578 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
591 ACPI_TABLE_MADT *madt;
595 physaddr = acpi_find_table(ACPI_SIG_MADT);
599 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
601 printf("Unable to map the MADT, not starting APs\n");
606 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
607 cpu_count_acpi_handler, &cores);
609 acpi_unmap_table(madt);
617 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
619 uint64_t mpidr_fdt, mpidr_reg;
623 if (addr_size == 2) {
628 mpidr_reg = READ_SPECIALREG(mpidr_el1);
630 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
639 cpu_mp_setmaxid(void)
646 switch(arm64_bus_method) {
649 cores = cpu_count_acpi();
651 cores = MIN(cores, MAXCPU);
653 printf("Found %d CPUs in the ACPI tables\n",
656 mp_maxid = cores - 1;
662 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
664 cores = MIN(cores, MAXCPU);
666 printf("Found %d CPUs in the device tree\n",
669 mp_maxid = cores - 1;
675 printf("No CPU data, limiting to 1 core\n");
679 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) {
680 if (cores > 0 && cores < mp_ncpus) {
682 mp_maxid = cores - 1;
690 static struct intr_ipi *
691 intr_ipi_lookup(u_int ipi)
694 if (ipi >= INTR_IPI_COUNT)
695 panic("%s: no such IPI %u", __func__, ipi);
697 return (&ipi_sources[ipi]);
701 * interrupt controller dispatch function for IPIs. It should
702 * be called straight from the interrupt controller, when associated
703 * interrupt source is learned. Or from anybody who has an interrupt
707 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
712 ii = intr_ipi_lookup(ipi);
713 if (ii->ii_count == NULL)
714 panic("%s: not setup IPI %u", __func__, ipi);
716 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
719 * Supply ipi filter with trapframe argument
720 * if none is registered.
722 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
728 * Map IPI into interrupt controller.
733 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
738 if (ipi >= INTR_IPI_COUNT)
739 panic("%s: no such IPI %u", __func__, ipi);
741 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
743 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
744 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
745 isrc->isrc_nspc_num = ipi_next_num;
747 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
749 isrc->isrc_dev = intr_irq_root_dev;
756 * Setup IPI handler to interrupt source.
758 * Note that there could be more ways how to send and receive IPIs
759 * on a platform like fast interrupts for example. In that case,
760 * one can call this function with ASIF_NOALLOC flag set and then
761 * call intr_ipi_dispatch() when appropriate.
766 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
767 void *arg, u_int flags)
769 struct intr_irqsrc *isrc;
775 isrc = intr_ipi_lookup(ipi);
776 if (isrc->isrc_ipifilter != NULL)
779 if ((flags & AISHF_NOALLOC) == 0) {
780 error = ipi_map(isrc, ipi);
785 isrc->isrc_ipifilter = filter;
786 isrc->isrc_arg = arg;
787 isrc->isrc_handlers = 1;
788 isrc->isrc_count = intr_ipi_setup_counters(name);
789 isrc->isrc_index = 0; /* it should not be used in IPI case */
791 if (isrc->isrc_dev != NULL) {
792 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
793 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
801 ipi_all_but_self(u_int ipi)
806 CPU_CLR(PCPU_GET(cpuid), &cpus);
807 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
808 intr_ipi_send(cpus, ipi);
812 ipi_cpu(int cpu, u_int ipi)
819 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
820 intr_ipi_send(cpus, ipi);
824 ipi_selected(cpuset_t cpus, u_int ipi)
827 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
828 intr_ipi_send(cpus, ipi);