2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include "opt_kstack_pages.h"
34 #include "opt_platform.h"
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
40 #include <sys/systm.h>
43 #include <sys/kernel.h>
45 #include <sys/malloc.h>
46 #include <sys/module.h>
47 #include <sys/mutex.h>
50 #include <sys/sched.h>
55 #include <vm/vm_extern.h>
56 #include <vm/vm_kern.h>
57 #include <vm/vm_map.h>
59 #include <machine/machdep.h>
60 #include <machine/debug_monitor.h>
61 #include <machine/intr.h>
62 #include <machine/smp.h>
64 #include <machine/vfp.h>
68 #include <contrib/dev/acpica/include/acpi.h>
69 #include <dev/acpica/acpivar.h>
73 #include <dev/ofw/openfirm.h>
74 #include <dev/ofw/ofw_bus.h>
75 #include <dev/ofw/ofw_bus_subr.h>
76 #include <dev/ofw/ofw_cpu.h>
79 #include <dev/psci/psci.h>
83 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
84 /* don't panic if one fails to start */
85 static uint32_t mp_quirks;
92 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
93 { "arm,fvp-base", MP_QUIRK_CPULIST },
94 /* This is incorrect in some DTS files */
95 { "arm,vfp-base", MP_QUIRK_CPULIST },
100 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
101 typedef void intr_ipi_handler_t(void *);
103 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
105 intr_ipi_handler_t * ii_handler;
106 void * ii_handler_arg;
107 intr_ipi_send_t * ii_send;
109 char ii_name[INTR_IPI_NAMELEN];
113 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
115 static struct intr_ipi *intr_ipi_lookup(u_int);
116 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
119 static void ipi_ast(void *);
120 static void ipi_hardclock(void *);
121 static void ipi_preempt(void *);
122 static void ipi_rendezvous(void *);
123 static void ipi_stop(void *);
125 struct mtx ap_boot_mtx;
126 struct pcb stoppcbs[MAXCPU];
129 * Not all systems boot from the first CPU in the device tree. To work around
130 * this we need to find which CPU we have booted from so when we later
131 * enable the secondary CPUs we skip this one.
133 static int cpu0 = -1;
135 void mpentry(unsigned long cpuid);
136 void init_secondary(uint64_t);
138 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
140 /* Set to 1 once we're ready to let the APs out of the pen. */
141 volatile int aps_ready = 0;
143 /* Temporary variables for init_secondary() */
144 void *dpcpu[MAXCPU - 1];
147 release_aps(void *dummy __unused)
151 /* Only release CPUs if they exist */
155 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
156 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
157 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
158 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
159 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
160 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
162 atomic_store_rel_int(&aps_ready, 1);
163 /* Wake up the other CPUs */
169 printf("Release APs...");
172 for (i = 0; i < 2000; i++) {
178 * Don't time out while we are making progress. Some large
179 * systems can take a while to start all CPUs.
181 if (smp_cpus > started) {
188 printf("APs not started\n");
190 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
193 init_secondary(uint64_t cpu)
198 pcpup = &__pcpu[cpu];
200 * Set the pcpu pointer with a backup in tpidr_el1 to be
201 * loaded when entering the kernel from userland.
205 "msr tpidr_el1, %0" :: "r"(pcpup));
207 /* Spin until the BSP releases the APs */
209 __asm __volatile("wfe");
211 /* Initialize curthread */
212 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
213 pcpup->pc_curthread = pcpup->pc_idlethread;
214 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
216 /* Initialize curpmap to match TTBR0's current setting. */
217 pmap0 = vmspace_pmap(&vmspace0);
218 KASSERT(pmap_to_ttbr0(pmap0) == READ_SPECIALREG(ttbr0_el1),
219 ("pmap0 doesn't match cpu %ld's ttbr0", cpu));
220 pcpup->pc_curpmap = pmap0;
223 * Identify current CPU. This is necessary to setup
224 * affinity registers and to provide support for
225 * runtime chip identification.
228 install_cpu_errata();
230 intr_pic_init_secondary();
232 /* Start per-CPU event timers. */
242 /* Enable interrupts */
245 mtx_lock_spin(&ap_boot_mtx);
247 atomic_add_rel_32(&smp_cpus, 1);
249 if (smp_cpus == mp_ncpus) {
250 /* enable IPI's, tlb shootdown, freezes etc */
251 atomic_store_rel_int(&smp_started, 1);
254 mtx_unlock_spin(&ap_boot_mtx);
256 /* Enter the scheduler */
259 panic("scheduler returned us to init_secondary");
264 * Send IPI thru interrupt controller.
267 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
270 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
271 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
275 * Setup IPI handler on interrupt controller.
280 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
283 struct intr_irqsrc *isrc;
287 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
288 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
290 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
294 isrc->isrc_handlers++;
296 ii = intr_ipi_lookup(ipi);
297 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
299 ii->ii_handler = hand;
300 ii->ii_handler_arg = arg;
301 ii->ii_send = pic_ipi_send;
302 ii->ii_send_arg = isrc;
303 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
304 ii->ii_count = intr_ipi_setup_counters(name);
308 intr_ipi_send(cpuset_t cpus, u_int ipi)
312 ii = intr_ipi_lookup(ipi);
313 if (ii->ii_count == NULL)
314 panic("%s: not setup IPI %u", __func__, ipi);
316 ii->ii_send(ii->ii_send_arg, cpus, ipi);
320 ipi_ast(void *dummy __unused)
323 CTR0(KTR_SMP, "IPI_AST");
327 ipi_hardclock(void *dummy __unused)
330 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
335 ipi_preempt(void *dummy __unused)
337 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
338 sched_preempt(curthread);
342 ipi_rendezvous(void *dummy __unused)
345 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
346 smp_rendezvous_action();
350 ipi_stop(void *dummy __unused)
354 CTR0(KTR_SMP, "IPI_STOP");
356 cpu = PCPU_GET(cpuid);
357 savectx(&stoppcbs[cpu]);
359 /* Indicate we are stopped */
360 CPU_SET_ATOMIC(cpu, &stopped_cpus);
362 /* Wait for restart */
363 while (!CPU_ISSET(cpu, &started_cpus))
367 dbg_register_sync(NULL);
370 CPU_CLR_ATOMIC(cpu, &started_cpus);
371 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
372 CTR0(KTR_SMP, "IPI_STOP (restart)");
379 return (smp_topo_none());
382 /* Determine if we running MP machine */
387 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
392 start_cpu(u_int id, uint64_t target_cpu)
399 /* Check we are able to start this cpu */
403 KASSERT(id < MAXCPU, ("Too many CPUs"));
405 /* We are already running on cpu 0 */
410 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
411 * CPUs ordered as the are likely grouped into clusters so it can be
412 * useful to keep that property, e.g. for the GICv3 driver to send
413 * an IPI to all CPUs in the cluster.
417 cpuid += mp_maxid + 1;
420 pcpup = &__pcpu[cpuid];
421 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
423 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
424 dpcpu_init(dpcpu[cpuid - 1], cpuid);
426 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
427 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
429 err = psci_cpu_on(target_cpu, pa, cpuid);
430 if (err != PSCI_RETVAL_SUCCESS) {
432 * Panic here if INVARIANTS are enabled and PSCI failed to
433 * start the requested CPU. If psci_cpu_on returns PSCI_MISSING
434 * to indicate we are unable to use it to start the given CPU.
436 KASSERT(err == PSCI_MISSING ||
437 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
438 ("Failed to start CPU %u (%lx)\n", id, target_cpu));
441 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
442 dpcpu[cpuid - 1] = NULL;
445 /* Notify the user that the CPU failed to start */
446 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
448 CPU_SET(cpuid, &all_cpus);
455 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
457 ACPI_MADT_GENERIC_INTERRUPT *intr;
461 switch(entry->Type) {
462 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
463 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
466 start_cpu(id, intr->ArmMpidr);
467 __pcpu[id].pc_acpi_id = intr->Uid;
478 ACPI_TABLE_MADT *madt;
482 physaddr = acpi_find_table(ACPI_SIG_MADT);
486 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
488 printf("Unable to map the MADT, not starting APs\n");
493 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
494 madt_handler, &cpuid);
496 acpi_unmap_table(madt);
499 /* set proximity info */
500 acpi_pxm_set_cpu_locality();
508 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
514 if (addr_size == 2) {
516 target_cpu |= reg[1];
519 if (!start_cpu(id, target_cpu))
522 /* Try to read the numa node of this cpu */
523 if (vm_ndomains == 1 ||
524 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
526 __pcpu[id].pc_domain = domain;
527 if (domain < MAXMEMDOM)
528 CPU_SET(id, &cpuset_domain[domain]);
534 /* Initialize and fire up non-boot processors */
543 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
545 CPU_SET(0, &all_cpus);
547 switch(arm64_bus_method) {
550 mp_quirks = MP_QUIRK_CPULIST;
551 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
558 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
559 if (ofw_bus_node_is_compatible(node,
560 fdt_quirks[i].compat) != 0) {
561 mp_quirks = fdt_quirks[i].quirks;
564 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
565 ofw_cpu_early_foreach(cpu_init_fdt, true);
573 /* Introduce rest of cores to the world */
575 cpu_mp_announce(void)
581 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
583 ACPI_MADT_GENERIC_INTERRUPT *intr;
587 switch(entry->Type) {
588 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
589 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
591 mpidr_reg = READ_SPECIALREG(mpidr_el1);
592 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
605 ACPI_TABLE_MADT *madt;
609 physaddr = acpi_find_table(ACPI_SIG_MADT);
613 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
615 printf("Unable to map the MADT, not starting APs\n");
620 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
621 cpu_count_acpi_handler, &cores);
623 acpi_unmap_table(madt);
631 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
633 uint64_t mpidr_fdt, mpidr_reg;
637 if (addr_size == 2) {
642 mpidr_reg = READ_SPECIALREG(mpidr_el1);
644 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
653 cpu_mp_setmaxid(void)
660 switch(arm64_bus_method) {
663 cores = cpu_count_acpi();
665 cores = MIN(cores, MAXCPU);
667 printf("Found %d CPUs in the ACPI tables\n",
670 mp_maxid = cores - 1;
676 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
678 cores = MIN(cores, MAXCPU);
680 printf("Found %d CPUs in the device tree\n",
683 mp_maxid = cores - 1;
689 printf("No CPU data, limiting to 1 core\n");
693 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) {
694 if (cores > 0 && cores < mp_ncpus) {
696 mp_maxid = cores - 1;
704 static struct intr_ipi *
705 intr_ipi_lookup(u_int ipi)
708 if (ipi >= INTR_IPI_COUNT)
709 panic("%s: no such IPI %u", __func__, ipi);
711 return (&ipi_sources[ipi]);
715 * interrupt controller dispatch function for IPIs. It should
716 * be called straight from the interrupt controller, when associated
717 * interrupt source is learned. Or from anybody who has an interrupt
721 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
726 ii = intr_ipi_lookup(ipi);
727 if (ii->ii_count == NULL)
728 panic("%s: not setup IPI %u", __func__, ipi);
730 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
733 * Supply ipi filter with trapframe argument
734 * if none is registered.
736 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
742 * Map IPI into interrupt controller.
747 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
752 if (ipi >= INTR_IPI_COUNT)
753 panic("%s: no such IPI %u", __func__, ipi);
755 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
757 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
758 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
759 isrc->isrc_nspc_num = ipi_next_num;
761 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
763 isrc->isrc_dev = intr_irq_root_dev;
770 * Setup IPI handler to interrupt source.
772 * Note that there could be more ways how to send and receive IPIs
773 * on a platform like fast interrupts for example. In that case,
774 * one can call this function with ASIF_NOALLOC flag set and then
775 * call intr_ipi_dispatch() when appropriate.
780 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
781 void *arg, u_int flags)
783 struct intr_irqsrc *isrc;
789 isrc = intr_ipi_lookup(ipi);
790 if (isrc->isrc_ipifilter != NULL)
793 if ((flags & AISHF_NOALLOC) == 0) {
794 error = ipi_map(isrc, ipi);
799 isrc->isrc_ipifilter = filter;
800 isrc->isrc_arg = arg;
801 isrc->isrc_handlers = 1;
802 isrc->isrc_count = intr_ipi_setup_counters(name);
803 isrc->isrc_index = 0; /* it should not be used in IPI case */
805 if (isrc->isrc_dev != NULL) {
806 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
807 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
815 ipi_all_but_self(u_int ipi)
820 CPU_CLR(PCPU_GET(cpuid), &cpus);
821 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
822 intr_ipi_send(cpus, ipi);
826 ipi_cpu(int cpu, u_int ipi)
833 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
834 intr_ipi_send(cpus, ipi);
838 ipi_selected(cpuset_t cpus, u_int ipi)
841 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
842 intr_ipi_send(cpus, ipi);