2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include "opt_kstack_pages.h"
34 #include "opt_platform.h"
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
40 #include <sys/systm.h>
43 #include <sys/kernel.h>
45 #include <sys/malloc.h>
46 #include <sys/module.h>
47 #include <sys/mutex.h>
50 #include <sys/sched.h>
55 #include <vm/vm_extern.h>
56 #include <vm/vm_kern.h>
58 #include <machine/machdep.h>
59 #include <machine/debug_monitor.h>
60 #include <machine/intr.h>
61 #include <machine/smp.h>
63 #include <machine/vfp.h>
67 #include <contrib/dev/acpica/include/acpi.h>
68 #include <dev/acpica/acpivar.h>
72 #include <dev/ofw/openfirm.h>
73 #include <dev/ofw/ofw_bus.h>
74 #include <dev/ofw/ofw_bus_subr.h>
75 #include <dev/ofw/ofw_cpu.h>
78 #include <dev/psci/psci.h>
82 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
83 /* don't panic if one fails to start */
84 static uint32_t mp_quirks;
91 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
92 { "arm,fvp-base", MP_QUIRK_CPULIST },
93 /* This is incorrect in some DTS files */
94 { "arm,vfp-base", MP_QUIRK_CPULIST },
99 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
100 typedef void intr_ipi_handler_t(void *);
102 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
104 intr_ipi_handler_t * ii_handler;
105 void * ii_handler_arg;
106 intr_ipi_send_t * ii_send;
108 char ii_name[INTR_IPI_NAMELEN];
112 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
114 static struct intr_ipi *intr_ipi_lookup(u_int);
115 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
118 static void ipi_ast(void *);
119 static void ipi_hardclock(void *);
120 static void ipi_preempt(void *);
121 static void ipi_rendezvous(void *);
122 static void ipi_stop(void *);
124 struct mtx ap_boot_mtx;
125 struct pcb stoppcbs[MAXCPU];
128 * Not all systems boot from the first CPU in the device tree. To work around
129 * this we need to find which CPU we have booted from so when we later
130 * enable the secondary CPUs we skip this one.
132 static int cpu0 = -1;
134 void mpentry(unsigned long cpuid);
135 void init_secondary(uint64_t);
137 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
139 /* Set to 1 once we're ready to let the APs out of the pen. */
140 volatile int aps_ready = 0;
142 /* Temporary variables for init_secondary() */
143 void *dpcpu[MAXCPU - 1];
146 release_aps(void *dummy __unused)
150 /* Only release CPUs if they exist */
154 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
155 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
156 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
157 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
158 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
159 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
161 atomic_store_rel_int(&aps_ready, 1);
162 /* Wake up the other CPUs */
168 printf("Release APs...");
171 for (i = 0; i < 2000; i++) {
177 * Don't time out while we are making progress. Some large
178 * systems can take a while to start all CPUs.
180 if (smp_cpus > started) {
187 printf("APs not started\n");
189 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
192 init_secondary(uint64_t cpu)
196 pcpup = &__pcpu[cpu];
198 * Set the pcpu pointer with a backup in tpidr_el1 to be
199 * loaded when entering the kernel from userland.
203 "msr tpidr_el1, %0" :: "r"(pcpup));
205 /* Spin until the BSP releases the APs */
207 __asm __volatile("wfe");
209 /* Initialize curthread */
210 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
211 pcpup->pc_curthread = pcpup->pc_idlethread;
212 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
215 * Identify current CPU. This is necessary to setup
216 * affinity registers and to provide support for
217 * runtime chip identification.
220 install_cpu_errata();
222 intr_pic_init_secondary();
224 /* Start per-CPU event timers. */
234 /* Enable interrupts */
237 mtx_lock_spin(&ap_boot_mtx);
239 atomic_add_rel_32(&smp_cpus, 1);
241 if (smp_cpus == mp_ncpus) {
242 /* enable IPI's, tlb shootdown, freezes etc */
243 atomic_store_rel_int(&smp_started, 1);
246 mtx_unlock_spin(&ap_boot_mtx);
248 /* Enter the scheduler */
251 panic("scheduler returned us to init_secondary");
256 * Send IPI thru interrupt controller.
259 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
262 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
263 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
267 * Setup IPI handler on interrupt controller.
272 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
275 struct intr_irqsrc *isrc;
279 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
280 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
282 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
286 isrc->isrc_handlers++;
288 ii = intr_ipi_lookup(ipi);
289 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
291 ii->ii_handler = hand;
292 ii->ii_handler_arg = arg;
293 ii->ii_send = pic_ipi_send;
294 ii->ii_send_arg = isrc;
295 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
296 ii->ii_count = intr_ipi_setup_counters(name);
300 intr_ipi_send(cpuset_t cpus, u_int ipi)
304 ii = intr_ipi_lookup(ipi);
305 if (ii->ii_count == NULL)
306 panic("%s: not setup IPI %u", __func__, ipi);
308 ii->ii_send(ii->ii_send_arg, cpus, ipi);
312 ipi_ast(void *dummy __unused)
315 CTR0(KTR_SMP, "IPI_AST");
319 ipi_hardclock(void *dummy __unused)
322 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
327 ipi_preempt(void *dummy __unused)
329 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
330 sched_preempt(curthread);
334 ipi_rendezvous(void *dummy __unused)
337 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
338 smp_rendezvous_action();
342 ipi_stop(void *dummy __unused)
346 CTR0(KTR_SMP, "IPI_STOP");
348 cpu = PCPU_GET(cpuid);
349 savectx(&stoppcbs[cpu]);
351 /* Indicate we are stopped */
352 CPU_SET_ATOMIC(cpu, &stopped_cpus);
354 /* Wait for restart */
355 while (!CPU_ISSET(cpu, &started_cpus))
359 dbg_register_sync(NULL);
362 CPU_CLR_ATOMIC(cpu, &started_cpus);
363 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
364 CTR0(KTR_SMP, "IPI_STOP (restart)");
371 return (smp_topo_none());
374 /* Determine if we running MP machine */
379 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
384 start_cpu(u_int id, uint64_t target_cpu)
391 /* Check we are able to start this cpu */
395 KASSERT(id < MAXCPU, ("Too many CPUs"));
397 /* We are already running on cpu 0 */
402 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
403 * CPUs ordered as the are likely grouped into clusters so it can be
404 * useful to keep that property, e.g. for the GICv3 driver to send
405 * an IPI to all CPUs in the cluster.
409 cpuid += mp_maxid + 1;
412 pcpup = &__pcpu[cpuid];
413 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
415 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
416 dpcpu_init(dpcpu[cpuid - 1], cpuid);
418 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
419 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
421 err = psci_cpu_on(target_cpu, pa, cpuid);
422 if (err != PSCI_RETVAL_SUCCESS) {
424 * Panic here if INVARIANTS are enabled and PSCI failed to
425 * start the requested CPU. If psci_cpu_on returns PSCI_MISSING
426 * to indicate we are unable to use it to start the given CPU.
428 KASSERT(err == PSCI_MISSING ||
429 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
430 ("Failed to start CPU %u (%lx)\n", id, target_cpu));
433 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
434 dpcpu[cpuid - 1] = NULL;
437 /* Notify the user that the CPU failed to start */
438 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
440 CPU_SET(cpuid, &all_cpus);
447 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
449 ACPI_MADT_GENERIC_INTERRUPT *intr;
453 switch(entry->Type) {
454 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
455 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
458 start_cpu(id, intr->ArmMpidr);
459 __pcpu[id].pc_acpi_id = intr->Uid;
470 ACPI_TABLE_MADT *madt;
474 physaddr = acpi_find_table(ACPI_SIG_MADT);
478 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
480 printf("Unable to map the MADT, not starting APs\n");
485 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
486 madt_handler, &cpuid);
488 acpi_unmap_table(madt);
491 /* set proximity info */
492 acpi_pxm_set_cpu_locality();
500 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
506 if (addr_size == 2) {
508 target_cpu |= reg[1];
511 if (!start_cpu(id, target_cpu))
514 /* Try to read the numa node of this cpu */
515 if (vm_ndomains == 1 ||
516 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
518 __pcpu[id].pc_domain = domain;
519 if (domain < MAXMEMDOM)
520 CPU_SET(id, &cpuset_domain[domain]);
526 /* Initialize and fire up non-boot processors */
535 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
537 CPU_SET(0, &all_cpus);
539 switch(arm64_bus_method) {
542 mp_quirks = MP_QUIRK_CPULIST;
543 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
550 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
551 if (ofw_bus_node_is_compatible(node,
552 fdt_quirks[i].compat) != 0) {
553 mp_quirks = fdt_quirks[i].quirks;
556 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
557 ofw_cpu_early_foreach(cpu_init_fdt, true);
565 /* Introduce rest of cores to the world */
567 cpu_mp_announce(void)
573 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
575 ACPI_MADT_GENERIC_INTERRUPT *intr;
579 switch(entry->Type) {
580 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
581 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
583 mpidr_reg = READ_SPECIALREG(mpidr_el1);
584 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
597 ACPI_TABLE_MADT *madt;
601 physaddr = acpi_find_table(ACPI_SIG_MADT);
605 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
607 printf("Unable to map the MADT, not starting APs\n");
612 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
613 cpu_count_acpi_handler, &cores);
615 acpi_unmap_table(madt);
623 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
625 uint64_t mpidr_fdt, mpidr_reg;
629 if (addr_size == 2) {
634 mpidr_reg = READ_SPECIALREG(mpidr_el1);
636 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
645 cpu_mp_setmaxid(void)
652 switch(arm64_bus_method) {
655 cores = cpu_count_acpi();
657 cores = MIN(cores, MAXCPU);
659 printf("Found %d CPUs in the ACPI tables\n",
662 mp_maxid = cores - 1;
668 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
670 cores = MIN(cores, MAXCPU);
672 printf("Found %d CPUs in the device tree\n",
675 mp_maxid = cores - 1;
681 printf("No CPU data, limiting to 1 core\n");
685 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) {
686 if (cores > 0 && cores < mp_ncpus) {
688 mp_maxid = cores - 1;
696 static struct intr_ipi *
697 intr_ipi_lookup(u_int ipi)
700 if (ipi >= INTR_IPI_COUNT)
701 panic("%s: no such IPI %u", __func__, ipi);
703 return (&ipi_sources[ipi]);
707 * interrupt controller dispatch function for IPIs. It should
708 * be called straight from the interrupt controller, when associated
709 * interrupt source is learned. Or from anybody who has an interrupt
713 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
718 ii = intr_ipi_lookup(ipi);
719 if (ii->ii_count == NULL)
720 panic("%s: not setup IPI %u", __func__, ipi);
722 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
725 * Supply ipi filter with trapframe argument
726 * if none is registered.
728 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
734 * Map IPI into interrupt controller.
739 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
744 if (ipi >= INTR_IPI_COUNT)
745 panic("%s: no such IPI %u", __func__, ipi);
747 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
749 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
750 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
751 isrc->isrc_nspc_num = ipi_next_num;
753 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
755 isrc->isrc_dev = intr_irq_root_dev;
762 * Setup IPI handler to interrupt source.
764 * Note that there could be more ways how to send and receive IPIs
765 * on a platform like fast interrupts for example. In that case,
766 * one can call this function with ASIF_NOALLOC flag set and then
767 * call intr_ipi_dispatch() when appropriate.
772 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
773 void *arg, u_int flags)
775 struct intr_irqsrc *isrc;
781 isrc = intr_ipi_lookup(ipi);
782 if (isrc->isrc_ipifilter != NULL)
785 if ((flags & AISHF_NOALLOC) == 0) {
786 error = ipi_map(isrc, ipi);
791 isrc->isrc_ipifilter = filter;
792 isrc->isrc_arg = arg;
793 isrc->isrc_handlers = 1;
794 isrc->isrc_count = intr_ipi_setup_counters(name);
795 isrc->isrc_index = 0; /* it should not be used in IPI case */
797 if (isrc->isrc_dev != NULL) {
798 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
799 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
807 ipi_all_but_self(u_int ipi)
812 CPU_CLR(PCPU_GET(cpuid), &cpus);
813 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
814 intr_ipi_send(cpus, ipi);
818 ipi_cpu(int cpu, u_int ipi)
825 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
826 intr_ipi_send(cpus, ipi);
830 ipi_selected(cpuset_t cpus, u_int ipi)
833 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
834 intr_ipi_send(cpus, ipi);