2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include "opt_kstack_pages.h"
33 #include "opt_platform.h"
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
47 #include <sys/sched.h>
52 #include <vm/vm_extern.h>
53 #include <vm/vm_kern.h>
55 #include <machine/debug_monitor.h>
56 #include <machine/machdep.h>
57 #include <machine/intr.h>
58 #include <machine/smp.h>
60 #include <machine/vfp.h>
64 #include <contrib/dev/acpica/include/acpi.h>
65 #include <dev/acpica/acpivar.h>
69 #include <dev/ofw/openfirm.h>
70 #include <dev/ofw/ofw_cpu.h>
73 #include <dev/psci/psci.h>
77 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
78 typedef void intr_ipi_handler_t(void *);
80 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
82 intr_ipi_handler_t * ii_handler;
83 void * ii_handler_arg;
84 intr_ipi_send_t * ii_send;
86 char ii_name[INTR_IPI_NAMELEN];
90 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
92 static struct intr_ipi *intr_ipi_lookup(u_int);
93 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
96 extern struct pcpu __pcpu[];
98 static device_identify_t arm64_cpu_identify;
99 static device_probe_t arm64_cpu_probe;
100 static device_attach_t arm64_cpu_attach;
102 static void ipi_ast(void *);
103 static void ipi_hardclock(void *);
104 static void ipi_preempt(void *);
105 static void ipi_rendezvous(void *);
106 static void ipi_stop(void *);
108 static int ipi_handler(void *arg);
110 struct mtx ap_boot_mtx;
111 struct pcb stoppcbs[MAXCPU];
113 static device_t cpu_list[MAXCPU];
116 * Not all systems boot from the first CPU in the device tree. To work around
117 * this we need to find which CPU we have booted from so when we later
118 * enable the secondary CPUs we skip this one.
120 static int cpu0 = -1;
122 void mpentry(unsigned long cpuid);
123 void init_secondary(uint64_t);
125 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
127 /* Set to 1 once we're ready to let the APs out of the pen. */
128 volatile int aps_ready = 0;
130 /* Temporary variables for init_secondary() */
131 void *dpcpu[MAXCPU - 1];
133 static device_method_t arm64_cpu_methods[] = {
134 /* Device interface */
135 DEVMETHOD(device_identify, arm64_cpu_identify),
136 DEVMETHOD(device_probe, arm64_cpu_probe),
137 DEVMETHOD(device_attach, arm64_cpu_attach),
142 static devclass_t arm64_cpu_devclass;
143 static driver_t arm64_cpu_driver = {
149 DRIVER_MODULE(arm64_cpu, cpu, arm64_cpu_driver, arm64_cpu_devclass, 0, 0);
152 arm64_cpu_identify(driver_t *driver, device_t parent)
155 if (device_find_child(parent, "arm64_cpu", -1) != NULL)
157 if (BUS_ADD_CHILD(parent, 0, "arm64_cpu", -1) == NULL)
158 device_printf(parent, "add child failed\n");
162 arm64_cpu_probe(device_t dev)
166 cpuid = device_get_unit(dev);
167 if (cpuid >= MAXCPU || cpuid > mp_maxid)
175 arm64_cpu_attach(device_t dev)
182 cpuid = device_get_unit(dev);
184 if (cpuid >= MAXCPU || cpuid > mp_maxid)
186 KASSERT(cpu_list[cpuid] == NULL, ("Already have cpu %u", cpuid));
188 reg = cpu_get_cpuid(dev, ®_size);
193 device_printf(dev, "register <");
194 for (i = 0; i < reg_size; i++)
195 printf("%s%x", (i == 0) ? "" : " ", reg[i]);
199 /* Set the device to start it later */
200 cpu_list[cpuid] = dev;
206 release_aps(void *dummy __unused)
210 /* Only release CPUs if they exist */
214 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
215 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
216 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
217 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
218 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
219 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
221 atomic_store_rel_int(&aps_ready, 1);
222 /* Wake up the other CPUs */
223 __asm __volatile("sev");
225 printf("Release APs\n");
227 for (i = 0; i < 2000; i++) {
233 printf("APs not started\n");
235 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
238 init_secondary(uint64_t cpu)
242 pcpup = &__pcpu[cpu];
244 * Set the pcpu pointer with a backup in tpidr_el1 to be
245 * loaded when entering the kernel from userland.
249 "msr tpidr_el1, %0" :: "r"(pcpup));
251 /* Spin until the BSP releases the APs */
253 __asm __volatile("wfe");
255 /* Initialize curthread */
256 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
257 pcpup->pc_curthread = pcpup->pc_idlethread;
258 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
261 * Identify current CPU. This is necessary to setup
262 * affinity registers and to provide support for
263 * runtime chip identification.
267 intr_pic_init_secondary();
269 /* Start per-CPU event timers. */
278 /* Enable interrupts */
281 mtx_lock_spin(&ap_boot_mtx);
283 atomic_add_rel_32(&smp_cpus, 1);
285 if (smp_cpus == mp_ncpus) {
286 /* enable IPI's, tlb shootdown, freezes etc */
287 atomic_store_rel_int(&smp_started, 1);
290 mtx_unlock_spin(&ap_boot_mtx);
292 /* Enter the scheduler */
295 panic("scheduler returned us to init_secondary");
300 * Send IPI thru interrupt controller.
303 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
306 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
307 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
311 * Setup IPI handler on interrupt controller.
316 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
319 struct intr_irqsrc *isrc;
323 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
324 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
326 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
330 isrc->isrc_handlers++;
332 ii = intr_ipi_lookup(ipi);
333 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
335 ii->ii_handler = hand;
336 ii->ii_handler_arg = arg;
337 ii->ii_send = pic_ipi_send;
338 ii->ii_send_arg = isrc;
339 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
340 ii->ii_count = intr_ipi_setup_counters(name);
344 intr_ipi_send(cpuset_t cpus, u_int ipi)
348 ii = intr_ipi_lookup(ipi);
349 if (ii->ii_count == NULL)
350 panic("%s: not setup IPI %u", __func__, ipi);
352 ii->ii_send(ii->ii_send_arg, cpus, ipi);
356 ipi_ast(void *dummy __unused)
359 CTR0(KTR_SMP, "IPI_AST");
363 ipi_hardclock(void *dummy __unused)
366 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
371 ipi_preempt(void *dummy __unused)
373 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
374 sched_preempt(curthread);
378 ipi_rendezvous(void *dummy __unused)
381 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
382 smp_rendezvous_action();
386 ipi_stop(void *dummy __unused)
390 CTR0(KTR_SMP, "IPI_STOP");
392 cpu = PCPU_GET(cpuid);
393 savectx(&stoppcbs[cpu]);
395 /* Indicate we are stopped */
396 CPU_SET_ATOMIC(cpu, &stopped_cpus);
398 /* Wait for restart */
399 while (!CPU_ISSET(cpu, &started_cpus))
402 CPU_CLR_ATOMIC(cpu, &started_cpus);
403 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
404 CTR0(KTR_SMP, "IPI_STOP (restart)");
411 return (smp_topo_none());
414 /* Determine if we running MP machine */
419 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
424 start_cpu(u_int id, uint64_t target_cpu)
431 /* Check we are able to start this cpu */
435 KASSERT(id < MAXCPU, ("Too many CPUs"));
437 /* We are already running on cpu 0 */
442 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
443 * CPUs ordered as the are likely grouped into clusters so it can be
444 * useful to keep that property, e.g. for the GICv3 driver to send
445 * an IPI to all CPUs in the cluster.
449 cpuid += mp_maxid + 1;
452 pcpup = &__pcpu[cpuid];
453 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
455 dpcpu[cpuid - 1] = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
457 dpcpu_init(dpcpu[cpuid - 1], cpuid);
459 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
460 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
462 err = psci_cpu_on(target_cpu, pa, cpuid);
463 if (err != PSCI_RETVAL_SUCCESS) {
465 * Panic here if INVARIANTS are enabled and PSCI failed to
466 * start the requested CPU. If psci_cpu_on returns PSCI_MISSING
467 * to indicate we are unable to use it to start the given CPU.
469 KASSERT(err == PSCI_MISSING,
470 ("Failed to start CPU %u (%lx)\n", id, target_cpu));
473 kmem_free(kernel_arena, (vm_offset_t)dpcpu[cpuid - 1],
475 dpcpu[cpuid - 1] = NULL;
476 /* Notify the user that the CPU failed to start */
477 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
479 CPU_SET(cpuid, &all_cpus);
486 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
488 ACPI_MADT_GENERIC_INTERRUPT *intr;
491 switch(entry->Type) {
492 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
493 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
496 start_cpu((*cpuid), intr->ArmMpidr);
507 ACPI_TABLE_MADT *madt;
511 physaddr = acpi_find_table(ACPI_SIG_MADT);
515 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
517 printf("Unable to map the MADT, not starting APs\n");
522 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
523 madt_handler, &cpuid);
525 acpi_unmap_table(madt);
531 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
536 if (addr_size == 2) {
538 target_cpu |= reg[1];
541 return (start_cpu(id, target_cpu) ? TRUE : FALSE);
545 /* Initialize and fire up non-boot processors */
550 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
552 CPU_SET(0, &all_cpus);
554 switch(arm64_bus_method) {
557 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
563 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
564 ofw_cpu_early_foreach(cpu_init_fdt, true);
572 /* Introduce rest of cores to the world */
574 cpu_mp_announce(void)
580 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
582 ACPI_MADT_GENERIC_INTERRUPT *intr;
586 switch(entry->Type) {
587 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
588 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
590 mpidr_reg = READ_SPECIALREG(mpidr_el1);
591 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
604 ACPI_TABLE_MADT *madt;
608 physaddr = acpi_find_table(ACPI_SIG_MADT);
612 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
614 printf("Unable to map the MADT, not starting APs\n");
619 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
620 cpu_count_acpi_handler, &cores);
622 acpi_unmap_table(madt);
630 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
632 uint64_t mpidr_fdt, mpidr_reg;
636 if (addr_size == 2) {
641 mpidr_reg = READ_SPECIALREG(mpidr_el1);
643 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
652 cpu_mp_setmaxid(void)
654 #if defined(DEV_ACPI) || defined(FDT)
658 switch(arm64_bus_method) {
661 cores = cpu_count_acpi();
663 cores = MIN(cores, MAXCPU);
665 printf("Found %d CPUs in the ACPI tables\n",
668 mp_maxid = cores - 1;
675 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
677 cores = MIN(cores, MAXCPU);
679 printf("Found %d CPUs in the device tree\n",
682 mp_maxid = cores - 1;
692 printf("No CPU data, limiting to 1 core\n");
700 static struct intr_ipi *
701 intr_ipi_lookup(u_int ipi)
704 if (ipi >= INTR_IPI_COUNT)
705 panic("%s: no such IPI %u", __func__, ipi);
707 return (&ipi_sources[ipi]);
711 * interrupt controller dispatch function for IPIs. It should
712 * be called straight from the interrupt controller, when associated
713 * interrupt source is learned. Or from anybody who has an interrupt
717 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
722 ii = intr_ipi_lookup(ipi);
723 if (ii->ii_count == NULL)
724 panic("%s: not setup IPI %u", __func__, ipi);
726 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
729 * Supply ipi filter with trapframe argument
730 * if none is registered.
732 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
738 * Map IPI into interrupt controller.
743 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
748 if (ipi >= INTR_IPI_COUNT)
749 panic("%s: no such IPI %u", __func__, ipi);
751 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
753 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
754 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
755 isrc->isrc_nspc_num = ipi_next_num;
757 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
759 isrc->isrc_dev = intr_irq_root_dev;
766 * Setup IPI handler to interrupt source.
768 * Note that there could be more ways how to send and receive IPIs
769 * on a platform like fast interrupts for example. In that case,
770 * one can call this function with ASIF_NOALLOC flag set and then
771 * call intr_ipi_dispatch() when appropriate.
776 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
777 void *arg, u_int flags)
779 struct intr_irqsrc *isrc;
785 isrc = intr_ipi_lookup(ipi);
786 if (isrc->isrc_ipifilter != NULL)
789 if ((flags & AISHF_NOALLOC) == 0) {
790 error = ipi_map(isrc, ipi);
795 isrc->isrc_ipifilter = filter;
796 isrc->isrc_arg = arg;
797 isrc->isrc_handlers = 1;
798 isrc->isrc_count = intr_ipi_setup_counters(name);
799 isrc->isrc_index = 0; /* it should not be used in IPI case */
801 if (isrc->isrc_dev != NULL) {
802 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
803 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
811 ipi_all_but_self(u_int ipi)
816 CPU_CLR(PCPU_GET(cpuid), &cpus);
817 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
818 intr_ipi_send(cpus, ipi);
822 ipi_cpu(int cpu, u_int ipi)
829 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
830 intr_ipi_send(cpus, ipi);
834 ipi_selected(cpuset_t cpus, u_int ipi)
837 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
838 intr_ipi_send(cpus, ipi);