2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include "opt_kstack_pages.h"
34 #include "opt_platform.h"
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
40 #include <sys/systm.h>
44 #include <sys/kernel.h>
46 #include <sys/malloc.h>
47 #include <sys/module.h>
48 #include <sys/mutex.h>
51 #include <sys/sched.h>
56 #include <vm/vm_extern.h>
57 #include <vm/vm_kern.h>
58 #include <vm/vm_map.h>
60 #include <machine/machdep.h>
61 #include <machine/debug_monitor.h>
62 #include <machine/intr.h>
63 #include <machine/smp.h>
65 #include <machine/vfp.h>
69 #include <contrib/dev/acpica/include/acpi.h>
70 #include <dev/acpica/acpivar.h>
74 #include <dev/ofw/openfirm.h>
75 #include <dev/ofw/ofw_bus.h>
76 #include <dev/ofw/ofw_bus_subr.h>
77 #include <dev/ofw/ofw_cpu.h>
80 #include <dev/psci/psci.h>
84 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
85 /* don't panic if one fails to start */
86 static uint32_t mp_quirks;
93 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
94 { "arm,fvp-base", MP_QUIRK_CPULIST },
95 /* This is incorrect in some DTS files */
96 { "arm,vfp-base", MP_QUIRK_CPULIST },
101 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
102 typedef void intr_ipi_handler_t(void *);
104 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
106 intr_ipi_handler_t * ii_handler;
107 void * ii_handler_arg;
108 intr_ipi_send_t * ii_send;
110 char ii_name[INTR_IPI_NAMELEN];
114 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
116 static struct intr_ipi *intr_ipi_lookup(u_int);
117 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
120 static void ipi_ast(void *);
121 static void ipi_hardclock(void *);
122 static void ipi_preempt(void *);
123 static void ipi_rendezvous(void *);
124 static void ipi_stop(void *);
126 struct mtx ap_boot_mtx;
127 struct pcb stoppcbs[MAXCPU];
130 * Not all systems boot from the first CPU in the device tree. To work around
131 * this we need to find which CPU we have booted from so when we later
132 * enable the secondary CPUs we skip this one.
134 static int cpu0 = -1;
136 void mpentry(unsigned long cpuid);
137 void init_secondary(uint64_t);
139 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
141 /* Set to 1 once we're ready to let the APs out of the pen. */
142 volatile int aps_ready = 0;
144 /* Temporary variables for init_secondary() */
145 void *dpcpu[MAXCPU - 1];
148 release_aps(void *dummy __unused)
152 /* Only release CPUs if they exist */
156 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
157 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
158 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
159 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
160 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
161 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
163 atomic_store_rel_int(&aps_ready, 1);
164 /* Wake up the other CPUs */
170 printf("Release APs...");
173 for (i = 0; i < 2000; i++) {
179 * Don't time out while we are making progress. Some large
180 * systems can take a while to start all CPUs.
182 if (smp_cpus > started) {
189 printf("APs not started\n");
191 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
194 init_secondary(uint64_t cpu)
199 pcpup = &__pcpu[cpu];
201 * Set the pcpu pointer with a backup in tpidr_el1 to be
202 * loaded when entering the kernel from userland.
206 "msr tpidr_el1, %0" :: "r"(pcpup));
208 /* Spin until the BSP releases the APs */
210 __asm __volatile("wfe");
212 /* Initialize curthread */
213 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
214 pcpup->pc_curthread = pcpup->pc_idlethread;
215 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
217 /* Initialize curpmap to match TTBR0's current setting. */
218 pmap0 = vmspace_pmap(&vmspace0);
219 KASSERT(pmap_to_ttbr0(pmap0) == READ_SPECIALREG(ttbr0_el1),
220 ("pmap0 doesn't match cpu %ld's ttbr0", cpu));
221 pcpup->pc_curpmap = pmap0;
224 * Identify current CPU. This is necessary to setup
225 * affinity registers and to provide support for
226 * runtime chip identification.
229 install_cpu_errata();
231 intr_pic_init_secondary();
233 /* Start per-CPU event timers. */
243 mtx_lock_spin(&ap_boot_mtx);
244 atomic_add_rel_32(&smp_cpus, 1);
245 if (smp_cpus == mp_ncpus) {
246 /* enable IPI's, tlb shootdown, freezes etc */
247 atomic_store_rel_int(&smp_started, 1);
249 mtx_unlock_spin(&ap_boot_mtx);
253 /* Enter the scheduler */
256 panic("scheduler returned us to init_secondary");
261 * Send IPI thru interrupt controller.
264 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
267 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
268 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
272 * Setup IPI handler on interrupt controller.
277 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
280 struct intr_irqsrc *isrc;
284 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
285 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
287 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
291 isrc->isrc_handlers++;
293 ii = intr_ipi_lookup(ipi);
294 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
296 ii->ii_handler = hand;
297 ii->ii_handler_arg = arg;
298 ii->ii_send = pic_ipi_send;
299 ii->ii_send_arg = isrc;
300 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
301 ii->ii_count = intr_ipi_setup_counters(name);
305 intr_ipi_send(cpuset_t cpus, u_int ipi)
309 ii = intr_ipi_lookup(ipi);
310 if (ii->ii_count == NULL)
311 panic("%s: not setup IPI %u", __func__, ipi);
313 ii->ii_send(ii->ii_send_arg, cpus, ipi);
317 ipi_ast(void *dummy __unused)
320 CTR0(KTR_SMP, "IPI_AST");
324 ipi_hardclock(void *dummy __unused)
327 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
332 ipi_preempt(void *dummy __unused)
334 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
335 sched_preempt(curthread);
339 ipi_rendezvous(void *dummy __unused)
342 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
343 smp_rendezvous_action();
347 ipi_stop(void *dummy __unused)
351 CTR0(KTR_SMP, "IPI_STOP");
353 cpu = PCPU_GET(cpuid);
354 savectx(&stoppcbs[cpu]);
356 /* Indicate we are stopped */
357 CPU_SET_ATOMIC(cpu, &stopped_cpus);
359 /* Wait for restart */
360 while (!CPU_ISSET(cpu, &started_cpus))
364 dbg_register_sync(NULL);
367 CPU_CLR_ATOMIC(cpu, &started_cpus);
368 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
369 CTR0(KTR_SMP, "IPI_STOP (restart)");
376 return (smp_topo_none());
379 /* Determine if we running MP machine */
384 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
389 start_cpu(u_int id, uint64_t target_cpu)
396 /* Check we are able to start this cpu */
400 KASSERT(id < MAXCPU, ("Too many CPUs"));
402 /* We are already running on cpu 0 */
407 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
408 * CPUs ordered as the are likely grouped into clusters so it can be
409 * useful to keep that property, e.g. for the GICv3 driver to send
410 * an IPI to all CPUs in the cluster.
414 cpuid += mp_maxid + 1;
417 pcpup = &__pcpu[cpuid];
418 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
420 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
421 dpcpu_init(dpcpu[cpuid - 1], cpuid);
423 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
424 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
426 err = psci_cpu_on(target_cpu, pa, cpuid);
427 if (err != PSCI_RETVAL_SUCCESS) {
429 * Panic here if INVARIANTS are enabled and PSCI failed to
430 * start the requested CPU. If psci_cpu_on returns PSCI_MISSING
431 * to indicate we are unable to use it to start the given CPU.
433 KASSERT(err == PSCI_MISSING ||
434 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
435 ("Failed to start CPU %u (%lx)\n", id, target_cpu));
438 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
439 dpcpu[cpuid - 1] = NULL;
442 /* Notify the user that the CPU failed to start */
443 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
445 CPU_SET(cpuid, &all_cpus);
452 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
454 ACPI_MADT_GENERIC_INTERRUPT *intr;
458 switch(entry->Type) {
459 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
460 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
463 start_cpu(id, intr->ArmMpidr);
464 __pcpu[id].pc_acpi_id = intr->Uid;
475 ACPI_TABLE_MADT *madt;
479 physaddr = acpi_find_table(ACPI_SIG_MADT);
483 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
485 printf("Unable to map the MADT, not starting APs\n");
490 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
491 madt_handler, &cpuid);
493 acpi_unmap_table(madt);
496 /* set proximity info */
497 acpi_pxm_set_cpu_locality();
505 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
511 if (addr_size == 2) {
513 target_cpu |= reg[1];
516 if (!start_cpu(id, target_cpu))
519 /* Try to read the numa node of this cpu */
520 if (vm_ndomains == 1 ||
521 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
523 __pcpu[id].pc_domain = domain;
524 if (domain < MAXMEMDOM)
525 CPU_SET(id, &cpuset_domain[domain]);
531 /* Initialize and fire up non-boot processors */
540 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
542 CPU_SET(0, &all_cpus);
544 switch(arm64_bus_method) {
547 mp_quirks = MP_QUIRK_CPULIST;
548 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
555 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
556 if (ofw_bus_node_is_compatible(node,
557 fdt_quirks[i].compat) != 0) {
558 mp_quirks = fdt_quirks[i].quirks;
561 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
562 ofw_cpu_early_foreach(cpu_init_fdt, true);
570 /* Introduce rest of cores to the world */
572 cpu_mp_announce(void)
578 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
580 ACPI_MADT_GENERIC_INTERRUPT *intr;
584 switch(entry->Type) {
585 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
586 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
588 mpidr_reg = READ_SPECIALREG(mpidr_el1);
589 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
602 ACPI_TABLE_MADT *madt;
606 physaddr = acpi_find_table(ACPI_SIG_MADT);
610 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
612 printf("Unable to map the MADT, not starting APs\n");
617 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
618 cpu_count_acpi_handler, &cores);
620 acpi_unmap_table(madt);
628 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
630 uint64_t mpidr_fdt, mpidr_reg;
634 if (addr_size == 2) {
639 mpidr_reg = READ_SPECIALREG(mpidr_el1);
641 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
650 cpu_mp_setmaxid(void)
657 switch(arm64_bus_method) {
660 cores = cpu_count_acpi();
662 cores = MIN(cores, MAXCPU);
664 printf("Found %d CPUs in the ACPI tables\n",
667 mp_maxid = cores - 1;
673 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
675 cores = MIN(cores, MAXCPU);
677 printf("Found %d CPUs in the device tree\n",
680 mp_maxid = cores - 1;
686 printf("No CPU data, limiting to 1 core\n");
690 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) {
691 if (cores > 0 && cores < mp_ncpus) {
693 mp_maxid = cores - 1;
701 static struct intr_ipi *
702 intr_ipi_lookup(u_int ipi)
705 if (ipi >= INTR_IPI_COUNT)
706 panic("%s: no such IPI %u", __func__, ipi);
708 return (&ipi_sources[ipi]);
712 * interrupt controller dispatch function for IPIs. It should
713 * be called straight from the interrupt controller, when associated
714 * interrupt source is learned. Or from anybody who has an interrupt
718 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
723 ii = intr_ipi_lookup(ipi);
724 if (ii->ii_count == NULL)
725 panic("%s: not setup IPI %u", __func__, ipi);
727 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
730 * Supply ipi filter with trapframe argument
731 * if none is registered.
733 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
739 * Map IPI into interrupt controller.
744 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
749 if (ipi >= INTR_IPI_COUNT)
750 panic("%s: no such IPI %u", __func__, ipi);
752 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
754 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
755 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
756 isrc->isrc_nspc_num = ipi_next_num;
758 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
760 isrc->isrc_dev = intr_irq_root_dev;
767 * Setup IPI handler to interrupt source.
769 * Note that there could be more ways how to send and receive IPIs
770 * on a platform like fast interrupts for example. In that case,
771 * one can call this function with ASIF_NOALLOC flag set and then
772 * call intr_ipi_dispatch() when appropriate.
777 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
778 void *arg, u_int flags)
780 struct intr_irqsrc *isrc;
786 isrc = intr_ipi_lookup(ipi);
787 if (isrc->isrc_ipifilter != NULL)
790 if ((flags & AISHF_NOALLOC) == 0) {
791 error = ipi_map(isrc, ipi);
796 isrc->isrc_ipifilter = filter;
797 isrc->isrc_arg = arg;
798 isrc->isrc_handlers = 1;
799 isrc->isrc_count = intr_ipi_setup_counters(name);
800 isrc->isrc_index = 0; /* it should not be used in IPI case */
802 if (isrc->isrc_dev != NULL) {
803 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
804 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
812 ipi_all_but_self(u_int ipi)
817 CPU_CLR(PCPU_GET(cpuid), &cpus);
818 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
819 intr_ipi_send(cpus, ipi);
823 ipi_cpu(int cpu, u_int ipi)
830 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
831 intr_ipi_send(cpus, ipi);
835 ipi_selected(cpuset_t cpus, u_int ipi)
838 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
839 intr_ipi_send(cpus, ipi);