2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include "opt_kstack_pages.h"
33 #include "opt_platform.h"
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/module.h>
46 #include <sys/mutex.h>
48 #include <sys/sched.h>
53 #include <vm/vm_extern.h>
54 #include <vm/vm_kern.h>
56 #include <machine/machdep.h>
57 #include <machine/intr.h>
58 #include <machine/smp.h>
60 #include <machine/vfp.h>
64 #include <contrib/dev/acpica/include/acpi.h>
65 #include <dev/acpica/acpivar.h>
69 #include <dev/ofw/openfirm.h>
70 #include <dev/ofw/ofw_bus.h>
71 #include <dev/ofw/ofw_bus_subr.h>
72 #include <dev/ofw/ofw_cpu.h>
75 #include <dev/psci/psci.h>
79 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
80 /* don't panic if one fails to start */
81 static uint32_t mp_quirks;
88 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
89 { "arm,fvp-base", MP_QUIRK_CPULIST },
90 /* This is incorrect in some DTS files */
91 { "arm,vfp-base", MP_QUIRK_CPULIST },
96 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
97 typedef void intr_ipi_handler_t(void *);
99 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
101 intr_ipi_handler_t * ii_handler;
102 void * ii_handler_arg;
103 intr_ipi_send_t * ii_send;
105 char ii_name[INTR_IPI_NAMELEN];
109 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
111 static struct intr_ipi *intr_ipi_lookup(u_int);
112 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
115 extern struct pcpu __pcpu[];
117 static void ipi_ast(void *);
118 static void ipi_hardclock(void *);
119 static void ipi_preempt(void *);
120 static void ipi_rendezvous(void *);
121 static void ipi_stop(void *);
123 struct mtx ap_boot_mtx;
124 struct pcb stoppcbs[MAXCPU];
127 * Not all systems boot from the first CPU in the device tree. To work around
128 * this we need to find which CPU we have booted from so when we later
129 * enable the secondary CPUs we skip this one.
131 static int cpu0 = -1;
133 void mpentry(unsigned long cpuid);
134 void init_secondary(uint64_t);
136 uint8_t secondary_stacks[MAXCPU - 1][PAGE_SIZE * KSTACK_PAGES] __aligned(16);
138 /* Set to 1 once we're ready to let the APs out of the pen. */
139 volatile int aps_ready = 0;
141 /* Temporary variables for init_secondary() */
142 void *dpcpu[MAXCPU - 1];
145 release_aps(void *dummy __unused)
149 /* Only release CPUs if they exist */
153 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
154 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
155 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
156 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
157 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
158 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
160 atomic_store_rel_int(&aps_ready, 1);
161 /* Wake up the other CPUs */
167 printf("Release APs...");
170 for (i = 0; i < 2000; i++) {
176 * Don't time out while we are making progress. Some large
177 * systems can take a while to start all CPUs.
179 if (smp_cpus > started) {
186 printf("APs not started\n");
188 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
191 init_secondary(uint64_t cpu)
195 pcpup = &__pcpu[cpu];
197 * Set the pcpu pointer with a backup in tpidr_el1 to be
198 * loaded when entering the kernel from userland.
202 "msr tpidr_el1, %0" :: "r"(pcpup));
204 /* Spin until the BSP releases the APs */
206 __asm __volatile("wfe");
208 /* Initialize curthread */
209 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
210 pcpup->pc_curthread = pcpup->pc_idlethread;
211 pcpup->pc_curpcb = pcpup->pc_idlethread->td_pcb;
214 * Identify current CPU. This is necessary to setup
215 * affinity registers and to provide support for
216 * runtime chip identification.
219 install_cpu_errata();
221 intr_pic_init_secondary();
223 /* Start per-CPU event timers. */
233 /* Enable interrupts */
236 mtx_lock_spin(&ap_boot_mtx);
238 atomic_add_rel_32(&smp_cpus, 1);
240 if (smp_cpus == mp_ncpus) {
241 /* enable IPI's, tlb shootdown, freezes etc */
242 atomic_store_rel_int(&smp_started, 1);
245 mtx_unlock_spin(&ap_boot_mtx);
247 /* Enter the scheduler */
250 panic("scheduler returned us to init_secondary");
255 * Send IPI thru interrupt controller.
258 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
261 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
262 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
266 * Setup IPI handler on interrupt controller.
271 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
274 struct intr_irqsrc *isrc;
278 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
279 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
281 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
285 isrc->isrc_handlers++;
287 ii = intr_ipi_lookup(ipi);
288 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
290 ii->ii_handler = hand;
291 ii->ii_handler_arg = arg;
292 ii->ii_send = pic_ipi_send;
293 ii->ii_send_arg = isrc;
294 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
295 ii->ii_count = intr_ipi_setup_counters(name);
299 intr_ipi_send(cpuset_t cpus, u_int ipi)
303 ii = intr_ipi_lookup(ipi);
304 if (ii->ii_count == NULL)
305 panic("%s: not setup IPI %u", __func__, ipi);
307 ii->ii_send(ii->ii_send_arg, cpus, ipi);
311 ipi_ast(void *dummy __unused)
314 CTR0(KTR_SMP, "IPI_AST");
318 ipi_hardclock(void *dummy __unused)
321 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
326 ipi_preempt(void *dummy __unused)
328 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
329 sched_preempt(curthread);
333 ipi_rendezvous(void *dummy __unused)
336 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
337 smp_rendezvous_action();
341 ipi_stop(void *dummy __unused)
345 CTR0(KTR_SMP, "IPI_STOP");
347 cpu = PCPU_GET(cpuid);
348 savectx(&stoppcbs[cpu]);
350 /* Indicate we are stopped */
351 CPU_SET_ATOMIC(cpu, &stopped_cpus);
353 /* Wait for restart */
354 while (!CPU_ISSET(cpu, &started_cpus))
357 CPU_CLR_ATOMIC(cpu, &started_cpus);
358 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
359 CTR0(KTR_SMP, "IPI_STOP (restart)");
366 return (smp_topo_none());
369 /* Determine if we running MP machine */
374 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
379 start_cpu(u_int id, uint64_t target_cpu)
386 /* Check we are able to start this cpu */
390 KASSERT(id < MAXCPU, ("Too many CPUs"));
392 /* We are already running on cpu 0 */
397 * Rotate the CPU IDs to put the boot CPU as CPU 0. We keep the other
398 * CPUs ordered as the are likely grouped into clusters so it can be
399 * useful to keep that property, e.g. for the GICv3 driver to send
400 * an IPI to all CPUs in the cluster.
404 cpuid += mp_maxid + 1;
407 pcpup = &__pcpu[cpuid];
408 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
410 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
411 dpcpu_init(dpcpu[cpuid - 1], cpuid);
413 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
414 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
416 err = psci_cpu_on(target_cpu, pa, cpuid);
417 if (err != PSCI_RETVAL_SUCCESS) {
419 * Panic here if INVARIANTS are enabled and PSCI failed to
420 * start the requested CPU. If psci_cpu_on returns PSCI_MISSING
421 * to indicate we are unable to use it to start the given CPU.
423 KASSERT(err == PSCI_MISSING ||
424 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
425 ("Failed to start CPU %u (%lx)\n", id, target_cpu));
428 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
429 dpcpu[cpuid - 1] = NULL;
432 /* Notify the user that the CPU failed to start */
433 printf("Failed to start CPU %u (%lx)\n", id, target_cpu);
435 CPU_SET(cpuid, &all_cpus);
442 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
444 ACPI_MADT_GENERIC_INTERRUPT *intr;
448 switch(entry->Type) {
449 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
450 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
453 start_cpu(id, intr->ArmMpidr);
454 __pcpu[id].pc_acpi_id = intr->Uid;
465 ACPI_TABLE_MADT *madt;
469 physaddr = acpi_find_table(ACPI_SIG_MADT);
473 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
475 printf("Unable to map the MADT, not starting APs\n");
480 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
481 madt_handler, &cpuid);
483 acpi_unmap_table(madt);
486 /* set proximity info */
487 acpi_pxm_set_cpu_locality();
495 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
501 if (addr_size == 2) {
503 target_cpu |= reg[1];
506 if (!start_cpu(id, target_cpu))
509 /* Try to read the numa node of this cpu */
510 if (vm_ndomains == 1 ||
511 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
513 __pcpu[id].pc_domain = domain;
514 if (domain < MAXMEMDOM)
515 CPU_SET(id, &cpuset_domain[domain]);
521 /* Initialize and fire up non-boot processors */
530 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
532 CPU_SET(0, &all_cpus);
534 switch(arm64_bus_method) {
537 mp_quirks = MP_QUIRK_CPULIST;
538 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
545 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
546 if (ofw_bus_node_is_compatible(node,
547 fdt_quirks[i].compat) != 0) {
548 mp_quirks = fdt_quirks[i].quirks;
551 KASSERT(cpu0 >= 0, ("Current CPU was not found"));
552 ofw_cpu_early_foreach(cpu_init_fdt, true);
560 /* Introduce rest of cores to the world */
562 cpu_mp_announce(void)
568 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
570 ACPI_MADT_GENERIC_INTERRUPT *intr;
574 switch(entry->Type) {
575 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
576 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
578 mpidr_reg = READ_SPECIALREG(mpidr_el1);
579 if ((mpidr_reg & 0xff00fffffful) == intr->ArmMpidr)
592 ACPI_TABLE_MADT *madt;
596 physaddr = acpi_find_table(ACPI_SIG_MADT);
600 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
602 printf("Unable to map the MADT, not starting APs\n");
607 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
608 cpu_count_acpi_handler, &cores);
610 acpi_unmap_table(madt);
618 cpu_find_cpu0_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
620 uint64_t mpidr_fdt, mpidr_reg;
624 if (addr_size == 2) {
629 mpidr_reg = READ_SPECIALREG(mpidr_el1);
631 if ((mpidr_reg & 0xff00fffffful) == mpidr_fdt)
640 cpu_mp_setmaxid(void)
647 switch(arm64_bus_method) {
650 cores = cpu_count_acpi();
652 cores = MIN(cores, MAXCPU);
654 printf("Found %d CPUs in the ACPI tables\n",
657 mp_maxid = cores - 1;
663 cores = ofw_cpu_early_foreach(cpu_find_cpu0_fdt, false);
665 cores = MIN(cores, MAXCPU);
667 printf("Found %d CPUs in the device tree\n",
670 mp_maxid = cores - 1;
676 printf("No CPU data, limiting to 1 core\n");
680 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) {
681 if (cores > 0 && cores < mp_ncpus) {
683 mp_maxid = cores - 1;
691 static struct intr_ipi *
692 intr_ipi_lookup(u_int ipi)
695 if (ipi >= INTR_IPI_COUNT)
696 panic("%s: no such IPI %u", __func__, ipi);
698 return (&ipi_sources[ipi]);
702 * interrupt controller dispatch function for IPIs. It should
703 * be called straight from the interrupt controller, when associated
704 * interrupt source is learned. Or from anybody who has an interrupt
708 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
713 ii = intr_ipi_lookup(ipi);
714 if (ii->ii_count == NULL)
715 panic("%s: not setup IPI %u", __func__, ipi);
717 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
720 * Supply ipi filter with trapframe argument
721 * if none is registered.
723 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
729 * Map IPI into interrupt controller.
734 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
739 if (ipi >= INTR_IPI_COUNT)
740 panic("%s: no such IPI %u", __func__, ipi);
742 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
744 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
745 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
746 isrc->isrc_nspc_num = ipi_next_num;
748 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
750 isrc->isrc_dev = intr_irq_root_dev;
757 * Setup IPI handler to interrupt source.
759 * Note that there could be more ways how to send and receive IPIs
760 * on a platform like fast interrupts for example. In that case,
761 * one can call this function with ASIF_NOALLOC flag set and then
762 * call intr_ipi_dispatch() when appropriate.
767 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
768 void *arg, u_int flags)
770 struct intr_irqsrc *isrc;
776 isrc = intr_ipi_lookup(ipi);
777 if (isrc->isrc_ipifilter != NULL)
780 if ((flags & AISHF_NOALLOC) == 0) {
781 error = ipi_map(isrc, ipi);
786 isrc->isrc_ipifilter = filter;
787 isrc->isrc_arg = arg;
788 isrc->isrc_handlers = 1;
789 isrc->isrc_count = intr_ipi_setup_counters(name);
790 isrc->isrc_index = 0; /* it should not be used in IPI case */
792 if (isrc->isrc_dev != NULL) {
793 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
794 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
802 ipi_all_but_self(u_int ipi)
807 CPU_CLR(PCPU_GET(cpuid), &cpus);
808 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
809 intr_ipi_send(cpus, ipi);
813 ipi_cpu(int cpu, u_int ipi)
820 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
821 intr_ipi_send(cpus, ipi);
825 ipi_selected(cpuset_t cpus, u_int ipi)
828 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
829 intr_ipi_send(cpus, ipi);