2 * Copyright (c) 2015-2016 The FreeBSD Foundation
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include "opt_kstack_pages.h"
34 #include "opt_platform.h"
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
40 #include <sys/systm.h>
44 #include <sys/kernel.h>
46 #include <sys/malloc.h>
47 #include <sys/module.h>
48 #include <sys/mutex.h>
51 #include <sys/sched.h>
56 #include <vm/vm_extern.h>
57 #include <vm/vm_kern.h>
58 #include <vm/vm_map.h>
60 #include <machine/machdep.h>
61 #include <machine/debug_monitor.h>
62 #include <machine/intr.h>
63 #include <machine/smp.h>
65 #include <machine/vfp.h>
69 #include <contrib/dev/acpica/include/acpi.h>
70 #include <dev/acpica/acpivar.h>
74 #include <dev/ofw/openfirm.h>
75 #include <dev/ofw/ofw_bus.h>
76 #include <dev/ofw/ofw_bus_subr.h>
77 #include <dev/ofw/ofw_cpu.h>
80 #include <dev/psci/psci.h>
84 #define MP_QUIRK_CPULIST 0x01 /* The list of cpus may be wrong, */
85 /* don't panic if one fails to start */
86 static uint32_t mp_quirks;
93 { "arm,foundation-aarch64", MP_QUIRK_CPULIST },
94 { "arm,fvp-base", MP_QUIRK_CPULIST },
95 /* This is incorrect in some DTS files */
96 { "arm,vfp-base", MP_QUIRK_CPULIST },
101 typedef void intr_ipi_send_t(void *, cpuset_t, u_int);
102 typedef void intr_ipi_handler_t(void *);
104 #define INTR_IPI_NAMELEN (MAXCOMLEN + 1)
106 intr_ipi_handler_t * ii_handler;
107 void * ii_handler_arg;
108 intr_ipi_send_t * ii_send;
110 char ii_name[INTR_IPI_NAMELEN];
114 static struct intr_ipi ipi_sources[INTR_IPI_COUNT];
116 static struct intr_ipi *intr_ipi_lookup(u_int);
117 static void intr_pic_ipi_setup(u_int, const char *, intr_ipi_handler_t *,
120 static void ipi_ast(void *);
121 static void ipi_hardclock(void *);
122 static void ipi_preempt(void *);
123 static void ipi_rendezvous(void *);
124 static void ipi_stop(void *);
126 struct pcb stoppcbs[MAXCPU];
129 static u_int fdt_cpuid;
132 void mpentry(unsigned long cpuid);
133 void init_secondary(uint64_t);
135 /* Synchronize AP startup. */
136 static struct mtx ap_boot_mtx;
138 /* Stacks for AP initialization, discarded once idle threads are started. */
140 static void *bootstacks[MAXCPU];
142 /* Count of started APs, used to synchronize access to bootstack. */
143 static volatile int aps_started;
145 /* Set to 1 once we're ready to let the APs out of the pen. */
146 static volatile int aps_ready;
148 /* Temporary variables for init_secondary() */
149 void *dpcpu[MAXCPU - 1];
152 is_boot_cpu(uint64_t target_cpu)
155 return (__pcpu[0].pc_mpidr == (target_cpu & CPU_AFF_MASK));
159 release_aps(void *dummy __unused)
163 /* Only release CPUs if they exist */
167 intr_pic_ipi_setup(IPI_AST, "ast", ipi_ast, NULL);
168 intr_pic_ipi_setup(IPI_PREEMPT, "preempt", ipi_preempt, NULL);
169 intr_pic_ipi_setup(IPI_RENDEZVOUS, "rendezvous", ipi_rendezvous, NULL);
170 intr_pic_ipi_setup(IPI_STOP, "stop", ipi_stop, NULL);
171 intr_pic_ipi_setup(IPI_STOP_HARD, "stop hard", ipi_stop, NULL);
172 intr_pic_ipi_setup(IPI_HARDCLOCK, "hardclock", ipi_hardclock, NULL);
174 atomic_store_rel_int(&aps_ready, 1);
175 /* Wake up the other CPUs */
181 printf("Release APs...");
184 for (i = 0; i < 2000; i++) {
190 * Don't time out while we are making progress. Some large
191 * systems can take a while to start all CPUs.
193 if (smp_cpus > started) {
200 printf("APs not started\n");
202 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
205 init_secondary(uint64_t cpu)
212 * Verify that the value passed in 'cpu' argument (aka context_id) is
213 * valid. Some older U-Boot based PSCI implementations are buggy,
214 * they can pass random value in it.
216 mpidr = READ_SPECIALREG(mpidr_el1) & CPU_AFF_MASK;
217 if (cpu >= MAXCPU || __pcpu[cpu].pc_mpidr != mpidr) {
218 for (cpu = 0; cpu < mp_maxid; cpu++)
219 if (__pcpu[cpu].pc_mpidr == mpidr)
222 panic("MPIDR for this CPU is not in pcpu table");
225 pcpup = &__pcpu[cpu];
227 * Set the pcpu pointer with a backup in tpidr_el1 to be
228 * loaded when entering the kernel from userland.
232 "msr tpidr_el1, %0" :: "r"(pcpup));
235 * Identify current CPU. This is necessary to setup
236 * affinity registers and to provide support for
237 * runtime chip identification.
239 * We need this before signalling the CPU is ready to
240 * let the boot CPU use the results.
244 /* Ensure the stores in identify_cpu have completed */
245 atomic_thread_fence_acq_rel();
247 /* Signal the BSP and spin until it has released all APs. */
248 atomic_add_int(&aps_started, 1);
249 while (!atomic_load_int(&aps_ready))
250 __asm __volatile("wfe");
252 pcpup->pc_midr = get_midr();
254 /* Initialize curthread */
255 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
256 pcpup->pc_curthread = pcpup->pc_idlethread;
258 /* Initialize curpmap to match TTBR0's current setting. */
259 pmap0 = vmspace_pmap(&vmspace0);
260 KASSERT(pmap_to_ttbr0(pmap0) == READ_SPECIALREG(ttbr0_el1),
261 ("pmap0 doesn't match cpu %ld's ttbr0", cpu));
262 pcpup->pc_curpmap = pmap0;
264 install_cpu_errata();
266 intr_pic_init_secondary();
268 /* Start per-CPU event timers. */
278 mtx_lock_spin(&ap_boot_mtx);
279 atomic_add_rel_32(&smp_cpus, 1);
280 if (smp_cpus == mp_ncpus) {
281 /* enable IPI's, tlb shootdown, freezes etc */
282 atomic_store_rel_int(&smp_started, 1);
284 mtx_unlock_spin(&ap_boot_mtx);
289 * Assert that smp_after_idle_runnable condition is reasonable.
291 MPASS(PCPU_GET(curpcb) == NULL);
293 /* Enter the scheduler */
296 panic("scheduler returned us to init_secondary");
301 smp_after_idle_runnable(void *arg __unused)
306 for (cpu = 1; cpu < mp_ncpus; cpu++) {
307 if (bootstacks[cpu] != NULL) {
309 while (atomic_load_ptr(&pc->pc_curpcb) == NULL)
311 kmem_free((vm_offset_t)bootstacks[cpu], PAGE_SIZE);
315 SYSINIT(smp_after_idle_runnable, SI_SUB_SMP, SI_ORDER_ANY,
316 smp_after_idle_runnable, NULL);
319 * Send IPI thru interrupt controller.
322 pic_ipi_send(void *arg, cpuset_t cpus, u_int ipi)
325 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
328 * Ensure that this CPU's stores will be visible to IPI
329 * recipients before starting to send the interrupts.
333 PIC_IPI_SEND(intr_irq_root_dev, arg, cpus, ipi);
337 * Setup IPI handler on interrupt controller.
342 intr_pic_ipi_setup(u_int ipi, const char *name, intr_ipi_handler_t *hand,
345 struct intr_irqsrc *isrc;
349 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
350 KASSERT(hand != NULL, ("%s: ipi %u no handler", __func__, ipi));
352 error = PIC_IPI_SETUP(intr_irq_root_dev, ipi, &isrc);
356 isrc->isrc_handlers++;
358 ii = intr_ipi_lookup(ipi);
359 KASSERT(ii->ii_count == NULL, ("%s: ipi %u reused", __func__, ipi));
361 ii->ii_handler = hand;
362 ii->ii_handler_arg = arg;
363 ii->ii_send = pic_ipi_send;
364 ii->ii_send_arg = isrc;
365 strlcpy(ii->ii_name, name, INTR_IPI_NAMELEN);
366 ii->ii_count = intr_ipi_setup_counters(name);
370 intr_ipi_send(cpuset_t cpus, u_int ipi)
374 ii = intr_ipi_lookup(ipi);
375 if (ii->ii_count == NULL)
376 panic("%s: not setup IPI %u", __func__, ipi);
378 ii->ii_send(ii->ii_send_arg, cpus, ipi);
382 ipi_ast(void *dummy __unused)
385 CTR0(KTR_SMP, "IPI_AST");
389 ipi_hardclock(void *dummy __unused)
392 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
397 ipi_preempt(void *dummy __unused)
399 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
400 sched_preempt(curthread);
404 ipi_rendezvous(void *dummy __unused)
407 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
408 smp_rendezvous_action();
412 ipi_stop(void *dummy __unused)
416 CTR0(KTR_SMP, "IPI_STOP");
418 cpu = PCPU_GET(cpuid);
419 savectx(&stoppcbs[cpu]);
421 /* Indicate we are stopped */
422 CPU_SET_ATOMIC(cpu, &stopped_cpus);
424 /* Wait for restart */
425 while (!CPU_ISSET(cpu, &started_cpus))
429 dbg_register_sync(NULL);
432 CPU_CLR_ATOMIC(cpu, &started_cpus);
433 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
434 CTR0(KTR_SMP, "IPI_STOP (restart)");
441 return (smp_topo_none());
444 /* Determine if we running MP machine */
449 /* ARM64TODO: Read the u bit of mpidr_el1 to determine this */
454 * Starts a given CPU. If the CPU is already running, i.e. it is the boot CPU,
455 * do nothing. Returns true if the CPU is present and running.
458 start_cpu(u_int cpuid, uint64_t target_cpu)
464 /* Check we are able to start this cpu */
465 if (cpuid > mp_maxid)
469 if (is_boot_cpu(target_cpu))
472 KASSERT(cpuid < MAXCPU, ("Too many CPUs"));
474 pcpup = &__pcpu[cpuid];
475 pcpu_init(pcpup, cpuid, sizeof(struct pcpu));
476 pcpup->pc_mpidr = target_cpu & CPU_AFF_MASK;
478 dpcpu[cpuid - 1] = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
479 dpcpu_init(dpcpu[cpuid - 1], cpuid);
481 bootstacks[cpuid] = (void *)kmem_malloc(PAGE_SIZE, M_WAITOK | M_ZERO);
483 naps = atomic_load_int(&aps_started);
484 bootstack = (char *)bootstacks[cpuid] + PAGE_SIZE;
486 printf("Starting CPU %u (%lx)\n", cpuid, target_cpu);
487 pa = pmap_extract(kernel_pmap, (vm_offset_t)mpentry);
488 err = psci_cpu_on(target_cpu, pa, cpuid);
489 if (err != PSCI_RETVAL_SUCCESS) {
491 * Panic here if INVARIANTS are enabled and PSCI failed to
492 * start the requested CPU. psci_cpu_on() returns PSCI_MISSING
493 * to indicate we are unable to use it to start the given CPU.
495 KASSERT(err == PSCI_MISSING ||
496 (mp_quirks & MP_QUIRK_CPULIST) == MP_QUIRK_CPULIST,
497 ("Failed to start CPU %u (%lx), error %d\n",
498 cpuid, target_cpu, err));
501 kmem_free((vm_offset_t)dpcpu[cpuid - 1], DPCPU_SIZE);
502 dpcpu[cpuid - 1] = NULL;
503 kmem_free((vm_offset_t)bootstacks[cpuid], PAGE_SIZE);
504 bootstacks[cpuid] = NULL;
509 /* Wait for the AP to switch to its boot stack. */
510 while (atomic_load_int(&aps_started) < naps + 1)
512 CPU_SET(cpuid, &all_cpus);
519 madt_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
521 ACPI_MADT_GENERIC_INTERRUPT *intr;
525 switch(entry->Type) {
526 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
527 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
530 if (is_boot_cpu(intr->ArmMpidr))
535 if (start_cpu(id, intr->ArmMpidr)) {
536 __pcpu[id].pc_acpi_id = intr->Uid;
538 * Don't increment for the boot CPU, its CPU ID is
541 if (!is_boot_cpu(intr->ArmMpidr))
554 ACPI_TABLE_MADT *madt;
558 physaddr = acpi_find_table(ACPI_SIG_MADT);
562 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
564 printf("Unable to map the MADT, not starting APs\n");
567 /* Boot CPU is always 0 */
569 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
570 madt_handler, &cpuid);
572 acpi_unmap_table(madt);
575 acpi_pxm_set_cpu_locality();
582 start_cpu_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
589 if (addr_size == 2) {
591 target_cpu |= reg[1];
594 if (is_boot_cpu(target_cpu))
599 if (!start_cpu(cpuid, target_cpu))
603 * Don't increment for the boot CPU, its CPU ID is reserved.
605 if (!is_boot_cpu(target_cpu))
608 /* Try to read the numa node of this cpu */
609 if (vm_ndomains == 1 ||
610 OF_getencprop(node, "numa-node-id", &domain, sizeof(domain)) <= 0)
612 __pcpu[cpuid].pc_domain = domain;
613 if (domain < MAXMEMDOM)
614 CPU_SET(cpuid, &cpuset_domain[domain]);
624 for (i = 0; fdt_quirks[i].compat != NULL; i++) {
625 if (ofw_bus_node_is_compatible(node,
626 fdt_quirks[i].compat) != 0) {
627 mp_quirks = fdt_quirks[i].quirks;
631 ofw_cpu_early_foreach(start_cpu_fdt, true);
635 /* Initialize and fire up non-boot processors */
639 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
641 /* CPU 0 is always boot CPU. */
642 CPU_SET(0, &all_cpus);
643 __pcpu[0].pc_mpidr = READ_SPECIALREG(mpidr_el1) & CPU_AFF_MASK;
645 switch(arm64_bus_method) {
648 mp_quirks = MP_QUIRK_CPULIST;
662 /* Introduce rest of cores to the world */
664 cpu_mp_announce(void)
670 cpu_count_acpi_handler(ACPI_SUBTABLE_HEADER *entry, void *arg)
672 ACPI_MADT_GENERIC_INTERRUPT *intr;
675 switch(entry->Type) {
676 case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
677 intr = (ACPI_MADT_GENERIC_INTERRUPT *)entry;
688 ACPI_TABLE_MADT *madt;
692 physaddr = acpi_find_table(ACPI_SIG_MADT);
696 madt = acpi_map_table(physaddr, ACPI_SIG_MADT);
698 printf("Unable to map the MADT, not starting APs\n");
703 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
704 cpu_count_acpi_handler, &cores);
706 acpi_unmap_table(madt);
713 cpu_mp_setmaxid(void)
720 switch(arm64_bus_method) {
723 cores = cpu_count_acpi();
725 cores = MIN(cores, MAXCPU);
727 printf("Found %d CPUs in the ACPI tables\n",
730 mp_maxid = cores - 1;
736 cores = ofw_cpu_early_foreach(NULL, false);
738 cores = MIN(cores, MAXCPU);
740 printf("Found %d CPUs in the device tree\n",
743 mp_maxid = cores - 1;
749 printf("No CPU data, limiting to 1 core\n");
753 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) {
754 if (cores > 0 && cores < mp_ncpus) {
756 mp_maxid = cores - 1;
764 static struct intr_ipi *
765 intr_ipi_lookup(u_int ipi)
768 if (ipi >= INTR_IPI_COUNT)
769 panic("%s: no such IPI %u", __func__, ipi);
771 return (&ipi_sources[ipi]);
775 * interrupt controller dispatch function for IPIs. It should
776 * be called straight from the interrupt controller, when associated
777 * interrupt source is learned. Or from anybody who has an interrupt
781 intr_ipi_dispatch(u_int ipi, struct trapframe *tf)
786 ii = intr_ipi_lookup(ipi);
787 if (ii->ii_count == NULL)
788 panic("%s: not setup IPI %u", __func__, ipi);
790 intr_ipi_increment_count(ii->ii_count, PCPU_GET(cpuid));
793 * Supply ipi filter with trapframe argument
794 * if none is registered.
796 arg = ii->ii_handler_arg != NULL ? ii->ii_handler_arg : tf;
802 * Map IPI into interrupt controller.
807 ipi_map(struct intr_irqsrc *isrc, u_int ipi)
812 if (ipi >= INTR_IPI_COUNT)
813 panic("%s: no such IPI %u", __func__, ipi);
815 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
817 isrc->isrc_type = INTR_ISRCT_NAMESPACE;
818 isrc->isrc_nspc_type = INTR_IRQ_NSPC_IPI;
819 isrc->isrc_nspc_num = ipi_next_num;
821 error = PIC_REGISTER(intr_irq_root_dev, isrc, &is_percpu);
823 isrc->isrc_dev = intr_irq_root_dev;
830 * Setup IPI handler to interrupt source.
832 * Note that there could be more ways how to send and receive IPIs
833 * on a platform like fast interrupts for example. In that case,
834 * one can call this function with ASIF_NOALLOC flag set and then
835 * call intr_ipi_dispatch() when appropriate.
840 intr_ipi_set_handler(u_int ipi, const char *name, intr_ipi_filter_t *filter,
841 void *arg, u_int flags)
843 struct intr_irqsrc *isrc;
849 isrc = intr_ipi_lookup(ipi);
850 if (isrc->isrc_ipifilter != NULL)
853 if ((flags & AISHF_NOALLOC) == 0) {
854 error = ipi_map(isrc, ipi);
859 isrc->isrc_ipifilter = filter;
860 isrc->isrc_arg = arg;
861 isrc->isrc_handlers = 1;
862 isrc->isrc_count = intr_ipi_setup_counters(name);
863 isrc->isrc_index = 0; /* it should not be used in IPI case */
865 if (isrc->isrc_dev != NULL) {
866 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
867 PIC_ENABLE_SOURCE(isrc->isrc_dev, isrc);
875 ipi_all_but_self(u_int ipi)
880 CPU_CLR(PCPU_GET(cpuid), &cpus);
881 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
882 intr_ipi_send(cpus, ipi);
886 ipi_cpu(int cpu, u_int ipi)
893 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
894 intr_ipi_send(cpus, ipi);
898 ipi_selected(cpuset_t cpus, u_int ipi)
901 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
902 intr_ipi_send(cpus, ipi);