2 * Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
5 * This software was developed by BAE Systems, the University of Cambridge
6 * Computer Laboratory, and Memorial University under DARPA/AFRL contract
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
8 * (TC) research program.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
35 #include <sys/param.h>
36 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <machine/bus.h>
43 #include <dev/ofw/ofw_bus.h>
44 #include <dev/ofw/ofw_bus_subr.h>
46 #include <arm64/coresight/coresight.h>
48 #include "coresight_if.h"
53 #define EDPCSR_HI 0x0ac
56 #define EDPRCR_COREPURQ (1 << 3)
57 #define EDPRCR_CORENPDRQ (1 << 0)
59 #define EDDEVID1 0xfc4
62 static struct ofw_compat_data compat_data[] = {
63 { "arm,coresight-cpu-debug", 1 },
69 struct coresight_platform_data *pdata;
72 static struct resource_spec debug_spec[] = {
73 { SYS_RES_MEMORY, 0, RF_ACTIVE },
78 debug_init(device_t dev)
80 struct debug_softc *sc;
83 sc = device_get_softc(dev);
85 /* Unlock Coresight */
86 bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK);
89 bus_write_4(sc->res, EDOSLAR, 0);
91 /* Already initialized? */
92 reg = bus_read_4(sc->res, EDPRCR);
93 if (reg & EDPRCR_CORENPDRQ)
97 reg |= EDPRCR_COREPURQ;
98 bus_write_4(sc->res, EDPRCR, reg);
101 reg = bus_read_4(sc->res, EDPRSR);
102 } while ((reg & EDPRCR_CORENPDRQ) == 0);
108 debug_probe(device_t dev)
111 if (!ofw_bus_status_okay(dev))
114 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
117 device_set_desc(dev, "Coresight CPU Debug");
119 return (BUS_PROBE_DEFAULT);
123 debug_attach(device_t dev)
125 struct coresight_desc desc;
126 struct debug_softc *sc;
128 sc = device_get_softc(dev);
130 if (bus_alloc_resources(dev, debug_spec, &sc->res) != 0) {
131 device_printf(dev, "cannot allocate resources for device\n");
135 sc->pdata = coresight_fdt_get_platform_data(dev);
136 desc.pdata = sc->pdata;
138 desc.dev_type = CORESIGHT_CPU_DEBUG;
139 coresight_register(&desc);
144 static device_method_t debug_methods[] = {
145 /* Device interface */
146 DEVMETHOD(device_probe, debug_probe),
147 DEVMETHOD(device_attach, debug_attach),
149 /* Coresight interface */
150 DEVMETHOD(coresight_init, debug_init),
154 static driver_t debug_driver = {
157 sizeof(struct debug_softc),
160 static devclass_t debug_devclass;
162 EARLY_DRIVER_MODULE(debug, simplebus, debug_driver, debug_devclass,
163 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_LATE);
164 MODULE_VERSION(debug, 1);