2 * Copyright (c) 2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifndef _MACHINE_ASM_H_
30 #define _MACHINE_ASM_H_
33 #if !defined(lint) && !defined(STRIP_FBSDID)
34 #define __FBSDID(s) .ident s
36 #define __FBSDID(s) /* nothing */
42 #define DTRACE_NOP nop
48 .text; .align 2; .type sym,#function; sym: \
49 .cfi_startproc; DTRACE_NOP
51 .globl sym; LENTRY(sym)
54 #define LEND(sym) .ltorg; .cfi_endproc; .size sym, . - sym
55 #define END(sym) LEND(sym)
58 #define WEAK_REFERENCE(sym, alias) \
62 #define UINT64_C(x) (x)
65 #define PIC_SYM(x,y) x ## @ ## y
67 #define PIC_SYM(x,y) x
70 /* Alias for link register x30 */
74 * Sets the trap fault handler. The exception handler will return to the
75 * address in the handler register on a data abort or the xzr register to
76 * clear the handler. The tmp parameter should be a register able to hold
79 #define SET_FAULT_HANDLER(handler, tmp) \
80 ldr tmp, [x18, #PC_CURTHREAD]; /* Load curthread */ \
81 ldr tmp, [tmp, #TD_PCB]; /* Load the pcb */ \
82 str handler, [tmp, #PCB_ONFAULT] /* Set the handler */
84 #define ENTER_USER_ACCESS(reg, tmp) \
85 ldr tmp, =has_pan; /* Get the addr of has_pan */ \
86 ldr reg, [tmp]; /* Read it */ \
87 cbz reg, 997f; /* If no PAN skip */ \
88 .inst 0xd500409f | (0 << 8); /* Clear PAN */ \
91 #define EXIT_USER_ACCESS(reg) \
92 cbz reg, 998f; /* If no PAN skip */ \
93 .inst 0xd500409f | (1 << 8); /* Set PAN */ \
96 #define EXIT_USER_ACCESS_CHECK(reg, tmp) \
97 ldr tmp, =has_pan; /* Get the addr of has_pan */ \
98 ldr reg, [tmp]; /* Read it */ \
99 cbz reg, 999f; /* If no PAN skip */ \
100 .inst 0xd500409f | (1 << 8); /* Set PAN */ \
104 * Some AArch64 CPUs speculate past an eret instruction. As the user may
105 * control the registers at this point add a speculation barrier usable on
106 * all AArch64 CPUs after the eret instruction.
107 * TODO: ARMv8.5 adds a specific instruction for this, we could use that
108 * if we know we are running on something that supports it.
115 #endif /* _MACHINE_ASM_H_ */