2 * Copyright (c) 2014 Andrew Turner
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #ifndef _MACHINE_ASM_H_
32 #define _MACHINE_ASM_H_
35 #if !defined(lint) && !defined(STRIP_FBSDID)
36 #define __FBSDID(s) .ident s
38 #define __FBSDID(s) /* nothing */
44 #define DTRACE_NOP nop
50 .text; .align 2; .type sym,#function; sym: \
51 .cfi_startproc; DTRACE_NOP
53 .globl sym; LENTRY(sym)
55 .globl sym; .text; .align 2; .type sym,#function; sym:
56 #define LEND(sym) .ltorg; .cfi_endproc; .size sym, . - sym
57 #define END(sym) LEND(sym)
60 #define WEAK_REFERENCE(sym, alias) \
64 #define UINT64_C(x) (x)
67 #define PIC_SYM(x,y) x ## @ ## y
69 #define PIC_SYM(x,y) x
72 /* Alias for link register x30 */
76 * Sets the trap fault handler. The exception handler will return to the
77 * address in the handler register on a data abort or the xzr register to
78 * clear the handler. The tmp parameter should be a register able to hold
81 #define SET_FAULT_HANDLER(handler, tmp) \
82 ldr tmp, [x18, #PC_CURTHREAD]; /* Load curthread */ \
83 ldr tmp, [tmp, #TD_PCB]; /* Load the pcb */ \
84 str handler, [tmp, #PCB_ONFAULT] /* Set the handler */
86 #define ENTER_USER_ACCESS(reg, tmp) \
87 ldr tmp, =has_pan; /* Get the addr of has_pan */ \
88 ldr reg, [tmp]; /* Read it */ \
89 cbz reg, 997f; /* If no PAN skip */ \
90 .inst 0xd500409f | (0 << 8); /* Clear PAN */ \
93 #define EXIT_USER_ACCESS(reg) \
94 cbz reg, 998f; /* If no PAN skip */ \
95 .inst 0xd500409f | (1 << 8); /* Set PAN */ \
98 #define EXIT_USER_ACCESS_CHECK(reg, tmp) \
99 ldr tmp, =has_pan; /* Get the addr of has_pan */ \
100 ldr reg, [tmp]; /* Read it */ \
101 cbz reg, 999f; /* If no PAN skip */ \
102 .inst 0xd500409f | (1 << 8); /* Set PAN */ \
106 * Some AArch64 CPUs speculate past an eret instruction. As the user may
107 * control the registers at this point add a speculation barrier usable on
108 * all AArch64 CPUs after the eret instruction.
109 * TODO: ARMv8.5 adds a specific instruction for this, we could use that
110 * if we know we are running on something that supports it.
117 #endif /* _MACHINE_ASM_H_ */
119 #endif /* !__arm__ */